sh: Support userimask for all SH-X3 interrupt controllers.
This shuffles some of the shared bits out of the 7786 code and in to a shared SH-X3 support file. Presently just for userimask, but also a good place for the IRQ balancing wrappers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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3 changed files with 36 additions and 18 deletions
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@ -8,13 +8,13 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7763) += setup-sh7763.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7786) += setup-sh7786.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7786) += setup-sh7786.o intc-shx3.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7723) += setup-sh7723.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7724) += setup-sh7724.o
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obj-$(CONFIG_CPU_SUBTYPE_SH7366) += setup-sh7366.o
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obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o
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obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o intc-shx3.o
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# SMP setup
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smp-$(CONFIG_CPU_SHX3) := smp-shx3.o
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34
arch/sh/kernel/cpu/sh4a/intc-shx3.c
Normal file
34
arch/sh/kernel/cpu/sh4a/intc-shx3.c
Normal file
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@ -0,0 +1,34 @@
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/*
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* Shared support for SH-X3 interrupt controllers.
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*
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* Copyright (C) 2009 - 2010 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/init.h>
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#define INTACK 0xfe4100b8
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#define INTACKCLR 0xfe4100bc
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#define INTC_USERIMASK 0xfe411000
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#ifdef CONFIG_INTC_BALANCING
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unsigned int irq_lookup(unsigned int irq)
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{
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return __raw_readl(INTACK) & 1 ? irq : NO_IRQ_IGNORE;
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}
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void irq_finish(unsigned int irq)
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{
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__raw_writel(irq2evt(irq), INTACKCLR);
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}
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#endif
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static int __init shx3_irq_setup(void)
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{
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return register_intc_userimask(INTC_USERIMASK);
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}
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arch_initcall(shx3_irq_setup);
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@ -756,8 +756,6 @@ static struct intc_vect vectors[] __initdata = {
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#define INTDISTCR0 0xfe4100b0
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#define INTDISTCR1 0xfe4100b4
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#define INTACK 0xfe4100b8
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#define INTACKCLR 0xfe4100bc
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#define INT2DISTCR0 0xfe410900
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#define INT2DISTCR1 0xfe410904
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#define INT2DISTCR2 0xfe410908
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@ -920,19 +918,6 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567,
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#define INTC_INTMSK2 INTMSK2
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#define INTC_INTMSKCLR1 CnINTMSKCLR1
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#define INTC_INTMSKCLR2 INTMSKCLR2
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#define INTC_USERIMASK 0xfe411000
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#ifdef CONFIG_INTC_BALANCING
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unsigned int irq_lookup(unsigned int irq)
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{
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return __raw_readl(INTACK) & 1 ? irq : NO_IRQ_IGNORE;
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}
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void irq_finish(unsigned int irq)
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{
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__raw_writel(irq2evt(irq), INTACKCLR);
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}
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#endif
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void __init plat_irq_setup(void)
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{
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@ -947,7 +932,6 @@ void __init plat_irq_setup(void)
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__raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
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register_intc_controller(&intc_desc);
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register_intc_userimask(INTC_USERIMASK);
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}
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void __init plat_irq_setup_pins(int mode)
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