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AT91 MMC 1: Pass host structure. 

The I/O base address is now stored in the 'at91mci_host' structure.  We
therefore have to pass this structure to at91_mci_read() and
at91_mci_write().

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This commit is contained in:
Andrew Victor 2006-10-25 19:42:38 +02:00 committed by Pierre Ossman
parent 3263263f70
commit e0b19b8365
1 changed files with 80 additions and 88 deletions
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168
drivers/mmc/at91_mci.c
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@ -87,25 +87,9 @@ static struct clk *mci_clk;
/*
* Read from a MCI register.
*/
static inline unsigned long at91_mci_read(unsigned int reg)
{
void __iomem *mci_base = (void __iomem *)AT91_VA_BASE_MCI;
#define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
#define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
return __raw_readl(mci_base + reg);
}
/*
* Write to a MCI register.
*/
static inline void at91_mci_write(unsigned int reg, unsigned long value)
{
void __iomem *mci_base = (void __iomem *)AT91_VA_BASE_MCI;
__raw_writel(value, mci_base + reg);
}
/*
* Low level type for this driver
@ -116,6 +100,8 @@ struct at91mci_host
struct mmc_command *cmd;
struct mmc_request *request;
void __iomem *baseaddr;
struct at91_mmc_data *board;
int present;
@ -217,13 +203,13 @@ static void at91mci_pre_dma_read(struct at91mci_host *host)
/* Check to see if this needs filling */
if (i == 0) {
if (at91_mci_read(AT91_PDC_RCR) != 0) {
if (at91_mci_read(host, AT91_PDC_RCR) != 0) {
pr_debug("Transfer active in current\n");
continue;
}
}
else {
if (at91_mci_read(AT91_PDC_RNCR) != 0) {
if (at91_mci_read(host, AT91_PDC_RNCR) != 0) {
pr_debug("Transfer active in next\n");
continue;
}
@ -240,12 +226,12 @@ static void at91mci_pre_dma_read(struct at91mci_host *host)
pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
if (i == 0) {
at91_mci_write(AT91_PDC_RPR, sg->dma_address);
at91_mci_write(AT91_PDC_RCR, sg->length / 4);
at91_mci_write(host, AT91_PDC_RPR, sg->dma_address);
at91_mci_write(host, AT91_PDC_RCR, sg->length / 4);
}
else {
at91_mci_write(AT91_PDC_RNPR, sg->dma_address);
at91_mci_write(AT91_PDC_RNCR, sg->length / 4);
at91_mci_write(host, AT91_PDC_RNPR, sg->dma_address);
at91_mci_write(host, AT91_PDC_RNCR, sg->length / 4);
}
}
@ -308,8 +294,8 @@ static void at91mci_post_dma_read(struct at91mci_host *host)
if (host->transfer_index < data->sg_len)
at91mci_pre_dma_read(host);
else {
at91_mci_write(AT91_MCI_IER, AT91_MCI_RXBUFF);
at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
}
pr_debug("post dma read done\n");
@ -326,11 +312,11 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host)
pr_debug("Handling the transmit\n");
/* Disable the transfer */
at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
/* Now wait for cmd ready */
at91_mci_write(AT91_MCI_IDR, AT91_MCI_TXBUFE);
at91_mci_write(AT91_MCI_IER, AT91_MCI_NOTBUSY);
at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
cmd = host->cmd;
if (!cmd) return;
@ -344,21 +330,21 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host)
/*
* Enable the controller
*/
static void at91_mci_enable(void)
static void at91_mci_enable(struct at91mci_host *host)
{
at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIEN);
at91_mci_write(AT91_MCI_IDR, 0xFFFFFFFF);
at91_mci_write(AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
at91_mci_write(AT91_MCI_MR, 0x834A);
at91_mci_write(AT91_MCI_SDCR, 0x0);
at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
at91_mci_write(host, AT91_MCI_IDR, 0xFFFFFFFF);
at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
at91_mci_write(host, AT91_MCI_MR, 0x834A);
at91_mci_write(host, AT91_MCI_SDCR, 0x0);
}
/*
* Disable the controller
*/
static void at91_mci_disable(void)
static void at91_mci_disable(struct at91mci_host *host)
{
at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
}
/*
@ -378,13 +364,13 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
/* Not sure if this is needed */
#if 0
if ((at91_mci_read(AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
pr_debug("Clearing timeout\n");
at91_mci_write(AT91_MCI_ARGR, 0);
at91_mci_write(AT91_MCI_CMDR, AT91_MCI_OPDCMD);
while (!(at91_mci_read(AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
at91_mci_write(host, AT91_MCI_ARGR, 0);
at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD);
while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
/* spin */
pr_debug("Clearing: SR = %08X\n", at91_mci_read(AT91_MCI_SR));
pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
}
}
#endif
@ -432,31 +418,31 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
* Set the arguments and send the command
*/
pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08lX)\n",
cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(AT91_MCI_MR));
cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
if (!data) {
at91_mci_write(AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS);
at91_mci_write(AT91_PDC_RPR, 0);
at91_mci_write(AT91_PDC_RCR, 0);
at91_mci_write(AT91_PDC_RNPR, 0);
at91_mci_write(AT91_PDC_RNCR, 0);
at91_mci_write(AT91_PDC_TPR, 0);
at91_mci_write(AT91_PDC_TCR, 0);
at91_mci_write(AT91_PDC_TNPR, 0);
at91_mci_write(AT91_PDC_TNCR, 0);
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS);
at91_mci_write(host, AT91_PDC_RPR, 0);
at91_mci_write(host, AT91_PDC_RCR, 0);
at91_mci_write(host, AT91_PDC_RNPR, 0);
at91_mci_write(host, AT91_PDC_RNCR, 0);
at91_mci_write(host, AT91_PDC_TPR, 0);
at91_mci_write(host, AT91_PDC_TCR, 0);
at91_mci_write(host, AT91_PDC_TNPR, 0);
at91_mci_write(host, AT91_PDC_TNCR, 0);
at91_mci_write(AT91_MCI_ARGR, cmd->arg);
at91_mci_write(AT91_MCI_CMDR, cmdr);
at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
at91_mci_write(host, AT91_MCI_CMDR, cmdr);
return AT91_MCI_CMDRDY;
}
mr = at91_mci_read(AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */
at91_mci_write(AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */
at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
/*
* Disable the PDC controller
*/
at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS);
if (cmdr & AT91_MCI_TRCMD_START) {
data->bytes_xfered = 0;
@ -485,8 +471,8 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
pr_debug("Transmitting %d bytes\n", host->total_length);
at91_mci_write(AT91_PDC_TPR, host->physical_address);
at91_mci_write(AT91_PDC_TCR, host->total_length / 4);
at91_mci_write(host, AT91_PDC_TPR, host->physical_address);
at91_mci_write(host, AT91_PDC_TCR, host->total_length / 4);
ier = AT91_MCI_TXBUFE;
}
}
@ -496,14 +482,14 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_
* the data sheet says
*/
at91_mci_write(AT91_MCI_ARGR, cmd->arg);
at91_mci_write(AT91_MCI_CMDR, cmdr);
at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
at91_mci_write(host, AT91_MCI_CMDR, cmdr);
if (cmdr & AT91_MCI_TRCMD_START) {
if (cmdr & AT91_MCI_TRDIR)
at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTEN);
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTEN);
else
at91_mci_write(AT91_PDC_PTCR, AT91_PDC_TXTEN);
at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTEN);
}
return ier;
}
@ -520,7 +506,7 @@ static void at91mci_process_command(struct at91mci_host *host, struct mmc_comman
pr_debug("setting ier to %08X\n", ier);
/* Stop on errors or the required value */
at91_mci_write(AT91_MCI_IER, 0xffff0000 | ier);
at91_mci_write(host, AT91_MCI_IER, 0xffff0000 | ier);
}
/*
@ -548,19 +534,19 @@ static void at91mci_completed_command(struct at91mci_host *host)
struct mmc_command *cmd = host->cmd;
unsigned int status;
at91_mci_write(AT91_MCI_IDR, 0xffffffff);
at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
cmd->resp[0] = at91_mci_read(AT91_MCI_RSPR(0));
cmd->resp[1] = at91_mci_read(AT91_MCI_RSPR(1));
cmd->resp[2] = at91_mci_read(AT91_MCI_RSPR(2));
cmd->resp[3] = at91_mci_read(AT91_MCI_RSPR(3));
cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0));
cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1));
cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2));
cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3));
if (host->buffer) {
dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address);
host->buffer = NULL;
}
status = at91_mci_read(AT91_MCI_SR);
status = at91_mci_read(host, AT91_MCI_SR);
pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
@ -617,12 +603,12 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
if (ios->clock == 0) {
/* Disable the MCI controller */
at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIDIS);
at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS);
clkdiv = 0;
}
else {
/* Enable the MCI controller */
at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIEN);
at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
if ((at91_master_clock % (ios->clock * 2)) == 0)
clkdiv = ((at91_master_clock / ios->clock) / 2) - 1;
@ -634,15 +620,15 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
}
if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
pr_debug("MMC: Setting controller bus width to 4\n");
at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
}
else {
pr_debug("MMC: Setting controller bus width to 1\n");
at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
}
/* Set the clock divider */
at91_mci_write(AT91_MCI_MR, (at91_mci_read(AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
/* maybe switch power to the card */
if (host->board->vcc_pin) {
@ -668,14 +654,14 @@ static irqreturn_t at91_mci_irq(int irq, void *devid)
unsigned int int_status;
int_status = at91_mci_read(AT91_MCI_SR);
pr_debug("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(AT91_MCI_IMR),
int_status & at91_mci_read(AT91_MCI_IMR));
int_status = at91_mci_read(host, AT91_MCI_SR);
pr_debug("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(host, AT91_MCI_IMR),
int_status & at91_mci_read(host, AT91_MCI_IMR));
if ((int_status & at91_mci_read(AT91_MCI_IMR)) & 0xffff0000)
if ((int_status & at91_mci_read(host, AT91_MCI_IMR)) & 0xffff0000)
completed = 1;
int_status &= at91_mci_read(AT91_MCI_IMR);
int_status &= at91_mci_read(host, AT91_MCI_IMR);
if (int_status & AT91_MCI_UNRE)
pr_debug("MMC: Underrun error\n");
@ -705,7 +691,7 @@ static irqreturn_t at91_mci_irq(int irq, void *devid)
if (int_status & AT91_MCI_RXBUFF) {
pr_debug("RX buffer full\n");
at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY);
at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
}
if (int_status & AT91_MCI_ENDTX) {
@ -719,7 +705,7 @@ static irqreturn_t at91_mci_irq(int irq, void *devid)
if (int_status & AT91_MCI_NOTBUSY) {
pr_debug("Card is ready\n");
at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY);
at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY);
}
if (int_status & AT91_MCI_DTIP) {
@ -743,11 +729,11 @@ static irqreturn_t at91_mci_irq(int irq, void *devid)
completed = 1;
}
}
at91_mci_write(AT91_MCI_IDR, int_status);
at91_mci_write(host, AT91_MCI_IDR, int_status);
if (completed) {
pr_debug("Completed command\n");
at91_mci_write(AT91_MCI_IDR, 0xffffffff);
at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
at91mci_completed_command(host);
}
@ -769,7 +755,7 @@ static irqreturn_t at91_mmc_det_irq(int irq, void *_host)
present ? "insert" : "remove");
if (!present) {
pr_debug("****** Resetting SD-card bus width ******\n");
at91_mci_write(AT91_MCI_SDCR, 0);
at91_mci_write(host, AT91_MCI_SDCR, 0);
}
mmc_detect_change(host->mmc, msecs_to_jiffies(100));
}
@ -809,8 +795,6 @@ static int at91_mci_probe(struct platform_device *pdev)
int ret;
pr_debug("Probe MCI devices\n");
at91_mci_disable();
at91_mci_enable();
mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev);
if (!mmc) {
@ -848,6 +832,14 @@ static int at91_mci_probe(struct platform_device *pdev)
}
clk_enable(mci_clk); /* Enable the peripheral clock */
host->baseaddr = (void __iomem *)AT91_VA_BASE_MCI;
/*
* Reset hardware
*/
at91_mci_disable(host);
at91_mci_enable(host);
/*
* Allocate the MCI interrupt
*/
@ -906,7 +898,7 @@ static int at91_mci_remove(struct platform_device *pdev)
}
mmc_remove_host(mmc);
at91_mci_disable();
at91_mci_disable(host);
free_irq(AT91RM9200_ID_MCI, host);
mmc_free_host(mmc);