drm/radeon/kms: handle the case of no active displays properly in the bandwidth code
Logic was: if (mode0 && mode1) else if (mode0) else Should be: if (mode0 && mode1) else if (mode0) else if (mode1) Otherwise we may end up calculating the priority regs with unitialized values. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=16492 Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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e06b14ee91
2 changed files with 18 additions and 32 deletions
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@ -398,7 +398,9 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
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struct drm_display_mode *mode1 = NULL;
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struct rs690_watermark wm0;
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struct rs690_watermark wm1;
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u32 tmp, d1mode_priority_a_cnt, d2mode_priority_a_cnt;
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u32 tmp;
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u32 d1mode_priority_a_cnt = S_006548_D1MODE_PRIORITY_A_OFF(1);
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u32 d2mode_priority_a_cnt = S_006548_D1MODE_PRIORITY_A_OFF(1);
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fixed20_12 priority_mark02, priority_mark12, fill_rate;
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fixed20_12 a, b;
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@ -495,10 +497,6 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
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d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1);
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d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1);
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}
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WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
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WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
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WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
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WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
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} else if (mode0) {
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if (dfixed_trunc(wm0.dbpp) > 64)
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a.full = dfixed_mul(wm0.dbpp, wm0.num_line_pair);
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@ -528,13 +526,7 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
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d1mode_priority_a_cnt = dfixed_trunc(priority_mark02);
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if (rdev->disp_priority == 2)
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d1mode_priority_a_cnt |= S_006548_D1MODE_PRIORITY_A_ALWAYS_ON(1);
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WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
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WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
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WREG32(R_006D48_D2MODE_PRIORITY_A_CNT,
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S_006D48_D2MODE_PRIORITY_A_OFF(1));
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WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT,
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S_006D4C_D2MODE_PRIORITY_B_OFF(1));
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} else {
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} else if (mode1) {
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if (dfixed_trunc(wm1.dbpp) > 64)
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a.full = dfixed_mul(wm1.dbpp, wm1.num_line_pair);
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else
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@ -563,13 +555,12 @@ void rs690_bandwidth_update(struct radeon_device *rdev)
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d2mode_priority_a_cnt = dfixed_trunc(priority_mark12);
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if (rdev->disp_priority == 2)
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d2mode_priority_a_cnt |= S_006D48_D2MODE_PRIORITY_A_ALWAYS_ON(1);
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WREG32(R_006548_D1MODE_PRIORITY_A_CNT,
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S_006548_D1MODE_PRIORITY_A_OFF(1));
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WREG32(R_00654C_D1MODE_PRIORITY_B_CNT,
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S_00654C_D1MODE_PRIORITY_B_OFF(1));
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}
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WREG32(R_006548_D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
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WREG32(R_00654C_D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
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WREG32(R_006D48_D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
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WREG32(R_006D4C_D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
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}
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}
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uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg)
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@ -927,7 +927,9 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
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struct drm_display_mode *mode1 = NULL;
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struct rv515_watermark wm0;
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struct rv515_watermark wm1;
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u32 tmp, d1mode_priority_a_cnt, d2mode_priority_a_cnt;
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u32 tmp;
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u32 d1mode_priority_a_cnt = MODE_PRIORITY_OFF;
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u32 d2mode_priority_a_cnt = MODE_PRIORITY_OFF;
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fixed20_12 priority_mark02, priority_mark12, fill_rate;
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fixed20_12 a, b;
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@ -1001,10 +1003,6 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
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d1mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
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d2mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
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}
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WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
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WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
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WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
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WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
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} else if (mode0) {
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if (dfixed_trunc(wm0.dbpp) > 64)
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a.full = dfixed_div(wm0.dbpp, wm0.num_line_pair);
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@ -1034,11 +1032,7 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
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d1mode_priority_a_cnt = dfixed_trunc(priority_mark02);
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if (rdev->disp_priority == 2)
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d1mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
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WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
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WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
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WREG32(D2MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
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WREG32(D2MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
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} else {
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} else if (mode1) {
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if (dfixed_trunc(wm1.dbpp) > 64)
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a.full = dfixed_div(wm1.dbpp, wm1.num_line_pair);
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else
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@ -1067,11 +1061,12 @@ void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
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d2mode_priority_a_cnt = dfixed_trunc(priority_mark12);
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if (rdev->disp_priority == 2)
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d2mode_priority_a_cnt |= MODE_PRIORITY_ALWAYS_ON;
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WREG32(D1MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
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WREG32(D1MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
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}
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WREG32(D1MODE_PRIORITY_A_CNT, d1mode_priority_a_cnt);
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WREG32(D1MODE_PRIORITY_B_CNT, d1mode_priority_a_cnt);
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WREG32(D2MODE_PRIORITY_A_CNT, d2mode_priority_a_cnt);
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WREG32(D2MODE_PRIORITY_B_CNT, d2mode_priority_a_cnt);
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}
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}
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void rv515_bandwidth_update(struct radeon_device *rdev)
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