Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6: cs5536: define dma_sff_read_status() method ide: fix barriers support ide: Remove void casts hpt366: use ATA_DMA_* constants hpt366: fix HPT370 DMA timeouts
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df89f1ba97
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@ -236,6 +236,7 @@ static const struct ide_dma_ops cs5536_dma_ops = {
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.dma_test_irq = ide_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timer_expiry = ide_dma_sff_timer_expiry,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_port_info cs5536_info = {
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@ -3,7 +3,7 @@
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* Portions Copyright (C) 2001 Sun Microsystems, Inc.
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* Portions Copyright (C) 2003 Red Hat Inc
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* Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz
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* Portions Copyright (C) 2005-2008 MontaVista Software, Inc.
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* Portions Copyright (C) 2005-2009 MontaVista Software, Inc.
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*
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* Thanks to HighPoint Technologies for their assistance, and hardware.
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* Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his
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@ -114,6 +114,8 @@
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* the register setting lists into the table indexed by the clock selected
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* - set the correct hwif->ultra_mask for each individual chip
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* - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards
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* - stop resetting HPT370's state machine before each DMA transfer as that has
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* caused more harm than good
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* Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com>
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*/
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@ -133,7 +135,7 @@
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#define DRV_NAME "hpt366"
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/* various tuning parameters */
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#define HPT_RESET_STATE_ENGINE
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#undef HPT_RESET_STATE_ENGINE
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#undef HPT_DELAY_INTERRUPT
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static const char *quirk_drives[] = {
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@ -808,7 +810,7 @@ static void hpt370_irq_timeout(ide_drive_t *drive)
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/* get DMA command mode */
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dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
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/* stop DMA */
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outb(dma_cmd & ~0x1, hwif->dma_base + ATA_DMA_CMD);
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outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);
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hpt370_clear_engine(drive);
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}
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@ -825,11 +827,11 @@ static int hpt370_dma_end(ide_drive_t *drive)
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ide_hwif_t *hwif = drive->hwif;
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u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
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if (dma_stat & 0x01) {
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if (dma_stat & ATA_DMA_ACTIVE) {
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/* wait a little */
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udelay(20);
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dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
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if (dma_stat & 0x01)
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if (dma_stat & ATA_DMA_ACTIVE)
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hpt370_irq_timeout(drive);
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}
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return ide_dma_end(drive);
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@ -851,7 +853,7 @@ static int hpt374_dma_test_irq(ide_drive_t *drive)
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dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
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/* return 1 if INTR asserted */
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if (dma_stat & 4)
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if (dma_stat & ATA_DMA_INTR)
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return 1;
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return 0;
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@ -102,11 +102,14 @@ void ide_complete_cmd(ide_drive_t *drive, struct ide_cmd *cmd, u8 stat, u8 err)
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drive->dev_flags |= IDE_DFLAG_PARKED;
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}
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if (rq && rq->cmd_type == REQ_TYPE_ATA_TASKFILE)
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memcpy(rq->special, cmd, sizeof(*cmd));
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if (rq && rq->cmd_type == REQ_TYPE_ATA_TASKFILE) {
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struct ide_cmd *orig_cmd = rq->special;
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if (cmd->tf_flags & IDE_TFLAG_DYN)
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kfree(cmd);
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if (cmd->tf_flags & IDE_TFLAG_DYN)
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kfree(orig_cmd);
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else
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memcpy(orig_cmd, cmd, sizeof(*cmd));
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}
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}
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/* obsolete, blk_rq_bytes() should be used instead */
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@ -1682,7 +1682,7 @@ static int __devinit pmac_ide_init_dma(ide_hwif_t *hwif,
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* The +2 is +1 for the stop command and +1 to allow for
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* aligning the start address to a multiple of 16 bytes.
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*/
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pmif->dma_table_cpu = (struct dbdma_cmd*)pci_alloc_consistent(
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pmif->dma_table_cpu = pci_alloc_consistent(
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dev,
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(MAX_DCMDS + 2) * sizeof(struct dbdma_cmd),
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&hwif->dmatable_dma);
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