pinctrl: Add SPEAr pinctrl drivers
This adds pinctrl driver for SPEAr platform. It also updates MAINTAINERS file for SPEAr pinctrl drivers. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
This commit is contained in:
Viresh Kumar
Arnd Bergmann
parent
f3215b427b
commit
deda8287e1
23
MAINTAINERS
23
MAINTAINERS
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@ -5234,6 +5234,14 @@ M: Linus Walleij <linus.walleij@linaro.org>
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S: Maintained
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F: drivers/pinctrl/
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PIN CONTROLLER - ST SPEAR
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M: Viresh Kumar <viresh.kumar@st.com>
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L: spear-devel@list.st.com
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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W: http://www.st.com/spear
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S: Maintained
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F: driver/pinctrl/spear/
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PKTCDVD DRIVER
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M: Peter Osterlund <petero2@telia.com>
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S: Maintained
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@ -6330,21 +6338,6 @@ F: arch/arm/mach-spear*/clock.c
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F: arch/arm/plat-spear/clock.c
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F: arch/arm/plat-spear/include/plat/clock.h
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SPEAR PAD MULTIPLEXING SUPPORT
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M: Viresh Kumar <viresh.kumar@st.com>
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L: spear-devel@list.st.com
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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W: http://www.st.com/spear
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S: Maintained
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F: arch/arm/plat-spear/include/plat/padmux.h
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F: arch/arm/plat-spear/padmux.c
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F: arch/arm/mach-spear*/spear*xx.c
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F: arch/arm/mach-spear*/include/mach/generic.h
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F: arch/arm/mach-spear3xx/spear3*0.c
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F: arch/arm/mach-spear3xx/spear3*0_evb.c
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F: arch/arm/mach-spear6xx/spear600.c
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F: arch/arm/mach-spear6xx/spear600_evb.c
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SPI SUBSYSTEM
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M: Grant Likely <grant.likely@secretlab.ca>
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L: spi-devel-general@lists.sourceforge.net
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@ -84,6 +84,8 @@ config PINCTRL_COH901
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COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
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ports of 8 GPIO pins each.
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source "drivers/pinctrl/spear/Kconfig"
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endmenu
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endif
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@ -16,3 +16,5 @@ obj-$(CONFIG_PINCTRL_TEGRA20) += pinctrl-tegra20.o
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obj-$(CONFIG_PINCTRL_TEGRA30) += pinctrl-tegra30.o
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obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
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obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
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obj-$(CONFIG_PLAT_SPEAR) += spear/
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@ -0,0 +1,14 @@
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#
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# ST Microelectronics SPEAr PINCTRL drivers
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#
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if PLAT_SPEAR
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config PINCTRL_SPEAR
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bool
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depends on OF
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select PINMUX
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help
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This enables pin control drivers for SPEAr Platform
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endif
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@ -0,0 +1,3 @@
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# SPEAr pinmux support
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obj-$(CONFIG_PINCTRL_SPEAR) += pinctrl-spear.o
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@ -0,0 +1,354 @@
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/*
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* Driver for the ST Microelectronics SPEAr pinmux
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*
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* Copyright (C) 2012 ST Microelectronics
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* Viresh Kumar <viresh.kumar@st.com>
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*
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* Inspired from:
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* - U300 Pinctl drivers
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* - Tegra Pinctl drivers
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "pinctrl-spear.h"
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#define DRIVER_NAME "spear-pinmux"
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static inline u32 pmx_readl(struct spear_pmx *pmx, u32 reg)
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{
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return readl_relaxed(pmx->vbase + reg);
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}
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static inline void pmx_writel(struct spear_pmx *pmx, u32 val, u32 reg)
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{
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writel_relaxed(val, pmx->vbase + reg);
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}
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static int set_mode(struct spear_pmx *pmx, int mode)
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{
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struct spear_pmx_mode *pmx_mode = NULL;
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int i;
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u32 val;
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if (!pmx->machdata->pmx_modes || !pmx->machdata->npmx_modes)
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return -EINVAL;
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for (i = 0; i < pmx->machdata->npmx_modes; i++) {
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if (pmx->machdata->pmx_modes[i]->mode == (1 << mode)) {
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pmx_mode = pmx->machdata->pmx_modes[i];
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break;
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}
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}
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if (!pmx_mode)
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return -EINVAL;
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val = pmx_readl(pmx, pmx_mode->reg);
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val &= ~pmx_mode->mask;
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val |= pmx_mode->val;
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pmx_writel(pmx, val, pmx_mode->reg);
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pmx->machdata->mode = pmx_mode->mode;
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dev_info(pmx->dev, "Configured Mode: %s with id: %x\n\n",
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pmx_mode->name ? pmx_mode->name : "no_name",
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pmx_mode->reg);
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return 0;
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}
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void __devinit pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg)
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{
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struct spear_pingroup *pgroup;
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struct spear_modemux *modemux;
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int i, j, group;
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for (group = 0; group < machdata->ngroups; group++) {
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pgroup = machdata->groups[group];
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for (i = 0; i < pgroup->nmodemuxs; i++) {
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modemux = &pgroup->modemuxs[i];
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for (j = 0; j < modemux->nmuxregs; j++)
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if (modemux->muxregs[j].reg == 0xFFFF)
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modemux->muxregs[j].reg = reg;
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}
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}
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}
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static int spear_pinctrl_get_groups_cnt(struct pinctrl_dev *pctldev)
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{
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struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->machdata->ngroups;
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}
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static const char *spear_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
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unsigned group)
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{
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struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->machdata->groups[group]->name;
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}
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static int spear_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned group, const unsigned **pins, unsigned *num_pins)
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{
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struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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*pins = pmx->machdata->groups[group]->pins;
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*num_pins = pmx->machdata->groups[group]->npins;
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return 0;
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}
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static void spear_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned offset)
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{
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seq_printf(s, " " DRIVER_NAME);
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}
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int spear_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np_config,
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struct pinctrl_map **map, unsigned *num_maps)
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{
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struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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struct device_node *np;
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struct property *prop;
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const char *function, *group;
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int ret, index = 0, count = 0;
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/* calculate number of maps required */
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for_each_child_of_node(np_config, np) {
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ret = of_property_read_string(np, "st,function", &function);
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if (ret < 0)
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return ret;
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ret = of_property_count_strings(np, "st,pins");
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if (ret < 0)
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return ret;
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count += ret;
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}
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if (!count) {
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dev_err(pmx->dev, "No child nodes passed via DT\n");
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return -ENODEV;
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}
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*map = kzalloc(sizeof(**map) * count, GFP_KERNEL);
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if (!*map)
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return -ENOMEM;
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for_each_child_of_node(np_config, np) {
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of_property_read_string(np, "st,function", &function);
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of_property_for_each_string(np, "st,pins", prop, group) {
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(*map)[index].type = PIN_MAP_TYPE_MUX_GROUP;
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(*map)[index].data.mux.group = group;
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(*map)[index].data.mux.function = function;
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index++;
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}
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}
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*num_maps = count;
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return 0;
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}
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void spear_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *map, unsigned num_maps)
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{
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kfree(map);
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}
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static struct pinctrl_ops spear_pinctrl_ops = {
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.get_groups_count = spear_pinctrl_get_groups_cnt,
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.get_group_name = spear_pinctrl_get_group_name,
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.get_group_pins = spear_pinctrl_get_group_pins,
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.pin_dbg_show = spear_pinctrl_pin_dbg_show,
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.dt_node_to_map = spear_pinctrl_dt_node_to_map,
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.dt_free_map = spear_pinctrl_dt_free_map,
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};
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static int spear_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
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{
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struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->machdata->nfunctions;
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}
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static const char *spear_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
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unsigned function)
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{
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struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->machdata->functions[function]->name;
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}
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static int spear_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
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unsigned function, const char *const **groups,
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unsigned * const ngroups)
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{
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struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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*groups = pmx->machdata->functions[function]->groups;
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*ngroups = pmx->machdata->functions[function]->ngroups;
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return 0;
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}
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static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev,
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unsigned function, unsigned group, bool enable)
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{
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struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
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const struct spear_pingroup *pgroup;
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const struct spear_modemux *modemux;
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struct spear_muxreg *muxreg;
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u32 val, temp;
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int i, j;
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bool found = false;
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pgroup = pmx->machdata->groups[group];
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for (i = 0; i < pgroup->nmodemuxs; i++) {
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modemux = &pgroup->modemuxs[i];
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/* SoC have any modes */
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if (pmx->machdata->modes_supported) {
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if (!(pmx->machdata->mode & modemux->modes))
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continue;
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}
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found = true;
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for (j = 0; j < modemux->nmuxregs; j++) {
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muxreg = &modemux->muxregs[j];
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val = pmx_readl(pmx, muxreg->reg);
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val &= ~muxreg->mask;
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if (enable)
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temp = muxreg->val;
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else
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temp = ~muxreg->val;
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val |= temp;
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pmx_writel(pmx, val, muxreg->reg);
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}
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}
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if (!found) {
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dev_err(pmx->dev, "pinmux group: %s not supported\n",
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pgroup->name);
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return -ENODEV;
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}
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return 0;
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}
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static int spear_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned function,
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unsigned group)
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{
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return spear_pinctrl_endisable(pctldev, function, group, true);
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}
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static void spear_pinctrl_disable(struct pinctrl_dev *pctldev,
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unsigned function, unsigned group)
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{
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spear_pinctrl_endisable(pctldev, function, group, false);
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}
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static struct pinmux_ops spear_pinmux_ops = {
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.get_functions_count = spear_pinctrl_get_funcs_count,
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.get_function_name = spear_pinctrl_get_func_name,
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.get_function_groups = spear_pinctrl_get_func_groups,
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.enable = spear_pinctrl_enable,
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.disable = spear_pinctrl_disable,
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};
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static struct pinctrl_desc spear_pinctrl_desc = {
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.name = DRIVER_NAME,
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.pctlops = &spear_pinctrl_ops,
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.pmxops = &spear_pinmux_ops,
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.owner = THIS_MODULE,
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};
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int __devinit spear_pinctrl_probe(struct platform_device *pdev,
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struct spear_pinctrl_machdata *machdata)
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{
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struct device_node *np = pdev->dev.of_node;
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struct resource *res;
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struct spear_pmx *pmx;
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if (!machdata)
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return -ENODEV;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -EINVAL;
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pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
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if (!pmx) {
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dev_err(&pdev->dev, "Can't alloc spear_pmx\n");
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return -ENOMEM;
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}
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pmx->vbase = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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if (!pmx->vbase) {
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dev_err(&pdev->dev, "Couldn't ioremap at index 0\n");
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return -ENODEV;
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}
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pmx->dev = &pdev->dev;
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pmx->machdata = machdata;
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/* configure mode, if supported by SoC */
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if (machdata->modes_supported) {
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int mode = 0;
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if (of_property_read_u32(np, "st,pinmux-mode", &mode)) {
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dev_err(&pdev->dev, "OF: pinmux mode not passed\n");
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return -EINVAL;
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}
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if (set_mode(pmx, mode)) {
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dev_err(&pdev->dev, "OF: Couldn't configure mode: %x\n",
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mode);
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return -EINVAL;
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}
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}
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platform_set_drvdata(pdev, pmx);
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spear_pinctrl_desc.pins = machdata->pins;
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spear_pinctrl_desc.npins = machdata->npins;
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pmx->pctl = pinctrl_register(&spear_pinctrl_desc, &pdev->dev, pmx);
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if (IS_ERR(pmx->pctl)) {
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dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
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return PTR_ERR(pmx->pctl);
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}
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return 0;
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}
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int __devexit spear_pinctrl_remove(struct platform_device *pdev)
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{
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struct spear_pmx *pmx = platform_get_drvdata(pdev);
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pinctrl_unregister(pmx->pctl);
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return 0;
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}
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@ -0,0 +1,142 @@
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/*
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* Driver header file for the ST Microelectronics SPEAr pinmux
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*
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* Copyright (C) 2012 ST Microelectronics
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* Viresh Kumar <viresh.kumar@st.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __PINMUX_SPEAR_H__
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#define __PINMUX_SPEAR_H__
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/types.h>
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struct platform_device;
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struct device;
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/**
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* struct spear_pmx_mode - SPEAr pmx mode
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* @name: name of pmx mode
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* @mode: mode id
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* @reg: register for configuring this mode
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* @mask: mask of this mode in reg
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* @val: val to be configured at reg after doing (val & mask)
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*/
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struct spear_pmx_mode {
|
||||
const char *const name;
|
||||
u16 mode;
|
||||
u16 reg;
|
||||
u16 mask;
|
||||
u32 val;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct spear_muxreg - SPEAr mux reg configuration
|
||||
* @reg: register offset
|
||||
* @mask: mask bits
|
||||
* @val: val to be written on mask bits
|
||||
*/
|
||||
struct spear_muxreg {
|
||||
u16 reg;
|
||||
u32 mask;
|
||||
u32 val;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct spear_modemux - SPEAr mode mux configuration
|
||||
* @modes: mode ids supported by this group of muxregs
|
||||
* @nmuxregs: number of muxreg configurations to be done for modes
|
||||
* @muxregs: array of muxreg configurations to be done for modes
|
||||
*/
|
||||
struct spear_modemux {
|
||||
u16 modes;
|
||||
u8 nmuxregs;
|
||||
struct spear_muxreg *muxregs;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct spear_pingroup - SPEAr pin group configurations
|
||||
* @name: name of pin group
|
||||
* @pins: array containing pin numbers
|
||||
* @npins: size of pins array
|
||||
* @modemuxs: array of modemux configurations for this pin group
|
||||
* @nmodemuxs: size of array modemuxs
|
||||
*
|
||||
* A representation of a group of pins in the SPEAr pin controller. Each group
|
||||
* allows some parameter or parameters to be configured.
|
||||
*/
|
||||
struct spear_pingroup {
|
||||
const char *name;
|
||||
const unsigned *pins;
|
||||
unsigned npins;
|
||||
struct spear_modemux *modemuxs;
|
||||
unsigned nmodemuxs;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct spear_function - SPEAr pinctrl mux function
|
||||
* @name: The name of the function, exported to pinctrl core.
|
||||
* @groups: An array of pin groups that may select this function.
|
||||
* @ngroups: The number of entries in @groups.
|
||||
*/
|
||||
struct spear_function {
|
||||
const char *name;
|
||||
const char *const *groups;
|
||||
unsigned ngroups;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct spear_pinctrl_machdata - SPEAr pin controller machine driver
|
||||
* configuration
|
||||
* @pins: An array describing all pins the pin controller affects.
|
||||
* All pins which are also GPIOs must be listed first within the *array,
|
||||
* and be numbered identically to the GPIO controller's *numbering.
|
||||
* @npins: The numbmer of entries in @pins.
|
||||
* @functions: An array describing all mux functions the SoC supports.
|
||||
* @nfunctions: The numbmer of entries in @functions.
|
||||
* @groups: An array describing all pin groups the pin SoC supports.
|
||||
* @ngroups: The numbmer of entries in @groups.
|
||||
*
|
||||
* @modes_supported: Does SoC support modes
|
||||
* @mode: mode configured from probe
|
||||
* @pmx_modes: array of modes supported by SoC
|
||||
* @npmx_modes: number of entries in pmx_modes.
|
||||
*/
|
||||
struct spear_pinctrl_machdata {
|
||||
const struct pinctrl_pin_desc *pins;
|
||||
unsigned npins;
|
||||
struct spear_function **functions;
|
||||
unsigned nfunctions;
|
||||
struct spear_pingroup **groups;
|
||||
unsigned ngroups;
|
||||
|
||||
bool modes_supported;
|
||||
u16 mode;
|
||||
struct spear_pmx_mode **pmx_modes;
|
||||
unsigned npmx_modes;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct spear_pmx - SPEAr pinctrl mux
|
||||
* @dev: pointer to struct dev of platform_device registered
|
||||
* @pctl: pointer to struct pinctrl_dev
|
||||
* @machdata: pointer to SoC or machine specific structure
|
||||
* @vbase: virtual base address of pinmux controller
|
||||
*/
|
||||
struct spear_pmx {
|
||||
struct device *dev;
|
||||
struct pinctrl_dev *pctl;
|
||||
struct spear_pinctrl_machdata *machdata;
|
||||
void __iomem *vbase;
|
||||
};
|
||||
|
||||
/* exported routines */
|
||||
void __devinit pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg);
|
||||
int __devinit spear_pinctrl_probe(struct platform_device *pdev,
|
||||
struct spear_pinctrl_machdata *machdata);
|
||||
int __devexit spear_pinctrl_remove(struct platform_device *pdev);
|
||||
#endif /* __PINMUX_SPEAR_H__ */
|
||||
Reference in New Issue