From ddfd2da48421e6b217e8b4fa7ec967e55555ce65 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 11 Dec 2011 01:31:17 +1000 Subject: [PATCH] drm/nouveau: memory type detection for the really old chipsets Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nv04_fb.c | 5 +++++ drivers/gpu/drm/nouveau/nv10_fb.c | 8 ++++++++ 2 files changed, 13 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nv04_fb.c b/drivers/gpu/drm/nouveau/nv04_fb.c index db16c47fd92..d5eedd67afe 100644 --- a/drivers/gpu/drm/nouveau/nv04_fb.c +++ b/drivers/gpu/drm/nouveau/nv04_fb.c @@ -29,6 +29,11 @@ nv04_fb_vram_init(struct drm_device *dev) } } + if ((boot0 & 0x00000038) <= 0x10) + dev_priv->vram_type = NV_MEM_TYPE_SGRAM; + else + dev_priv->vram_type = NV_MEM_TYPE_SDRAM; + return 0; } diff --git a/drivers/gpu/drm/nouveau/nv10_fb.c b/drivers/gpu/drm/nouveau/nv10_fb.c index 7b17dea5f62..447d6f23652 100644 --- a/drivers/gpu/drm/nouveau/nv10_fb.c +++ b/drivers/gpu/drm/nouveau/nv10_fb.c @@ -35,6 +35,14 @@ nv10_fb_vram_init(struct drm_device *dev) u32 fifo_data = nv_rd32(dev, NV04_PFB_FIFO_DATA); dev_priv->vram_size = fifo_data & NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK; + if (dev_priv->card_type < NV_20) { + u32 cfg0 = nv_rd32(dev, 0x100200); + if (cfg0 & 0x00000001) + dev_priv->vram_type = NV_MEM_TYPE_DDR1; + else + dev_priv->vram_type = NV_MEM_TYPE_SDRAM; + } + return 0; }