x86: move apic declarations to mach_apic.h
take them out of the x86_64-specific asm/mach_apic.h Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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ab68ed98f6
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dd46e3ca73
6 changed files with 52 additions and 69 deletions
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@ -34,7 +34,6 @@
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#include <asm/mpspec.h>
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#include <asm/mpspec.h>
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#include <asm/hpet.h>
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#include <asm/hpet.h>
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#include <asm/pgalloc.h>
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#include <asm/pgalloc.h>
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#include <asm/mach_apic.h>
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#include <asm/nmi.h>
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#include <asm/nmi.h>
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#include <asm/idle.h>
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#include <asm/idle.h>
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#include <asm/proto.h>
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#include <asm/proto.h>
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@ -42,6 +41,7 @@
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#include <asm/apic.h>
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#include <asm/apic.h>
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#include <mach_ipi.h>
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#include <mach_ipi.h>
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#include <mach_apic.h>
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int disable_apic_timer __cpuinitdata;
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int disable_apic_timer __cpuinitdata;
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static int apic_calibrate_pmtmr __initdata;
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static int apic_calibrate_pmtmr __initdata;
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@ -4,8 +4,8 @@
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/processor.h>
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#include <asm/apic.h>
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#include <asm/apic.h>
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#include <asm/mach_apic.h>
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#include <mach_apic.h>
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#include "cpu.h"
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#include "cpu.h"
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/*
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/*
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@ -43,7 +43,6 @@
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#include <asm/smp.h>
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#include <asm/smp.h>
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#include <asm/desc.h>
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#include <asm/desc.h>
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#include <asm/proto.h>
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#include <asm/proto.h>
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#include <asm/mach_apic.h>
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#include <asm/acpi.h>
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#include <asm/acpi.h>
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#include <asm/dma.h>
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#include <asm/dma.h>
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#include <asm/nmi.h>
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#include <asm/nmi.h>
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@ -51,6 +50,7 @@
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#include <asm/hypertransport.h>
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#include <asm/hypertransport.h>
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#include <mach_ipi.h>
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#include <mach_ipi.h>
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#include <mach_apic.h>
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struct irq_cfg {
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struct irq_cfg {
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cpumask_t domain;
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cpumask_t domain;
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@ -58,7 +58,6 @@
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#include <asm/mmu_context.h>
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#include <asm/mmu_context.h>
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#include <asm/proto.h>
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#include <asm/proto.h>
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#include <asm/setup.h>
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#include <asm/setup.h>
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#include <asm/mach_apic.h>
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#include <asm/numa.h>
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#include <asm/numa.h>
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#include <asm/sections.h>
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#include <asm/sections.h>
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#include <asm/dmi.h>
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#include <asm/dmi.h>
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@ -67,6 +66,7 @@
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#include <asm/ds.h>
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#include <asm/ds.h>
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#include <asm/topology.h>
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#include <asm/topology.h>
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#include <mach_apic.h>
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#ifdef CONFIG_PARAVIRT
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#ifdef CONFIG_PARAVIRT
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#include <asm/paravirt.h>
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#include <asm/paravirt.h>
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#else
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#else
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@ -1,6 +1,8 @@
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#ifndef __ASM_MACH_APIC_H
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#ifndef __ASM_MACH_APIC_H
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#define __ASM_MACH_APIC_H
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#define __ASM_MACH_APIC_H
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#ifdef CONFIG_X86_LOCAL_APIC
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#include <mach_apicdef.h>
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#include <mach_apicdef.h>
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#include <asm/smp.h>
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#include <asm/smp.h>
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@ -14,24 +16,25 @@ static inline cpumask_t target_cpus(void)
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return cpumask_of_cpu(0);
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return cpumask_of_cpu(0);
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#endif
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#endif
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}
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}
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#define TARGET_CPUS (target_cpus())
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#define NO_BALANCE_IRQ (0)
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#define NO_BALANCE_IRQ (0)
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#define esr_disable (0)
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#define esr_disable (0)
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#ifdef CONFIG_X86_64
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#include <asm/genapic.h>
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#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
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#define INT_DEST_MODE (genapic->int_dest_mode)
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#define TARGET_CPUS (genapic->target_cpus())
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#define apic_id_registered (genapic->apic_id_registered)
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#define init_apic_ldr (genapic->init_apic_ldr)
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#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
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#define phys_pkg_id (genapic->phys_pkg_id)
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#define vector_allocation_domain (genapic->vector_allocation_domain)
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extern void setup_apic_routing(void);
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#else
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#define INT_DELIVERY_MODE dest_LowestPrio
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#define INT_DELIVERY_MODE dest_LowestPrio
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#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
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#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
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#define TARGET_CPUS (target_cpus())
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static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
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{
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return physid_isset(apicid, bitmap);
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}
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static inline unsigned long check_apicid_present(int bit)
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{
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return physid_isset(bit, phys_cpu_present_map);
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}
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/*
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/*
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* Set up the logical destination ID.
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* Set up the logical destination ID.
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*
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*
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@ -49,33 +52,53 @@ static inline void init_apic_ldr(void)
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apic_write_around(APIC_LDR, val);
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apic_write_around(APIC_LDR, val);
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}
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}
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static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
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static inline int apic_id_registered(void)
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{
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{
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return phys_map;
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return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
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}
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static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
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{
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return cpus_addr(cpumask)[0];
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}
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static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
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{
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return cpuid_apic >> index_msb;
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}
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}
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#ifdef CONFIG_X86_64
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extern void setup_apic_routing(void);
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#else
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static inline void setup_apic_routing(void)
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static inline void setup_apic_routing(void)
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{
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{
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printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
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printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
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"Flat", nr_ioapics);
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"Flat", nr_ioapics);
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}
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}
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#endif
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static inline int multi_timer_check(int apic, int irq)
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{
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return 0;
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}
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#ifdef CONFIG_X86_32
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static inline int apicid_to_node(int logical_apicid)
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static inline int apicid_to_node(int logical_apicid)
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{
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{
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return 0;
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return 0;
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}
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}
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#endif
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#endif
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static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
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{
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return physid_isset(apicid, bitmap);
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}
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static inline unsigned long check_apicid_present(int bit)
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{
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return physid_isset(bit, phys_cpu_present_map);
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}
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static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
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{
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return phys_map;
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}
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static inline int multi_timer_check(int apic, int irq)
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{
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return 0;
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}
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/* Mapping from cpu number to logical apicid */
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/* Mapping from cpu number to logical apicid */
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static inline int cpu_to_logical_apicid(int cpu)
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static inline int cpu_to_logical_apicid(int cpu)
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{
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{
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@ -109,23 +132,9 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
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return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
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return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
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}
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}
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static inline int apic_id_registered(void)
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{
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return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
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}
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static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
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{
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return cpus_addr(cpumask)[0];
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}
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static inline void enable_apic_mode(void)
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static inline void enable_apic_mode(void)
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{
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{
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}
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}
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static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
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#endif /* CONFIG_X86_LOCAL_APIC */
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{
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return cpuid_apic >> index_msb;
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}
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#endif /* __ASM_MACH_APIC_H */
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#endif /* __ASM_MACH_APIC_H */
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#ifndef __ASM_MACH_APIC_H
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#define __ASM_MACH_APIC_H
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/*
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* Copyright 2004 James Cleverdon, IBM.
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* Subject to the GNU Public License, v.2
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*
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* Generic APIC sub-arch defines.
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*
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* Hacked for x86-64 by James Cleverdon from i386 architecture code by
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* Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
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* James Cleverdon.
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*/
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#include <asm/genapic.h>
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#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
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#define INT_DEST_MODE (genapic->int_dest_mode)
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#define TARGET_CPUS (genapic->target_cpus())
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#define vector_allocation_domain (genapic->vector_allocation_domain)
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#define apic_id_registered (genapic->apic_id_registered)
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#define init_apic_ldr (genapic->init_apic_ldr)
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#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
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#define phys_pkg_id (genapic->phys_pkg_id)
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#endif /* __ASM_MACH_APIC_H */
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