wireless: Remove unnecessary ; from while (0) macros
Semicolons are not necessary after macros that end in while (0).
Remove them.
Simplify the macros with tests of
do { if (foo>size) memset1; else memset2;} while (0);
to a single line memset(,,min_t(size_t, foo, size))
Signed-off-by: Joe Perches <joe@perches.com>
Acked-by: Arend van Spriel <arend@broadcom.com>
Acked-by: Larry Finger <Larry.Finger@lwfinger.net>
Acked-by: Bing Zhao <bzhao@marvell.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Joe Perches
John W. Linville
parent
150721894e
commit
da951c2417
|
|
@ -114,7 +114,7 @@ __regwrite_out : \
|
|||
|
||||
#define carl9170_regwrite_result() \
|
||||
__err; \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
|
||||
#define carl9170_async_regwrite_get_buf() \
|
||||
|
|
@ -126,7 +126,7 @@ do { \
|
|||
__err = -ENOMEM; \
|
||||
goto __async_regwrite_out; \
|
||||
} \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
#define carl9170_async_regwrite_begin(carl) \
|
||||
do { \
|
||||
|
|
@ -169,6 +169,6 @@ __async_regwrite_out: \
|
|||
|
||||
#define carl9170_async_regwrite_result() \
|
||||
__err; \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
#endif /* __CMD_H */
|
||||
|
|
|
|||
|
|
@ -733,7 +733,7 @@ struct cck_phy_hdr {
|
|||
do { \
|
||||
plcp[1] = len & 0xff; \
|
||||
plcp[2] = ((len >> 8) & 0xff); \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
#define BRCMS_SET_MIMO_PLCP_AMPDU(plcp) (plcp[3] |= MIMO_PLCP_AMPDU)
|
||||
#define BRCMS_CLR_MIMO_PLCP_AMPDU(plcp) (plcp[3] &= ~MIMO_PLCP_AMPDU)
|
||||
|
|
|
|||
|
|
@ -193,7 +193,7 @@
|
|||
a->mpa_tx.ports |= (1<<(a->mpa_tx.pkt_cnt+1+(MAX_PORT - \
|
||||
a->mp_end_port))); \
|
||||
a->mpa_tx.pkt_cnt++; \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
/* SDIO Tx aggregation limit ? */
|
||||
#define MP_TX_AGGR_PKT_LIMIT_REACHED(a) \
|
||||
|
|
@ -211,7 +211,7 @@
|
|||
a->mpa_tx.buf_len = 0; \
|
||||
a->mpa_tx.ports = 0; \
|
||||
a->mpa_tx.start_port = 0; \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
/* SDIO Rx aggregation limit ? */
|
||||
#define MP_RX_AGGR_PKT_LIMIT_REACHED(a) \
|
||||
|
|
@ -242,7 +242,7 @@
|
|||
a->mpa_rx.skb_arr[a->mpa_rx.pkt_cnt] = skb; \
|
||||
a->mpa_rx.len_arr[a->mpa_rx.pkt_cnt] = skb->len; \
|
||||
a->mpa_rx.pkt_cnt++; \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
/* Reset SDIO Rx aggregation buffer parameters */
|
||||
#define MP_RX_AGGR_BUF_RESET(a) do { \
|
||||
|
|
@ -250,7 +250,7 @@
|
|||
a->mpa_rx.buf_len = 0; \
|
||||
a->mpa_rx.ports = 0; \
|
||||
a->mpa_rx.start_port = 0; \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
|
||||
/* data structure for SDIO MPA TX */
|
||||
|
|
|
|||
|
|
@ -530,12 +530,7 @@
|
|||
SET_BITS_OFFSET_LE(__pdesc+28, 0, 32, __val)
|
||||
|
||||
#define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
|
||||
do { \
|
||||
if (_size > TX_DESC_NEXT_DESC_OFFSET) \
|
||||
memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \
|
||||
else \
|
||||
memset(__pdesc, 0, _size); \
|
||||
} while (0);
|
||||
memset(__pdesc, 0, min_t(size_t, _size, TX_DESC_NEXT_DESC_OFFSET))
|
||||
|
||||
struct rx_fwinfo_92c {
|
||||
u8 gain_trsw[4];
|
||||
|
|
|
|||
|
|
@ -530,12 +530,8 @@
|
|||
SET_BITS_OFFSET_LE(__pdesc+28, 0, 32, __val)
|
||||
|
||||
#define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
|
||||
do { \
|
||||
if (_size > TX_DESC_NEXT_DESC_OFFSET) \
|
||||
memset((void *)__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \
|
||||
else \
|
||||
memset((void *)__pdesc, 0, _size); \
|
||||
} while (0);
|
||||
memset((void *)__pdesc, 0, \
|
||||
min_t(size_t, _size, TX_DESC_NEXT_DESC_OFFSET))
|
||||
|
||||
/* For 92D early mode */
|
||||
#define SET_EARLYMODE_PKTNUM(__paddr, __value) \
|
||||
|
|
|
|||
|
|
@ -252,12 +252,7 @@
|
|||
* the desc is cleared. */
|
||||
#define TX_DESC_NEXT_DESC_OFFSET 36
|
||||
#define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
|
||||
do { \
|
||||
if (_size > TX_DESC_NEXT_DESC_OFFSET) \
|
||||
memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET); \
|
||||
else \
|
||||
memset(__pdesc, 0, _size); \
|
||||
} while (0);
|
||||
memset(__pdesc, 0, min_t(size_t, _size, TX_DESC_NEXT_DESC_OFFSET))
|
||||
|
||||
/* Rx Desc */
|
||||
#define RX_STATUS_DESC_SIZE 24
|
||||
|
|
|
|||
|
|
@ -345,7 +345,7 @@ enum fw_h2c_cmd {
|
|||
do { \
|
||||
udelay(1000); \
|
||||
rtlpriv->rtlhal.fwcmd_iomap &= (~_Bit); \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
#define FW_CMD_IO_UPDATE(rtlpriv, _val) \
|
||||
rtlpriv->rtlhal.fwcmd_iomap = _val;
|
||||
|
|
@ -354,13 +354,13 @@ enum fw_h2c_cmd {
|
|||
do { \
|
||||
rtl_write_word(rtlpriv, LBUS_MON_ADDR, (u16)_val); \
|
||||
FW_CMD_IO_UPDATE(rtlpriv, _val); \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
#define FW_CMD_PARA_SET(rtlpriv, _val) \
|
||||
do { \
|
||||
rtl_write_dword(rtlpriv, LBUS_ADDR_MASK, _val); \
|
||||
rtlpriv->rtlhal.fwcmd_ioparam = _val; \
|
||||
} while (0);
|
||||
} while (0)
|
||||
|
||||
#define FW_CMD_IO_QUERY(rtlpriv) \
|
||||
(u16)(rtlpriv->rtlhal.fwcmd_iomap)
|
||||
|
|
|
|||
Reference in New Issue