sh: oprofile: Convert op_model_sh7750 to new common interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
parent
40a8b421b6
commit
d9341b51f2
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@ -3,7 +3,7 @@
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*
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* OProfile support for SH7750/SH7750S Performance Counters
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*
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* Copyright (C) 2003, 2004 Paul Mundt
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* Copyright (C) 2003 - 2008 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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@ -15,19 +15,16 @@
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/fs.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include "op_impl.h"
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#define PM_CR_BASE 0xff000084 /* 16-bit */
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#define PM_CTR_BASE 0xff100004 /* 32-bit */
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#define PMCR1 (PM_CR_BASE + 0x00)
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#define PMCR2 (PM_CR_BASE + 0x04)
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#define PMCTR1H (PM_CTR_BASE + 0x00)
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#define PMCTR1L (PM_CTR_BASE + 0x04)
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#define PMCTR2H (PM_CTR_BASE + 0x08)
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#define PMCTR2L (PM_CTR_BASE + 0x0c)
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#define PMCR(n) (PM_CR_BASE + ((n) * 0x04))
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#define PMCTRH(n) (PM_CTR_BASE + 0x00 + ((n) * 0x08))
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#define PMCTRL(n) (PM_CTR_BASE + 0x04 + ((n) * 0x08))
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#define PMCR_PMM_MASK 0x0000003f
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@ -36,25 +33,15 @@
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#define PMCR_PMST 0x00004000
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#define PMCR_PMEN 0x00008000
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#define PMCR_ENABLE (PMCR_PMST | PMCR_PMEN)
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struct op_sh_model op_model_sh7750_ops;
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/*
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* SH7750/SH7750S have 2 perf counters
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*/
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#define NR_CNTRS 2
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struct op_counter_config {
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unsigned long enabled;
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unsigned long event;
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unsigned long count;
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/* Dummy values for userspace tool compliance */
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unsigned long kernel;
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unsigned long user;
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unsigned long unit_mask;
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};
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static struct op_counter_config ctr[NR_CNTRS];
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static struct sh7750_ppc_register_config {
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unsigned int ctrl;
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unsigned long cnt_hi;
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unsigned long cnt_lo;
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} regcache[NR_CNTRS];
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/*
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* There are a number of events supported by each counter (33 in total).
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@ -116,12 +103,8 @@ static int sh7750_timer_notify(struct pt_regs *regs)
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static u64 sh7750_read_counter(int counter)
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{
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u32 hi, lo;
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hi = (counter == 0) ? ctrl_inl(PMCTR1H) : ctrl_inl(PMCTR2H);
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lo = (counter == 0) ? ctrl_inl(PMCTR1L) : ctrl_inl(PMCTR2L);
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return (u64)((u64)(hi & 0xffff) << 32) | lo;
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return (u64)((u64)(__raw_readl(PMCTRH(counter)) & 0xffff) << 32) |
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__raw_readl(PMCTRL(counter));
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}
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/*
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@ -170,11 +153,7 @@ static ssize_t sh7750_write_count(struct file *file, const char __user *buf,
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*/
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WARN_ON(val != 0);
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if (counter == 0) {
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ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1);
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} else {
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ctrl_outw(ctrl_inw(PMCR2) | PMCR_PMCLR, PMCR2);
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}
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__raw_writew(__raw_readw(PMCR(counter)) | PMCR_PMCLR, PMCR(counter));
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return count;
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}
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@ -184,88 +163,93 @@ static const struct file_operations count_fops = {
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.write = sh7750_write_count,
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};
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static int sh7750_perf_counter_create_files(struct super_block *sb, struct dentry *root)
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static int sh7750_ppc_create_files(struct super_block *sb, struct dentry *dir)
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{
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int i;
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for (i = 0; i < NR_CNTRS; i++) {
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struct dentry *dir;
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char buf[4];
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snprintf(buf, sizeof(buf), "%d", i);
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dir = oprofilefs_mkdir(sb, root, buf);
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oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
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oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
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oprofilefs_create_file(sb, dir, "count", &count_fops);
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/* Dummy entries */
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oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
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oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
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oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
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}
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return 0;
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return oprofilefs_create_file(sb, dir, "count", &count_fops);
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}
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static int sh7750_perf_counter_start(void)
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static void sh7750_ppc_reg_setup(struct op_counter_config *ctr)
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{
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u16 pmcr;
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unsigned int counters = op_model_sh7750_ops.num_counters;
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int i;
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/* Enable counter 1 */
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if (ctr[0].enabled) {
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pmcr = ctrl_inw(PMCR1);
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WARN_ON(pmcr & PMCR_PMEN);
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for (i = 0; i < counters; i++) {
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regcache[i].ctrl = 0;
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regcache[i].cnt_hi = 0;
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regcache[i].cnt_lo = 0;
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pmcr &= ~PMCR_PMM_MASK;
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pmcr |= ctr[0].event;
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ctrl_outw(pmcr | PMCR_ENABLE, PMCR1);
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if (!ctr[i].enabled)
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continue;
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regcache[i].ctrl |= ctr[i].event | PMCR_PMEN | PMCR_PMST;
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regcache[i].cnt_hi = (unsigned long)((ctr->count >> 32) & 0xffff);
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regcache[i].cnt_lo = (unsigned long)(ctr->count & 0xffffffff);
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}
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}
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/* Enable counter 2 */
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if (ctr[1].enabled) {
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pmcr = ctrl_inw(PMCR2);
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WARN_ON(pmcr & PMCR_PMEN);
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static void sh7750_ppc_cpu_setup(void *args)
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{
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unsigned int counters = op_model_sh7750_ops.num_counters;
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int i;
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pmcr &= ~PMCR_PMM_MASK;
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pmcr |= ctr[1].event;
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ctrl_outw(pmcr | PMCR_ENABLE, PMCR2);
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for (i = 0; i < counters; i++) {
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__raw_writew(0, PMCR(i));
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__raw_writel(regcache[i].cnt_hi, PMCTRH(i));
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__raw_writel(regcache[i].cnt_lo, PMCTRL(i));
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}
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}
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static void sh7750_ppc_cpu_start(void *args)
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{
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unsigned int counters = op_model_sh7750_ops.num_counters;
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int i;
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for (i = 0; i < counters; i++)
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__raw_writew(regcache[i].ctrl, PMCR(i));
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}
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static void sh7750_ppc_cpu_stop(void *args)
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{
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unsigned int counters = op_model_sh7750_ops.num_counters;
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int i;
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/* Disable the counters */
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for (i = 0; i < counters; i++)
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__raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i));
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}
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static inline void sh7750_ppc_reset(void)
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{
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unsigned int counters = op_model_sh7750_ops.num_counters;
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int i;
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/* Clear the counters */
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for (i = 0; i < counters; i++)
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__raw_writew(__raw_readw(PMCR(i)) | PMCR_PMCLR, PMCR(i));
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}
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static int sh7750_ppc_init(void)
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{
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sh7750_ppc_reset();
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return register_timer_hook(sh7750_timer_notify);
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}
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static void sh7750_perf_counter_stop(void)
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static void sh7750_ppc_exit(void)
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{
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ctrl_outw(ctrl_inw(PMCR1) & ~PMCR_PMEN, PMCR1);
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ctrl_outw(ctrl_inw(PMCR2) & ~PMCR_PMEN, PMCR2);
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unregister_timer_hook(sh7750_timer_notify);
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sh7750_ppc_reset();
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}
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static struct oprofile_operations sh7750_perf_counter_ops = {
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.create_files = sh7750_perf_counter_create_files,
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.start = sh7750_perf_counter_start,
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.stop = sh7750_perf_counter_stop,
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struct op_sh_model op_model_sh7750_ops = {
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.cpu_type = "sh/sh7750",
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.num_counters = NR_CNTRS,
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.reg_setup = sh7750_ppc_reg_setup,
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.cpu_setup = sh7750_ppc_cpu_setup,
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.cpu_start = sh7750_ppc_cpu_start,
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.cpu_stop = sh7750_ppc_cpu_stop,
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.init = sh7750_ppc_init,
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.exit = sh7750_ppc_exit,
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.create_files = sh7750_ppc_create_files,
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};
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int __init oprofile_arch_init(struct oprofile_operations *ops)
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{
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if (!(current_cpu_data.flags & CPU_HAS_PERF_COUNTER))
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return -ENODEV;
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ops = &sh7750_perf_counter_ops;
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ops->cpu_type = "sh/sh7750";
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printk(KERN_INFO "oprofile: using SH-4 performance monitoring.\n");
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/* Clear the counters */
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ctrl_outw(ctrl_inw(PMCR1) | PMCR_PMCLR, PMCR1);
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ctrl_outw(ctrl_inw(PMCR2) | PMCR_PMCLR, PMCR2);
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return 0;
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}
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void oprofile_arch_exit(void)
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{
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}
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