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[ARM] 4721/1: S3C24XX: Ensure watchdog clock is enbaled for hard reset

If the hard reset routine is using the watchdog, then
ensure that the clock for the watchdog has been enabled
before we try and issue a reset.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Ben Dooks 2007-12-23 03:09:31 +01:00 committed by Russell King
parent cf08167c82
commit d652074ebc
1 changed files with 11 additions and 0 deletions

View File

@ -20,6 +20,9 @@
#include <asm/plat-s3c/regs-watchdog.h>
#include <asm/arch/regs-clock.h>
#include <linux/clk.h>
#include <linux/err.h>
void (*s3c24xx_idle)(void);
void (*s3c24xx_reset_hook)(void);
@ -59,6 +62,8 @@ static void arch_idle(void)
static void
arch_reset(char mode)
{
struct clk *wdtclk;
if (mode == 's') {
cpu_reset(0);
}
@ -70,6 +75,12 @@ arch_reset(char mode)
__raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
wdtclk = clk_get(NULL, "watchdog");
if (!IS_ERR(wdtclk)) {
clk_enable(wdtclk);
} else
printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
/* put initial values into count and data */
__raw_writel(0x100, S3C2410_WTCNT);
__raw_writel(0x100, S3C2410_WTDAT);