Staging: comedi: adv_pci_dio: Support Advantech PCI-1735U
Add support for the Advantech PCI-1735U card, including support for a counter subdevice (based on an 82C54 counter timer chip). The counter subdevice needs more testing, as the only person I know who tried it couldn't get it to work! Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Ian Abbott
Greg Kroah-Hartman
parent
b2e68b00d5
commit
d4da77a73c
1 changed files with 169 additions and 11 deletions
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@ -7,17 +7,17 @@
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*/
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/*
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Driver: adv_pci_dio
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Description: Advantech PCI-1730, PCI-1733, PCI-1734, PCI-1736UP,
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PCI-1750, PCI-1751, PCI-1752, PCI-1753/E, PCI-1754,
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PCI-1756, PCI-1762
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Description: Advantech PCI-1730, PCI-1733, PCI-1734, PCI-1735U,
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PCI-1736UP, PCI-1750, PCI-1751, PCI-1752, PCI-1753/E,
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PCI-1754, PCI-1756, PCI-1762
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Author: Michal Dobes <dobes@tesnet.cz>
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Devices: [Advantech] PCI-1730 (adv_pci_dio), PCI-1733,
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PCI-1734, PCI-1736UP, PCI-1750,
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PCI-1734, PCI-1735U, PCI-1736UP, PCI-1750,
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PCI-1751, PCI-1752, PCI-1753,
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PCI-1753+PCI-1753E, PCI-1754, PCI-1756,
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PCI-1760, PCI-1762
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Status: untested
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Updated: Mon, 14 Apr 2008 10:43:08 +0100
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Updated: Tue, 04 May 2010 13:00:00 +0000
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This driver supports now only insn interface for DI/DO/DIO.
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@ -35,6 +35,7 @@ Configuration options:
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#include "comedi_pci.h"
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#include "8255.h"
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#include "8253.h"
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#undef PCI_DIO_EXTDEBUG /* if defined, enable extensive debug logging */
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@ -49,7 +50,7 @@ Configuration options:
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/* hardware types of the cards */
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enum hw_cards_id {
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TYPE_PCI1730, TYPE_PCI1733, TYPE_PCI1734, TYPE_PCI1736,
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TYPE_PCI1730, TYPE_PCI1733, TYPE_PCI1734, TYPE_PCI1735, TYPE_PCI1736,
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TYPE_PCI1750,
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TYPE_PCI1751,
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TYPE_PCI1752,
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@ -67,7 +68,10 @@ enum hw_io_access {
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#define MAX_DI_SUBDEVS 2 /* max number of DI subdevices per card */
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#define MAX_DO_SUBDEVS 2 /* max number of DO subdevices per card */
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#define MAX_DIO_SUBDEVG 2 /* max number of DIO subdevices group per card */
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#define MAX_8254_SUBDEVS 1 /* max number of 8254 counter subdevs per card */
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/* (could be more than one 8254 per subdevice) */
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#define SIZE_8254 4 /* 8254 IO space length */
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#define SIZE_8255 4 /* 8255 IO space length */
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#define PCIDIO_MAINREG 2 /* main I/O region for all Advantech cards? */
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@ -85,6 +89,12 @@ enum hw_io_access {
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#define PCI1734_IDO 0 /* W: Isolated digital output 0-31 */
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#define PCI173x_BOARDID 4 /* R: Board I/D switch for 1730/3/4 */
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/* Advantech PCI-1735U */
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#define PCI1735_DI 0 /* R: Digital input 0-31 */
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#define PCI1735_DO 0 /* W: Digital output 0-31 */
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#define PCI1735_C8254 4 /* R/W: 8254 counter */
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#define PCI1735_BOARDID 8 /* R: Board I/D switch for 1735U */
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/* Advantech PCI-1736UP */
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#define PCI1736_IDI 0 /* R: Isolated digital input 0-15 */
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#define PCI1736_IDO 0 /* W: Isolated digital output 0-15 */
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@ -192,7 +202,8 @@ static int pci_dio_detach(struct comedi_device *dev);
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struct diosubd_data {
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int chans; /* num of chans */
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int addr; /* PCI address ofset */
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int regs; /* number of registers to read or 8255 subdevices */
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int regs; /* number of registers to read or 8255
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subdevices or 8254 chips */
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unsigned int specflags; /* addon subdevice flags */
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};
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@ -206,6 +217,7 @@ struct dio_boardtype {
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struct diosubd_data sdo[MAX_DO_SUBDEVS]; /* DO chans */
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struct diosubd_data sdio[MAX_DIO_SUBDEVG]; /* DIO 8255 chans */
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struct diosubd_data boardid; /* card supports board ID switch */
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struct diosubd_data s8254[MAX_8254_SUBDEVS]; /* 8254 subdevices */
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enum hw_io_access io_access;
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};
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@ -214,6 +226,7 @@ static DEFINE_PCI_DEVICE_TABLE(pci_dio_pci_table) = {
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PCI_VENDOR_ID_ADVANTECH, 0x1730, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
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PCI_VENDOR_ID_ADVANTECH, 0x1733, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
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PCI_VENDOR_ID_ADVANTECH, 0x1734, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
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PCI_VENDOR_ID_ADVANTECH, 0x1735, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
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PCI_VENDOR_ID_ADVANTECH, 0x1736, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
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PCI_VENDOR_ID_ADVANTECH, 0x1750, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
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PCI_VENDOR_ID_ADVANTECH, 0x1751, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
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@ -235,14 +248,15 @@ static const struct dio_boardtype boardtypes[] = {
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{{16, PCI1730_DO, 2, 0}, {16, PCI1730_IDO, 2, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{4, PCI173x_BOARDID, 1, SDF_INTERNAL},
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IO_8b,
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},
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{{0, 0, 0, 0}},
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IO_8b},
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{"pci1733", PCI_VENDOR_ID_ADVANTECH, 0x1733, PCIDIO_MAINREG,
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TYPE_PCI1733,
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{{0, 0, 0, 0}, {32, PCI1733_IDI, 4, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{4, PCI173x_BOARDID, 1, SDF_INTERNAL},
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{{0, 0, 0, 0}},
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IO_8b},
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{"pci1734", PCI_VENDOR_ID_ADVANTECH, 0x1734, PCIDIO_MAINREG,
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TYPE_PCI1734,
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@ -250,6 +264,15 @@ static const struct dio_boardtype boardtypes[] = {
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{{0, 0, 0, 0}, {32, PCI1734_IDO, 4, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{4, PCI173x_BOARDID, 1, SDF_INTERNAL},
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{{0, 0, 0, 0}},
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IO_8b},
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{"pci1735", PCI_VENDOR_ID_ADVANTECH, 0x1735, PCIDIO_MAINREG,
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TYPE_PCI1735,
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{{32, PCI1735_DI, 4, 0}, {0, 0, 0, 0}},
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{{32, PCI1735_DO, 4, 0}, {0, 0, 0, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{ 4, PCI1735_BOARDID, 1, SDF_INTERNAL},
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{{3, PCI1735_C8254, 1, 0}},
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IO_8b},
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{"pci1736", PCI_VENDOR_ID_ADVANTECH, 0x1736, PCI1736_MAINREG,
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TYPE_PCI1736,
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@ -257,14 +280,15 @@ static const struct dio_boardtype boardtypes[] = {
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{{0, 0, 0, 0}, {16, PCI1736_IDO, 2, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{4, PCI1736_BOARDID, 1, SDF_INTERNAL},
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IO_8b,
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},
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{{0, 0, 0, 0}},
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IO_8b},
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{"pci1750", PCI_VENDOR_ID_ADVANTECH, 0x1750, PCIDIO_MAINREG,
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TYPE_PCI1750,
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{{0, 0, 0, 0}, {16, PCI1750_IDI, 2, 0}},
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{{0, 0, 0, 0}, {16, PCI1750_IDO, 2, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{0, 0, 0, 0},
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{{0, 0, 0, 0}},
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IO_8b},
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{"pci1751", PCI_VENDOR_ID_ADVANTECH, 0x1751, PCIDIO_MAINREG,
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TYPE_PCI1751,
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@ -272,6 +296,7 @@ static const struct dio_boardtype boardtypes[] = {
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{{48, PCI1751_DIO, 2, 0}, {0, 0, 0, 0}},
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{0, 0, 0, 0},
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{{0, 0, 0, 0}},
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IO_8b},
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{"pci1752", PCI_VENDOR_ID_ADVANTECH, 0x1752, PCIDIO_MAINREG,
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TYPE_PCI1752,
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@ -279,6 +304,7 @@ static const struct dio_boardtype boardtypes[] = {
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{{32, PCI1752_IDO, 2, 0}, {32, PCI1752_IDO2, 2, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{4, PCI175x_BOARDID, 1, SDF_INTERNAL},
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{{0, 0, 0, 0}},
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IO_16b},
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{"pci1753", PCI_VENDOR_ID_ADVANTECH, 0x1753, PCIDIO_MAINREG,
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TYPE_PCI1753,
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@ -286,6 +312,7 @@ static const struct dio_boardtype boardtypes[] = {
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{{96, PCI1753_DIO, 4, 0}, {0, 0, 0, 0}},
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{0, 0, 0, 0},
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{{0, 0, 0, 0}},
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IO_8b},
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{"pci1753e", PCI_VENDOR_ID_ADVANTECH, 0x1753, PCIDIO_MAINREG,
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TYPE_PCI1753E,
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@ -293,6 +320,7 @@ static const struct dio_boardtype boardtypes[] = {
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{{96, PCI1753_DIO, 4, 0}, {96, PCI1753E_DIO, 4, 0}},
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{0, 0, 0, 0},
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{{0, 0, 0, 0}},
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IO_8b},
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{"pci1754", PCI_VENDOR_ID_ADVANTECH, 0x1754, PCIDIO_MAINREG,
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TYPE_PCI1754,
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@ -300,6 +328,7 @@ static const struct dio_boardtype boardtypes[] = {
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{4, PCI175x_BOARDID, 1, SDF_INTERNAL},
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{{0, 0, 0, 0}},
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IO_16b},
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{"pci1756", PCI_VENDOR_ID_ADVANTECH, 0x1756, PCIDIO_MAINREG,
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TYPE_PCI1756,
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@ -307,6 +336,7 @@ static const struct dio_boardtype boardtypes[] = {
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{{0, 0, 0, 0}, {32, PCI1756_IDO, 2, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{4, PCI175x_BOARDID, 1, SDF_INTERNAL},
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{{0, 0, 0, 0}},
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IO_16b},
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{"pci1760", PCI_VENDOR_ID_ADVANTECH, 0x1760, 0,
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TYPE_PCI1760,
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@ -314,6 +344,7 @@ static const struct dio_boardtype boardtypes[] = {
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{0, 0, 0, 0},
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{{0, 0, 0, 0}},
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IO_8b},
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{"pci1762", PCI_VENDOR_ID_ADVANTECH, 0x1762, PCIDIO_MAINREG,
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TYPE_PCI1762,
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@ -321,6 +352,7 @@ static const struct dio_boardtype boardtypes[] = {
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{{0, 0, 0, 0}, {16, PCI1762_RO, 1, 0}},
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{{0, 0, 0, 0}, {0, 0, 0, 0}},
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{4, PCI1762_BOARDID, 1, SDF_INTERNAL},
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{{0, 0, 0, 0}},
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IO_16b}
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};
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@ -437,6 +469,83 @@ static int pci_dio_insn_bits_do_w(struct comedi_device *dev,
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return 2;
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}
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/*
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==============================================================================
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*/
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static int pci_8254_insn_read(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data)
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{
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const struct diosubd_data *d = (const struct diosubd_data *)s->private;
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unsigned int chan, chip, chipchan;
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unsigned long flags;
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chan = CR_CHAN(insn->chanspec); /* channel on subdevice */
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chip = chan / 3; /* chip on subdevice */
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chipchan = chan - (3 * chip); /* channel on chip on subdevice */
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spin_lock_irqsave(&s->spin_lock, flags);
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data[0] = i8254_read(dev->iobase + d->addr + (SIZE_8254 * chip),
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0, chipchan);
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spin_unlock_irqrestore(&s->spin_lock, flags);
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return 1;
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}
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/*
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==============================================================================
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*/
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static int pci_8254_insn_write(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data)
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{
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const struct diosubd_data *d = (const struct diosubd_data *)s->private;
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unsigned int chan, chip, chipchan;
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unsigned long flags;
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chan = CR_CHAN(insn->chanspec); /* channel on subdevice */
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chip = chan / 3; /* chip on subdevice */
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chipchan = chan - (3 * chip); /* channel on chip on subdevice */
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spin_lock_irqsave(&s->spin_lock, flags);
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i8254_write(dev->iobase + d->addr + (SIZE_8254 * chip),
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0, chipchan, data[0]);
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spin_unlock_irqrestore(&s->spin_lock, flags);
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return 1;
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}
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/*
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==============================================================================
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*/
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static int pci_8254_insn_config(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data)
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{
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const struct diosubd_data *d = (const struct diosubd_data *)s->private;
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unsigned int chan, chip, chipchan;
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unsigned long iobase;
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int ret = 0;
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unsigned long flags;
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chan = CR_CHAN(insn->chanspec); /* channel on subdevice */
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chip = chan / 3; /* chip on subdevice */
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chipchan = chan - (3 * chip); /* channel on chip on subdevice */
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iobase = dev->iobase + d->addr + (SIZE_8254 * chip);
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spin_lock_irqsave(&s->spin_lock, flags);
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switch (data[0]) {
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case INSN_CONFIG_SET_COUNTER_MODE:
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ret = i8254_set_mode(iobase, 0, chipchan, data[1]);
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if (ret < 0)
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ret = -EINVAL;
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break;
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case INSN_CONFIG_8254_READ_STATUS:
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data[1] = i8254_status(iobase, 0, chipchan);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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spin_unlock_irqrestore(&s->spin_lock, flags);
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return ret < 0 ? ret : insn->n;
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}
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/*
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==============================================================================
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*/
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@ -708,6 +817,15 @@ static int pci_dio_reset(struct comedi_device *dev)
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outb(0, dev->iobase + PCI1734_IDO + 2);
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outb(0, dev->iobase + PCI1734_IDO + 3);
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break;
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case TYPE_PCI1735:
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outb(0, dev->iobase + PCI1735_DO); /* clear outputs */
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outb(0, dev->iobase + PCI1735_DO + 1);
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outb(0, dev->iobase + PCI1735_DO + 2);
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outb(0, dev->iobase + PCI1735_DO + 3);
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i8254_set_mode(dev->iobase + PCI1735_C8254, 0, 0, I8254_MODE0);
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i8254_set_mode(dev->iobase + PCI1735_C8254, 0, 1, I8254_MODE0);
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i8254_set_mode(dev->iobase + PCI1735_C8254, 0, 2, I8254_MODE0);
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break;
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case TYPE_PCI1736:
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outb(0, dev->iobase + PCI1736_IDO);
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@ -874,6 +992,26 @@ static int pci_dio_add_do(struct comedi_device *dev, struct comedi_subdevice *s,
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return 0;
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}
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/*
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==============================================================================
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*/
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static int pci_dio_add_8254(struct comedi_device *dev,
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struct comedi_subdevice * s,
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const struct diosubd_data *d, int subdev)
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{
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s->type = COMEDI_SUBD_COUNTER;
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s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
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s->n_chan = d->chans;
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s->maxdata = 65535;
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s->len_chanlist = d->chans;
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s->insn_read = pci_8254_insn_read;
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s->insn_write = pci_8254_insn_write;
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s->insn_config = pci_8254_insn_config;
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s->private = (void *)d;
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return 0;
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}
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/*
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==============================================================================
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*/
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@ -979,6 +1117,9 @@ static int pci_dio_attach(struct comedi_device *dev,
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n_subdevices += this_board->sdio[i].regs;
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if (this_board->boardid.chans)
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n_subdevices++;
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for (i = 0; i < MAX_8254_SUBDEVS; i++)
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if (this_board->s8254[i].chans)
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n_subdevices++;
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}
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ret = alloc_subdevices(dev, n_subdevices);
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@ -1022,6 +1163,13 @@ static int pci_dio_attach(struct comedi_device *dev,
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subdev++;
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}
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for (i = 0; i < MAX_8254_SUBDEVS; i++)
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if (this_board->s8254[i].chans) {
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s = dev->subdevices + subdev;
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pci_dio_add_8254(dev, s, &this_board->s8254[i], subdev);
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subdev++;
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}
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if (this_board->cardtype == TYPE_PCI1760)
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pci1760_attach(dev, it);
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|
||||
|
|
@ -1067,6 +1215,16 @@ static int pci_dio_detach(struct comedi_device *dev)
|
|||
}
|
||||
}
|
||||
|
||||
if (this_board->boardid.chans) {
|
||||
subdev++;
|
||||
}
|
||||
|
||||
for (i = 0; i < MAX_8254_SUBDEVS; i++) {
|
||||
if (this_board->s8254[i].chans) {
|
||||
subdev++;
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < dev->n_subdevices; i++) {
|
||||
s = dev->subdevices + i;
|
||||
s->private = NULL;
|
||||
|
|
|
|||
Reference in a new issue