x86: support always running TSC on Intel CPUs, add cpufeature definition
Impact: add new synthetic-cpuid bit definition add X86_FEATURE_NONSTOP_TSC to the cpufeature bits - this is in preparation of Venki's always-running-TSC patch. Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -92,6 +92,7 @@
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#define X86_FEATURE_AMDC1E (3*32+21) /* AMD C1E detected */
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#define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */
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#define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */
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#define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */
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/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
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#define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */
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