OMAP3: PM: Adding smartreflex hwmod data
This patch adds the smartreflex hwmod data for OMAP3430 and OMAP3630. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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1 changed files with 175 additions and 0 deletions
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@ -21,6 +21,7 @@
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#include <plat/l4_3xxx.h>
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#include <plat/i2c.h>
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#include <plat/gpio.h>
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#include <plat/smartreflex.h>
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#include "omap_hwmod_common_data.h"
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@ -52,6 +53,8 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod;
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static struct omap_hwmod omap3xxx_gpio4_hwmod;
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static struct omap_hwmod omap3xxx_gpio5_hwmod;
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static struct omap_hwmod omap3xxx_gpio6_hwmod;
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static struct omap_hwmod omap34xx_sr1_hwmod;
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static struct omap_hwmod omap34xx_sr2_hwmod;
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static struct omap_hwmod omap3xxx_dma_system_hwmod;
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@ -262,9 +265,47 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* L4 CORE -> SR1 interface */
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static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = {
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{
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.pa_start = OMAP34XX_SR1_BASE,
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.pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1,
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.flags = ADDR_TYPE_RT,
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},
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};
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static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = {
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.master = &omap3xxx_l4_core_hwmod,
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.slave = &omap34xx_sr1_hwmod,
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.clk = "sr_l4_ick",
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.addr = omap3_sr1_addr_space,
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.addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space),
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.user = OCP_USER_MPU,
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};
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/* L4 CORE -> SR1 interface */
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static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = {
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{
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.pa_start = OMAP34XX_SR2_BASE,
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.pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1,
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.flags = ADDR_TYPE_RT,
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},
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};
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static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = {
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.master = &omap3xxx_l4_core_hwmod,
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.slave = &omap34xx_sr2_hwmod,
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.clk = "sr_l4_ick",
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.addr = omap3_sr2_addr_space,
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.addr_cnt = ARRAY_SIZE(omap3_sr2_addr_space),
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.user = OCP_USER_MPU,
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};
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/* Slave interfaces on the L4_CORE interconnect */
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static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
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&omap3xxx_l3_main__l4_core,
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&omap3_l4_core__sr1,
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&omap3_l4_core__sr2,
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};
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/* Master interfaces on the L4_CORE interconnect */
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@ -1186,6 +1227,135 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = {
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.flags = HWMOD_NO_IDLEST,
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};
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/* SR common */
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static struct omap_hwmod_sysc_fields omap34xx_sr_sysc_fields = {
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.clkact_shift = 20,
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};
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static struct omap_hwmod_class_sysconfig omap34xx_sr_sysc = {
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.sysc_offs = 0x24,
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.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_NO_CACHE),
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.clockact = CLOCKACT_TEST_ICLK,
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.sysc_fields = &omap34xx_sr_sysc_fields,
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};
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static struct omap_hwmod_class omap34xx_smartreflex_hwmod_class = {
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.name = "smartreflex",
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.sysc = &omap34xx_sr_sysc,
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.rev = 1,
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};
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static struct omap_hwmod_sysc_fields omap36xx_sr_sysc_fields = {
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.sidle_shift = 24,
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.enwkup_shift = 26
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};
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static struct omap_hwmod_class_sysconfig omap36xx_sr_sysc = {
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.sysc_offs = 0x38,
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
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SYSC_NO_CACHE),
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.sysc_fields = &omap36xx_sr_sysc_fields,
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};
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static struct omap_hwmod_class omap36xx_smartreflex_hwmod_class = {
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.name = "smartreflex",
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.sysc = &omap36xx_sr_sysc,
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.rev = 2,
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};
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/* SR1 */
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static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = {
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&omap3_l4_core__sr1,
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};
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static struct omap_hwmod omap34xx_sr1_hwmod = {
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.name = "sr1_hwmod",
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.class = &omap34xx_smartreflex_hwmod_class,
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.main_clk = "sr1_fck",
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.vdd_name = "mpu",
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.prcm = {
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.omap2 = {
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.prcm_reg_id = 1,
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.module_bit = OMAP3430_EN_SR1_SHIFT,
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.module_offs = WKUP_MOD,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,
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},
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},
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.slaves = omap3_sr1_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
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CHIP_IS_OMAP3430ES3_0 |
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CHIP_IS_OMAP3430ES3_1),
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.flags = HWMOD_SET_DEFAULT_CLOCKACT,
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};
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static struct omap_hwmod omap36xx_sr1_hwmod = {
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.name = "sr1_hwmod",
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.class = &omap36xx_smartreflex_hwmod_class,
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.main_clk = "sr1_fck",
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.vdd_name = "mpu",
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.prcm = {
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.omap2 = {
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.prcm_reg_id = 1,
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.module_bit = OMAP3430_EN_SR1_SHIFT,
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.module_offs = WKUP_MOD,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430_EN_SR1_SHIFT,
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},
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},
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.slaves = omap3_sr1_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
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};
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/* SR2 */
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static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = {
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&omap3_l4_core__sr2,
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};
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static struct omap_hwmod omap34xx_sr2_hwmod = {
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.name = "sr2_hwmod",
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.class = &omap34xx_smartreflex_hwmod_class,
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.main_clk = "sr2_fck",
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.vdd_name = "core",
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.prcm = {
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.omap2 = {
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.prcm_reg_id = 1,
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.module_bit = OMAP3430_EN_SR2_SHIFT,
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.module_offs = WKUP_MOD,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,
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},
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},
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.slaves = omap3_sr2_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
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CHIP_IS_OMAP3430ES3_0 |
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CHIP_IS_OMAP3430ES3_1),
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.flags = HWMOD_SET_DEFAULT_CLOCKACT,
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};
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static struct omap_hwmod omap36xx_sr2_hwmod = {
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.name = "sr2_hwmod",
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.class = &omap36xx_smartreflex_hwmod_class,
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.main_clk = "sr2_fck",
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.vdd_name = "core",
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.prcm = {
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.omap2 = {
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.prcm_reg_id = 1,
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.module_bit = OMAP3430_EN_SR2_SHIFT,
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.module_offs = WKUP_MOD,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430_EN_SR2_SHIFT,
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},
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},
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.slaves = omap3_sr2_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves),
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
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};
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static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
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&omap3xxx_l3_main_hwmod,
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&omap3xxx_l4_core_hwmod,
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@ -1201,6 +1371,11 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
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&omap3xxx_i2c1_hwmod,
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&omap3xxx_i2c2_hwmod,
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&omap3xxx_i2c3_hwmod,
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&omap34xx_sr1_hwmod,
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&omap34xx_sr2_hwmod,
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&omap36xx_sr1_hwmod,
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&omap36xx_sr2_hwmod,
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/* gpio class */
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&omap3xxx_gpio1_hwmod,
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