drm/i915: Replace DRM_DEBUG with DRM_DEBUG_KMS in DVO output code.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
parent
3e0f27ed75
commit
d0c3b04ae9
5 changed files with 61 additions and 55 deletions
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@ -249,7 +249,8 @@ static bool ch7017_init(struct intel_dvo_device *dvo,
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if (val != CH7017_DEVICE_ID_VALUE &&
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val != CH7018_DEVICE_ID_VALUE &&
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val != CH7019_DEVICE_ID_VALUE) {
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DRM_DEBUG("ch701x not detected, got %d: from %s Slave %d.\n",
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DRM_DEBUG_KMS("ch701x not detected, got %d: from %s "
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"Slave %d.\n",
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val, i2cbus->adapter.name,dvo->slave_addr);
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goto fail;
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}
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@ -284,7 +285,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
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uint8_t horizontal_active_pixel_output, vertical_active_line_output;
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uint8_t active_input_line_output;
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DRM_DEBUG("Registers before mode setting\n");
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DRM_DEBUG_KMS("Registers before mode setting\n");
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ch7017_dump_regs(dvo);
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/* LVDS PLL settings from page 75 of 7017-7017ds.pdf*/
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@ -346,7 +347,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
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/* Turn the LVDS back on with new settings. */
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ch7017_write(dvo, CH7017_LVDS_POWER_DOWN, lvds_power_down);
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DRM_DEBUG("Registers after mode setting\n");
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DRM_DEBUG_KMS("Registers after mode setting\n");
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ch7017_dump_regs(dvo);
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}
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@ -386,7 +387,7 @@ static void ch7017_dump_regs(struct intel_dvo_device *dvo)
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#define DUMP(reg) \
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do { \
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ch7017_read(dvo, reg, &val); \
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DRM_DEBUG(#reg ": %02x\n", val); \
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DRM_DEBUG_KMS(#reg ": %02x\n", val); \
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} while (0)
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DUMP(CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT);
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@ -152,7 +152,7 @@ static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
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};
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if (!ch7xxx->quiet) {
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DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
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DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
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addr, i2cbus->adapter.name, dvo->slave_addr);
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}
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return false;
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@ -179,7 +179,7 @@ static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
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return true;
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if (!ch7xxx->quiet) {
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DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
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DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
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addr, i2cbus->adapter.name, dvo->slave_addr);
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}
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@ -207,7 +207,8 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
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name = ch7xxx_get_id(vendor);
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if (!name) {
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DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n",
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DRM_DEBUG_KMS("ch7xxx not detected; got 0x%02x from %s "
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"slave %d.\n",
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vendor, adapter->name, dvo->slave_addr);
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goto out;
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}
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@ -217,13 +218,14 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
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goto out;
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if (device != CH7xxx_DID) {
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DRM_DEBUG("ch7xxx not detected; got 0x%02x from %s slave %d.\n",
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DRM_DEBUG_KMS("ch7xxx not detected; got 0x%02x from %s "
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"slave %d.\n",
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vendor, adapter->name, dvo->slave_addr);
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goto out;
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}
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ch7xxx->quiet = false;
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DRM_DEBUG("Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n",
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DRM_DEBUG_KMS("Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n",
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name, vendor, device);
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return true;
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out:
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@ -315,8 +317,8 @@ static void ch7xxx_dump_regs(struct intel_dvo_device *dvo)
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for (i = 0; i < CH7xxx_NUM_REGS; i++) {
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if ((i % 8) == 0 )
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DRM_DEBUG("\n %02X: ", i);
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DRM_DEBUG("%02X ", ch7xxx->mode_reg.regs[i]);
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DRM_LOG_KMS("\n %02X: ", i);
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DRM_LOG_KMS("%02X ", ch7xxx->mode_reg.regs[i]);
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}
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}
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@ -202,7 +202,8 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
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};
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if (!priv->quiet) {
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DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
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DRM_DEBUG_KMS("Unable to read register 0x%02x from "
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"%s:%02x.\n",
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addr, i2cbus->adapter.name, dvo->slave_addr);
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}
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return false;
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@ -230,7 +231,7 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
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return true;
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if (!priv->quiet) {
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DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
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DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
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addr, i2cbus->adapter.name, dvo->slave_addr);
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}
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@ -261,7 +262,7 @@ static bool ivch_init(struct intel_dvo_device *dvo,
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* the address it's responding on.
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*/
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if ((temp & VR00_BASE_ADDRESS_MASK) != dvo->slave_addr) {
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DRM_DEBUG("ivch detect failed due to address mismatch "
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DRM_DEBUG_KMS("ivch detect failed due to address mismatch "
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"(%d vs %d)\n",
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(temp & VR00_BASE_ADDRESS_MASK), dvo->slave_addr);
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goto out;
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@ -367,41 +368,41 @@ static void ivch_dump_regs(struct intel_dvo_device *dvo)
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uint16_t val;
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ivch_read(dvo, VR00, &val);
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DRM_DEBUG("VR00: 0x%04x\n", val);
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DRM_LOG_KMS("VR00: 0x%04x\n", val);
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ivch_read(dvo, VR01, &val);
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DRM_DEBUG("VR01: 0x%04x\n", val);
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DRM_LOG_KMS("VR01: 0x%04x\n", val);
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ivch_read(dvo, VR30, &val);
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DRM_DEBUG("VR30: 0x%04x\n", val);
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DRM_LOG_KMS("VR30: 0x%04x\n", val);
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ivch_read(dvo, VR40, &val);
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DRM_DEBUG("VR40: 0x%04x\n", val);
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DRM_LOG_KMS("VR40: 0x%04x\n", val);
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/* GPIO registers */
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ivch_read(dvo, VR80, &val);
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DRM_DEBUG("VR80: 0x%04x\n", val);
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DRM_LOG_KMS("VR80: 0x%04x\n", val);
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ivch_read(dvo, VR81, &val);
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DRM_DEBUG("VR81: 0x%04x\n", val);
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DRM_LOG_KMS("VR81: 0x%04x\n", val);
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ivch_read(dvo, VR82, &val);
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DRM_DEBUG("VR82: 0x%04x\n", val);
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DRM_LOG_KMS("VR82: 0x%04x\n", val);
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ivch_read(dvo, VR83, &val);
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DRM_DEBUG("VR83: 0x%04x\n", val);
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DRM_LOG_KMS("VR83: 0x%04x\n", val);
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ivch_read(dvo, VR84, &val);
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DRM_DEBUG("VR84: 0x%04x\n", val);
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DRM_LOG_KMS("VR84: 0x%04x\n", val);
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ivch_read(dvo, VR85, &val);
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DRM_DEBUG("VR85: 0x%04x\n", val);
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DRM_LOG_KMS("VR85: 0x%04x\n", val);
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ivch_read(dvo, VR86, &val);
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DRM_DEBUG("VR86: 0x%04x\n", val);
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DRM_LOG_KMS("VR86: 0x%04x\n", val);
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ivch_read(dvo, VR87, &val);
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DRM_DEBUG("VR87: 0x%04x\n", val);
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DRM_LOG_KMS("VR87: 0x%04x\n", val);
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ivch_read(dvo, VR88, &val);
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DRM_DEBUG("VR88: 0x%04x\n", val);
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DRM_LOG_KMS("VR88: 0x%04x\n", val);
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/* Scratch register 0 - AIM Panel type */
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ivch_read(dvo, VR8E, &val);
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DRM_DEBUG("VR8E: 0x%04x\n", val);
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DRM_LOG_KMS("VR8E: 0x%04x\n", val);
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/* Scratch register 1 - Status register */
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ivch_read(dvo, VR8F, &val);
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DRM_DEBUG("VR8F: 0x%04x\n", val);
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DRM_LOG_KMS("VR8F: 0x%04x\n", val);
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}
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static void ivch_save(struct intel_dvo_device *dvo)
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@ -105,7 +105,7 @@ static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
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};
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if (!sil->quiet) {
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DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
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DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
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addr, i2cbus->adapter.name, dvo->slave_addr);
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}
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return false;
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@ -131,7 +131,7 @@ static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
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return true;
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if (!sil->quiet) {
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DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
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DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
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addr, i2cbus->adapter.name, dvo->slave_addr);
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}
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@ -158,7 +158,7 @@ static bool sil164_init(struct intel_dvo_device *dvo,
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goto out;
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if (ch != (SIL164_VID & 0xff)) {
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DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
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DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
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ch, adapter->name, dvo->slave_addr);
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goto out;
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}
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@ -167,13 +167,13 @@ static bool sil164_init(struct intel_dvo_device *dvo,
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goto out;
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if (ch != (SIL164_DID & 0xff)) {
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DRM_DEBUG("sil164 not detected got %d: from %s Slave %d.\n",
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DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
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ch, adapter->name, dvo->slave_addr);
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goto out;
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}
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sil->quiet = false;
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DRM_DEBUG("init sil164 dvo controller successfully!\n");
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DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n");
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return true;
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out:
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@ -241,15 +241,15 @@ static void sil164_dump_regs(struct intel_dvo_device *dvo)
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uint8_t val;
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sil164_readb(dvo, SIL164_FREQ_LO, &val);
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DRM_DEBUG("SIL164_FREQ_LO: 0x%02x\n", val);
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DRM_LOG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
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sil164_readb(dvo, SIL164_FREQ_HI, &val);
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DRM_DEBUG("SIL164_FREQ_HI: 0x%02x\n", val);
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DRM_LOG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
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sil164_readb(dvo, SIL164_REG8, &val);
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DRM_DEBUG("SIL164_REG8: 0x%02x\n", val);
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DRM_LOG_KMS("SIL164_REG8: 0x%02x\n", val);
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sil164_readb(dvo, SIL164_REG9, &val);
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DRM_DEBUG("SIL164_REG9: 0x%02x\n", val);
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DRM_LOG_KMS("SIL164_REG9: 0x%02x\n", val);
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sil164_readb(dvo, SIL164_REGC, &val);
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DRM_DEBUG("SIL164_REGC: 0x%02x\n", val);
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DRM_LOG_KMS("SIL164_REGC: 0x%02x\n", val);
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}
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static void sil164_save(struct intel_dvo_device *dvo)
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@ -130,7 +130,7 @@ static bool tfp410_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
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};
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if (!tfp->quiet) {
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DRM_DEBUG("Unable to read register 0x%02x from %s:%02x.\n",
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DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
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addr, i2cbus->adapter.name, dvo->slave_addr);
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}
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return false;
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@ -156,7 +156,7 @@ static bool tfp410_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
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return true;
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if (!tfp->quiet) {
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DRM_DEBUG("Unable to write register 0x%02x to %s:%d.\n",
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DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
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addr, i2cbus->adapter.name, dvo->slave_addr);
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}
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@ -191,13 +191,15 @@ static bool tfp410_init(struct intel_dvo_device *dvo,
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tfp->quiet = true;
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if ((id = tfp410_getid(dvo, TFP410_VID_LO)) != TFP410_VID) {
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DRM_DEBUG("tfp410 not detected got VID %X: from %s Slave %d.\n",
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DRM_DEBUG_KMS("tfp410 not detected got VID %X: from %s "
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"Slave %d.\n",
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id, adapter->name, dvo->slave_addr);
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goto out;
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}
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if ((id = tfp410_getid(dvo, TFP410_DID_LO)) != TFP410_DID) {
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DRM_DEBUG("tfp410 not detected got DID %X: from %s Slave %d.\n",
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DRM_DEBUG_KMS("tfp410 not detected got DID %X: from %s "
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"Slave %d.\n",
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id, adapter->name, dvo->slave_addr);
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goto out;
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}
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@ -262,33 +264,33 @@ static void tfp410_dump_regs(struct intel_dvo_device *dvo)
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uint8_t val, val2;
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tfp410_readb(dvo, TFP410_REV, &val);
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DRM_DEBUG("TFP410_REV: 0x%02X\n", val);
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DRM_LOG_KMS("TFP410_REV: 0x%02X\n", val);
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tfp410_readb(dvo, TFP410_CTL_1, &val);
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DRM_DEBUG("TFP410_CTL1: 0x%02X\n", val);
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DRM_LOG_KMS("TFP410_CTL1: 0x%02X\n", val);
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tfp410_readb(dvo, TFP410_CTL_2, &val);
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DRM_DEBUG("TFP410_CTL2: 0x%02X\n", val);
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DRM_LOG_KMS("TFP410_CTL2: 0x%02X\n", val);
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tfp410_readb(dvo, TFP410_CTL_3, &val);
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DRM_DEBUG("TFP410_CTL3: 0x%02X\n", val);
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DRM_LOG_KMS("TFP410_CTL3: 0x%02X\n", val);
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tfp410_readb(dvo, TFP410_USERCFG, &val);
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DRM_DEBUG("TFP410_USERCFG: 0x%02X\n", val);
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DRM_LOG_KMS("TFP410_USERCFG: 0x%02X\n", val);
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tfp410_readb(dvo, TFP410_DE_DLY, &val);
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DRM_DEBUG("TFP410_DE_DLY: 0x%02X\n", val);
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DRM_LOG_KMS("TFP410_DE_DLY: 0x%02X\n", val);
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tfp410_readb(dvo, TFP410_DE_CTL, &val);
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DRM_DEBUG("TFP410_DE_CTL: 0x%02X\n", val);
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DRM_LOG_KMS("TFP410_DE_CTL: 0x%02X\n", val);
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tfp410_readb(dvo, TFP410_DE_TOP, &val);
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DRM_DEBUG("TFP410_DE_TOP: 0x%02X\n", val);
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DRM_LOG_KMS("TFP410_DE_TOP: 0x%02X\n", val);
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tfp410_readb(dvo, TFP410_DE_CNT_LO, &val);
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tfp410_readb(dvo, TFP410_DE_CNT_HI, &val2);
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DRM_DEBUG("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
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DRM_LOG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2, val);
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tfp410_readb(dvo, TFP410_DE_LIN_LO, &val);
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tfp410_readb(dvo, TFP410_DE_LIN_HI, &val2);
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DRM_DEBUG("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
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DRM_LOG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2, val);
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tfp410_readb(dvo, TFP410_H_RES_LO, &val);
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tfp410_readb(dvo, TFP410_H_RES_HI, &val2);
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DRM_DEBUG("TFP410_H_RES: 0x%02X%02X\n", val2, val);
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DRM_LOG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2, val);
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tfp410_readb(dvo, TFP410_V_RES_LO, &val);
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tfp410_readb(dvo, TFP410_V_RES_HI, &val2);
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DRM_DEBUG("TFP410_V_RES: 0x%02X%02X\n", val2, val);
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DRM_LOG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2, val);
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}
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static void tfp410_save(struct intel_dvo_device *dvo)
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