OMAPDSS: HDMI: Remove custom hdmi_video_timings struct
The hdmi CEA and VESA timings were represented by the struct hdmi_video_timings, omap_video_timings couldn't be used as it didn't contain the fields hsync/vsync polarities and interlaced/progressive information. Remove hdmi_video_timings, and use omap_video_timings instead. Cc: Mythri P K <mythripk@ti.com> Signed-off-by: Archit Taneja <archit@ti.com>
This commit is contained in:
Archit Taneja
Tomi Valkeinen
parent
23bae3adbf
commit
cc937e5e4b
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@ -78,43 +78,214 @@ static struct {
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*/
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static const struct hdmi_config cea_timings[] = {
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{ {640, 480, 25200, 96, 16, 48, 2, 10, 33, 0, 0, 0}, {1, HDMI_HDMI} },
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{ {720, 480, 27027, 62, 16, 60, 6, 9, 30, 0, 0, 0}, {2, HDMI_HDMI} },
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{ {1280, 720, 74250, 40, 110, 220, 5, 5, 20, 1, 1, 0}, {4, HDMI_HDMI} },
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{ {1920, 540, 74250, 44, 88, 148, 5, 2, 15, 1, 1, 1}, {5, HDMI_HDMI} },
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{ {1440, 240, 27027, 124, 38, 114, 3, 4, 15, 0, 0, 1}, {6, HDMI_HDMI} },
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{ {1920, 1080, 148500, 44, 88, 148, 5, 4, 36, 1, 1, 0}, {16, HDMI_HDMI} },
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{ {720, 576, 27000, 64, 12, 68, 5, 5, 39, 0, 0, 0}, {17, HDMI_HDMI} },
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{ {1280, 720, 74250, 40, 440, 220, 5, 5, 20, 1, 1, 0}, {19, HDMI_HDMI} },
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{ {1920, 540, 74250, 44, 528, 148, 5, 2, 15, 1, 1, 1}, {20, HDMI_HDMI} },
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{ {1440, 288, 27000, 126, 24, 138, 3, 2, 19, 0, 0, 1}, {21, HDMI_HDMI} },
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{ {1440, 576, 54000, 128, 24, 136, 5, 5, 39, 0, 0, 0}, {29, HDMI_HDMI} },
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{ {1920, 1080, 148500, 44, 528, 148, 5, 4, 36, 1, 1, 0}, {31, HDMI_HDMI} },
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{ {1920, 1080, 74250, 44, 638, 148, 5, 4, 36, 1, 1, 0}, {32, HDMI_HDMI} },
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{ {2880, 480, 108108, 248, 64, 240, 6, 9, 30, 0, 0, 0}, {35, HDMI_HDMI} },
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{ {2880, 576, 108000, 256, 48, 272, 5, 5, 39, 0, 0, 0}, {37, HDMI_HDMI} },
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{
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{ 640, 480, 25200, 96, 16, 48, 2, 10, 33,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 1, HDMI_HDMI },
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},
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{
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{ 720, 480, 27027, 62, 16, 60, 6, 9, 30,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 2, HDMI_HDMI },
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},
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{
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{ 1280, 720, 74250, 40, 110, 220, 5, 5, 20,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 4, HDMI_HDMI },
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},
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{
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{ 1920, 540, 74250, 44, 88, 148, 5, 2, 15,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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true, },
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{ 5, HDMI_HDMI },
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},
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{
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{ 1440, 240, 27027, 124, 38, 114, 3, 4, 15,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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true, },
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{ 6, HDMI_HDMI },
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},
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{
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{ 1920, 1080, 148500, 44, 88, 148, 5, 4, 36,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 16, HDMI_HDMI },
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},
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{
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{ 720, 576, 27000, 64, 12, 68, 5, 5, 39,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 17, HDMI_HDMI },
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},
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{
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{ 1280, 720, 74250, 40, 440, 220, 5, 5, 20,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 19, HDMI_HDMI },
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},
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{
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{ 1920, 540, 74250, 44, 528, 148, 5, 2, 15,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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true, },
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{ 20, HDMI_HDMI },
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},
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{
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{ 1440, 288, 27000, 126, 24, 138, 3, 2, 19,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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true, },
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{ 21, HDMI_HDMI },
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},
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{
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{ 1440, 576, 54000, 128, 24, 136, 5, 5, 39,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 29, HDMI_HDMI },
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},
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{
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{ 1920, 1080, 148500, 44, 528, 148, 5, 4, 36,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 31, HDMI_HDMI },
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},
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{
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{ 1920, 1080, 74250, 44, 638, 148, 5, 4, 36,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 32, HDMI_HDMI },
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},
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{
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{ 2880, 480, 108108, 248, 64, 240, 6, 9, 30,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 35, HDMI_HDMI },
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},
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{
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{ 2880, 576, 108000, 256, 48, 272, 5, 5, 39,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 37, HDMI_HDMI },
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},
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};
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static const struct hdmi_config vesa_timings[] = {
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/* VESA From Here */
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{ {640, 480, 25175, 96, 16, 48, 2 , 11, 31, 0, 0, 0}, {4, HDMI_DVI} },
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{ {800, 600, 40000, 128, 40, 88, 4 , 1, 23, 1, 1, 0}, {9, HDMI_DVI} },
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{ {848, 480, 33750, 112, 16, 112, 8 , 6, 23, 1, 1, 0}, {0xE, HDMI_DVI} },
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{ {1280, 768, 79500, 128, 64, 192, 7 , 3, 20, 1, 0, 0}, {0x17, HDMI_DVI} },
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{ {1280, 800, 83500, 128, 72, 200, 6 , 3, 22, 1, 0, 0}, {0x1C, HDMI_DVI} },
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{ {1360, 768, 85500, 112, 64, 256, 6 , 3, 18, 1, 1, 0}, {0x27, HDMI_DVI} },
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{ {1280, 960, 108000, 112, 96, 312, 3 , 1, 36, 1, 1, 0}, {0x20, HDMI_DVI} },
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{ {1280, 1024, 108000, 112, 48, 248, 3 , 1, 38, 1, 1, 0}, {0x23, HDMI_DVI} },
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{ {1024, 768, 65000, 136, 24, 160, 6, 3, 29, 0, 0, 0}, {0x10, HDMI_DVI} },
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{ {1400, 1050, 121750, 144, 88, 232, 4, 3, 32, 1, 0, 0}, {0x2A, HDMI_DVI} },
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{ {1440, 900, 106500, 152, 80, 232, 6, 3, 25, 1, 0, 0}, {0x2F, HDMI_DVI} },
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{ {1680, 1050, 146250, 176 , 104, 280, 6, 3, 30, 1, 0, 0}, {0x3A, HDMI_DVI} },
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{ {1366, 768, 85500, 143, 70, 213, 3, 3, 24, 1, 1, 0}, {0x51, HDMI_DVI} },
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{ {1920, 1080, 148500, 44, 148, 80, 5, 4, 36, 1, 1, 0}, {0x52, HDMI_DVI} },
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{ {1280, 768, 68250, 32, 48, 80, 7, 3, 12, 0, 1, 0}, {0x16, HDMI_DVI} },
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{ {1400, 1050, 101000, 32, 48, 80, 4, 3, 23, 0, 1, 0}, {0x29, HDMI_DVI} },
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{ {1680, 1050, 119000, 32, 48, 80, 6, 3, 21, 0, 1, 0}, {0x39, HDMI_DVI} },
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{ {1280, 800, 79500, 32, 48, 80, 6, 3, 14, 0, 1, 0}, {0x1B, HDMI_DVI} },
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{ {1280, 720, 74250, 40, 110, 220, 5, 5, 20, 1, 1, 0}, {0x55, HDMI_DVI} }
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{
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{ 640, 480, 25175, 96, 16, 48, 2, 11, 31,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 4, HDMI_DVI },
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},
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{
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{ 800, 600, 40000, 128, 40, 88, 4, 1, 23,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 9, HDMI_DVI },
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},
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{
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{ 848, 480, 33750, 112, 16, 112, 8, 6, 23,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0xE, HDMI_DVI },
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},
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{
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{ 1280, 768, 79500, 128, 64, 192, 7, 3, 20,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x17, HDMI_DVI },
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},
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{
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{ 1280, 800, 83500, 128, 72, 200, 6, 3, 22,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x1C, HDMI_DVI },
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},
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{
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{ 1360, 768, 85500, 112, 64, 256, 6, 3, 18,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x27, HDMI_DVI },
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},
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{
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{ 1280, 960, 108000, 112, 96, 312, 3, 1, 36,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x20, HDMI_DVI },
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},
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{
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{ 1280, 1024, 108000, 112, 48, 248, 3, 1, 38,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x23, HDMI_DVI },
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},
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{
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{ 1024, 768, 65000, 136, 24, 160, 6, 3, 29,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x10, HDMI_DVI },
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},
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{
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{ 1400, 1050, 121750, 144, 88, 232, 4, 3, 32,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x2A, HDMI_DVI },
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},
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{
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{ 1440, 900, 106500, 152, 80, 232, 6, 3, 25,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x2F, HDMI_DVI },
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},
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{
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{ 1680, 1050, 146250, 176 , 104, 280, 6, 3, 30,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_LOW,
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false, },
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{ 0x3A, HDMI_DVI },
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},
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{
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{ 1366, 768, 85500, 143, 70, 213, 3, 3, 24,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x51, HDMI_DVI },
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},
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{
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{ 1920, 1080, 148500, 44, 148, 80, 5, 4, 36,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x52, HDMI_DVI },
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},
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{
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{ 1280, 768, 68250, 32, 48, 80, 7, 3, 12,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x16, HDMI_DVI },
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},
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{
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{ 1400, 1050, 101000, 32, 48, 80, 4, 3, 23,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x29, HDMI_DVI },
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},
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{
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{ 1680, 1050, 119000, 32, 48, 80, 6, 3, 21,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x39, HDMI_DVI },
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},
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{
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{ 1280, 800, 79500, 32, 48, 80, 6, 3, 14,
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OMAPDSS_SIG_ACTIVE_LOW, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x1B, HDMI_DVI },
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},
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{
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{ 1280, 720, 74250, 40, 110, 220, 5, 5, 20,
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OMAPDSS_SIG_ACTIVE_HIGH, OMAPDSS_SIG_ACTIVE_HIGH,
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false, },
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{ 0x55, HDMI_DVI },
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},
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};
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static int hdmi_runtime_get(void)
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@ -179,7 +350,7 @@ static const struct hdmi_config *hdmi_get_timings(void)
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}
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static bool hdmi_timings_compare(struct omap_video_timings *timing1,
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const struct hdmi_video_timings *timing2)
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const struct omap_video_timings *timing2)
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{
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int timing1_vsync, timing1_hsync, timing2_vsync, timing2_hsync;
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@ -42,30 +42,13 @@ enum hdmi_clk_refsel {
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HDMI_REFSEL_SYSCLK = 3
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};
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/* HDMI timing structure */
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struct hdmi_video_timings {
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u16 x_res;
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u16 y_res;
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/* Unit: KHz */
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u32 pixel_clock;
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u16 hsw;
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u16 hfp;
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u16 hbp;
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u16 vsw;
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u16 vfp;
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u16 vbp;
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bool vsync_pol;
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bool hsync_pol;
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bool interlace;
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};
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struct hdmi_cm {
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int code;
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int mode;
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};
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struct hdmi_config {
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struct hdmi_video_timings timings;
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struct omap_video_timings timings;
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struct hdmi_cm cm;
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};
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@ -741,11 +741,15 @@ static void hdmi_wp_video_config_format(struct hdmi_ip_data *ip_data,
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static void hdmi_wp_video_config_interface(struct hdmi_ip_data *ip_data)
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{
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u32 r;
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bool vsync_pol, hsync_pol;
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pr_debug("Enter hdmi_wp_video_config_interface\n");
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vsync_pol = ip_data->cfg.timings.vsync_level == OMAPDSS_SIG_ACTIVE_HIGH;
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hsync_pol = ip_data->cfg.timings.hsync_level == OMAPDSS_SIG_ACTIVE_HIGH;
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r = hdmi_read_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG);
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r = FLD_MOD(r, ip_data->cfg.timings.vsync_pol, 7, 7);
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r = FLD_MOD(r, ip_data->cfg.timings.hsync_pol, 6, 6);
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r = FLD_MOD(r, vsync_pol, 7, 7);
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r = FLD_MOD(r, hsync_pol, 6, 6);
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r = FLD_MOD(r, ip_data->cfg.timings.interlace, 3, 3);
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r = FLD_MOD(r, 1, 1, 0); /* HDMI_TIMING_MASTER_24BIT */
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hdmi_write_reg(hdmi_wp_base(ip_data), HDMI_WP_VIDEO_CFG, r);
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