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Merge master.kernel.org:/home/rmk/linux-2.6-serial

This commit is contained in:
Linus Torvalds 2006-01-07 10:44:22 -08:00
commit cc918c7ab7
5 changed files with 163 additions and 46 deletions

View File

@ -296,7 +296,7 @@ static inline int map_8250_out_reg(struct uart_8250_port *up, int offset)
#endif
static _INLINE_ unsigned int serial_in(struct uart_8250_port *up, int offset)
static unsigned int serial_in(struct uart_8250_port *up, int offset)
{
offset = map_8250_in_reg(up, offset) << up->port.regshift;
@ -321,7 +321,7 @@ static _INLINE_ unsigned int serial_in(struct uart_8250_port *up, int offset)
}
}
static _INLINE_ void
static void
serial_out(struct uart_8250_port *up, int offset, int value)
{
offset = map_8250_out_reg(up, offset) << up->port.regshift;
@ -1131,7 +1131,7 @@ static void serial8250_enable_ms(struct uart_port *port)
serial_out(up, UART_IER, up->ier);
}
static _INLINE_ void
static void
receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
{
struct tty_struct *tty = up->port.info->tty;
@ -1217,7 +1217,7 @@ receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
*status = lsr;
}
static _INLINE_ void transmit_chars(struct uart_8250_port *up)
static void transmit_chars(struct uart_8250_port *up)
{
struct circ_buf *xmit = &up->port.info->xmit;
int count;
@ -1255,25 +1255,24 @@ static _INLINE_ void transmit_chars(struct uart_8250_port *up)
__stop_tx(up);
}
static _INLINE_ void check_modem_status(struct uart_8250_port *up)
static unsigned int check_modem_status(struct uart_8250_port *up)
{
int status;
unsigned int status = serial_in(up, UART_MSR);
status = serial_in(up, UART_MSR);
if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI) {
if (status & UART_MSR_TERI)
up->port.icount.rng++;
if (status & UART_MSR_DDSR)
up->port.icount.dsr++;
if (status & UART_MSR_DDCD)
uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
if (status & UART_MSR_DCTS)
uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
if ((status & UART_MSR_ANY_DELTA) == 0)
return;
wake_up_interruptible(&up->port.info->delta_msr_wait);
}
if (status & UART_MSR_TERI)
up->port.icount.rng++;
if (status & UART_MSR_DDSR)
up->port.icount.dsr++;
if (status & UART_MSR_DDCD)
uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
if (status & UART_MSR_DCTS)
uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
wake_up_interruptible(&up->port.info->delta_msr_wait);
return status;
}
/*
@ -1282,7 +1281,11 @@ static _INLINE_ void check_modem_status(struct uart_8250_port *up)
static inline void
serial8250_handle_port(struct uart_8250_port *up, struct pt_regs *regs)
{
unsigned int status = serial_inp(up, UART_LSR);
unsigned int status;
spin_lock(&up->port.lock);
status = serial_inp(up, UART_LSR);
DEBUG_INTR("status = %x...", status);
@ -1291,6 +1294,8 @@ serial8250_handle_port(struct uart_8250_port *up, struct pt_regs *regs)
check_modem_status(up);
if (status & UART_LSR_THRE)
transmit_chars(up);
spin_unlock(&up->port.lock);
}
/*
@ -1326,9 +1331,7 @@ static irqreturn_t serial8250_interrupt(int irq, void *dev_id, struct pt_regs *r
iir = serial_in(up, UART_IIR);
if (!(iir & UART_IIR_NO_INT)) {
spin_lock(&up->port.lock);
serial8250_handle_port(up, regs);
spin_unlock(&up->port.lock);
handled = 1;
@ -1427,11 +1430,8 @@ static void serial8250_timeout(unsigned long data)
unsigned int iir;
iir = serial_in(up, UART_IIR);
if (!(iir & UART_IIR_NO_INT)) {
spin_lock(&up->port.lock);
if (!(iir & UART_IIR_NO_INT))
serial8250_handle_port(up, NULL);
spin_unlock(&up->port.lock);
}
timeout = up->port.timeout;
timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
@ -1454,10 +1454,10 @@ static unsigned int serial8250_tx_empty(struct uart_port *port)
static unsigned int serial8250_get_mctrl(struct uart_port *port)
{
struct uart_8250_port *up = (struct uart_8250_port *)port;
unsigned char status;
unsigned int status;
unsigned int ret;
status = serial_in(up, UART_MSR);
status = check_modem_status(up);
ret = 0;
if (status & UART_MSR_DCD)
@ -2300,9 +2300,7 @@ static int __init find_port(struct uart_port *p)
for (line = 0; line < UART_NR; line++) {
port = &serial8250_ports[line].port;
if (p->iotype == port->iotype &&
p->iobase == port->iobase &&
p->membase == port->membase)
if (uart_match_port(p, port))
return line;
}
return -ENODEV;

View File

@ -51,12 +51,6 @@ struct serial8250_config {
#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
#define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
#if defined(__i386__) && (defined(CONFIG_M386) || defined(CONFIG_M486))
#define _INLINE_ inline
#else
#define _INLINE_
#endif
#define PROBE_RSA (1 << 0)
#define PROBE_ANY (~0)

View File

@ -837,8 +837,8 @@ static struct pci_serial_quirk *find_quirk(struct pci_dev *dev)
return quirk;
}
static _INLINE_ int
get_pci_irq(struct pci_dev *dev, struct pciserial_board *board)
static inline int get_pci_irq(struct pci_dev *dev,
struct pciserial_board *board)
{
if (board->flags & FL_NOIRQ)
return 0;
@ -853,14 +853,15 @@ get_pci_irq(struct pci_dev *dev, struct pciserial_board *board)
* driver_data member.
*
* The makeup of these names are:
* pbn_bn{_bt}_n_baud
* pbn_bn{_bt}_n_baud{_offsetinhex}
*
* bn = PCI BAR number
* bt = Index using PCI BARs
* n = number of serial ports
* baud = baud rate
* bn = PCI BAR number
* bt = Index using PCI BARs
* n = number of serial ports
* baud = baud rate
* offsetinhex = offset for each sequential port (in hex)
*
* This table is sorted by (in order): baud, bt, bn, n.
* This table is sorted by (in order): bn, bt, baud, offsetindex, n.
*
* Please note: in theory if n = 1, _bt infix should make no difference.
* ie, pbn_b0_1_115200 is the same as pbn_b0_bt_1_115200
@ -881,6 +882,13 @@ enum pci_board_num_t {
pbn_b0_4_1152000,
pbn_b0_2_1843200,
pbn_b0_4_1843200,
pbn_b0_2_1843200_200,
pbn_b0_4_1843200_200,
pbn_b0_8_1843200_200,
pbn_b0_bt_1_115200,
pbn_b0_bt_2_115200,
pbn_b0_bt_8_115200,
@ -904,6 +912,8 @@ enum pci_board_num_t {
pbn_b1_4_921600,
pbn_b1_8_921600,
pbn_b1_2_1250000,
pbn_b1_bt_2_921600,
pbn_b1_1_1382400,
@ -1029,6 +1039,38 @@ static struct pciserial_board pci_boards[] __devinitdata = {
.uart_offset = 8,
},
[pbn_b0_2_1843200] = {
.flags = FL_BASE0,
.num_ports = 2,
.base_baud = 1843200,
.uart_offset = 8,
},
[pbn_b0_4_1843200] = {
.flags = FL_BASE0,
.num_ports = 4,
.base_baud = 1843200,
.uart_offset = 8,
},
[pbn_b0_2_1843200_200] = {
.flags = FL_BASE0,
.num_ports = 2,
.base_baud = 1843200,
.uart_offset = 0x200,
},
[pbn_b0_4_1843200_200] = {
.flags = FL_BASE0,
.num_ports = 4,
.base_baud = 1843200,
.uart_offset = 0x200,
},
[pbn_b0_8_1843200_200] = {
.flags = FL_BASE0,
.num_ports = 8,
.base_baud = 1843200,
.uart_offset = 0x200,
},
[pbn_b0_bt_1_115200] = {
.flags = FL_BASE0|FL_BASE_BARS,
.num_ports = 1,
@ -1141,6 +1183,12 @@ static struct pciserial_board pci_boards[] __devinitdata = {
.base_baud = 921600,
.uart_offset = 8,
},
[pbn_b1_2_1250000] = {
.flags = FL_BASE1,
.num_ports = 2,
.base_baud = 1250000,
.uart_offset = 8,
},
[pbn_b1_bt_2_921600] = {
.flags = FL_BASE1|FL_BASE_BARS,
@ -1801,6 +1849,66 @@ static struct pci_device_id serial_pci_tbl[] = {
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1, 0, 0,
pbn_b1_4_921600 },
{ PCI_VENDOR_ID_V3, PCI_DEVICE_ID_V3_V351,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_20MHZ, 0, 0,
pbn_b1_2_1250000 },
{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_2, 0, 0,
pbn_b0_2_1843200 },
{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4, 0, 0,
pbn_b0_4_1843200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232, 0, 0,
pbn_b0_2_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_232, 0, 0,
pbn_b0_4_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_232, 0, 0,
pbn_b0_8_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_1_1, 0, 0,
pbn_b0_2_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_2, 0, 0,
pbn_b0_4_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_4, 0, 0,
pbn_b0_8_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2, 0, 0,
pbn_b0_2_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4, 0, 0,
pbn_b0_4_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8, 0, 0,
pbn_b0_8_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_485, 0, 0,
pbn_b0_2_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C154,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485, 0, 0,
pbn_b0_4_1843200_200 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C158,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485, 0, 0,
pbn_b0_8_1843200_200 },
{ PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530,
PCI_ANY_ID, PCI_ANY_ID, 0, 0,

View File

@ -2307,7 +2307,7 @@ int uart_match_port(struct uart_port *port1, struct uart_port *port2)
return (port1->iobase == port2->iobase) &&
(port1->hub6 == port2->hub6);
case UPIO_MEM:
return (port1->membase == port2->membase);
return (port1->mapbase == port2->mapbase);
}
return 0;
}

View File

@ -1583,6 +1583,23 @@
#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_2_6 0x0009
#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1 0x000A
#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1 0x000B
#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_20MHZ 0x000C
#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_PTM 0x000D
#define PCI_SUBDEVICE_ID_CONNECT_TECH_NT960PCI 0x0100
#define PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_2 0x0201
#define PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4 0x0202
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232 0x0300
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_232 0x0301
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_232 0x0302
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_1_1 0x0310
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_2 0x0311
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_4 0x0312
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2 0x0320
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4 0x0321
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8 0x0322
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_485 0x0330
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485 0x0331
#define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485 0x0332
#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2