oprofile, x86: Add comments to IBS LVT offset initialization
Adding a comment in the code as IBS LVT setup is not obvious at all ... Signed-off-by: Robert Richter <robert.richter@amd.com>
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2 changed files with 11 additions and 5 deletions
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@ -390,7 +390,8 @@ static unsigned int reserve_eilvt_offset(int offset, unsigned int new)
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/*
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/*
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* If mask=1, the LVT entry does not generate interrupts while mask=0
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* If mask=1, the LVT entry does not generate interrupts while mask=0
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* enables the vector. See also the BKDGs.
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* enables the vector. See also the BKDGs. Must be called with
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* preemption disabled.
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*/
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*/
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int setup_APIC_eilvt(u8 offset, u8 vector, u8 msg_type, u8 mask)
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int setup_APIC_eilvt(u8 offset, u8 vector, u8 msg_type, u8 mask)
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@ -609,16 +609,21 @@ static int setup_ibs_ctl(int ibs_eilvt_off)
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return 0;
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return 0;
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}
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}
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/*
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* This runs only on the current cpu. We try to find an LVT offset and
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* setup the local APIC. For this we must disable preemption. On
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* success we initialize all nodes with this offset. This updates then
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* the offset in the IBS_CTL per-node msr. The per-core APIC setup of
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* the IBS interrupt vector is called from op_amd_setup_ctrs()/op_-
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* amd_cpu_shutdown() using the new offset.
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*/
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static int force_ibs_eilvt_setup(void)
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static int force_ibs_eilvt_setup(void)
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{
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{
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int offset;
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int offset;
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int ret;
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int ret;
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/*
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* find the next free available EILVT entry, skip offset 0,
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* pin search to this cpu
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*/
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preempt_disable();
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preempt_disable();
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/* find the next free available EILVT entry, skip offset 0 */
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for (offset = 1; offset < APIC_EILVT_NR_MAX; offset++) {
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for (offset = 1; offset < APIC_EILVT_NR_MAX; offset++) {
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if (get_eilvt(offset))
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if (get_eilvt(offset))
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break;
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break;
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