ath9k_hw: Implement spur mitigation on AR9003
Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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1 changed files with 49 additions and 1 deletions
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@ -106,7 +106,55 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
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static void ar9003_hw_spur_mitigate(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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/* TODO */
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u32 spur_freq[4] = { 2420, 2440, 2464, 2480 };
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int cur_bb_spur, negative = 0, cck_spur_freq;
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int i;
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/*
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* Need to verify range +/- 10 MHz in control channel, otherwise spur
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* is out-of-band and can be ignored.
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*/
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for (i = 0; i < 4; i++) {
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negative = 0;
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cur_bb_spur = spur_freq[i] - chan->channel;
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if (cur_bb_spur < 0) {
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negative = 1;
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cur_bb_spur = -cur_bb_spur;
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}
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if (cur_bb_spur < 10) {
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cck_spur_freq = (int)((cur_bb_spur << 19) / 11);
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if (negative == 1)
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cck_spur_freq = -cck_spur_freq;
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cck_spur_freq = cck_spur_freq & 0xfffff;
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REG_RMW_FIELD(ah, AR_PHY_AGC_CONTROL,
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AR_PHY_AGC_CONTROL_YCOK_MAX, 0x7);
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REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT,
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AR_PHY_CCK_SPUR_MIT_SPUR_RSSI_THR, 0x7f);
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REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT,
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AR_PHY_CCK_SPUR_MIT_SPUR_FILTER_TYPE,
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0x2);
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REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT,
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AR_PHY_CCK_SPUR_MIT_USE_CCK_SPUR_MIT,
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0x1);
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REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT,
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AR_PHY_CCK_SPUR_MIT_CCK_SPUR_FREQ,
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cck_spur_freq);
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return;
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}
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}
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REG_RMW_FIELD(ah, AR_PHY_AGC_CONTROL,
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AR_PHY_AGC_CONTROL_YCOK_MAX, 0x5);
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REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT,
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AR_PHY_CCK_SPUR_MIT_USE_CCK_SPUR_MIT, 0x0);
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REG_RMW_FIELD(ah, AR_PHY_CCK_SPUR_MIT,
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AR_PHY_CCK_SPUR_MIT_CCK_SPUR_FREQ, 0x0);
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}
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static u32 ar9003_hw_compute_pll_control(struct ath_hw *ah,
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