b43: Fix beacon BH update
This fixes beacon updating in the bottomhalf. In case the device is busy, we will defer to later in the IRQ handler. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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84363e6e07
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2 changed files with 54 additions and 42 deletions
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@ -411,7 +411,6 @@ enum {
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#define B43_IRQ_ALL 0xFFFFFFFF
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#define B43_IRQ_MASKTEMPLATE (B43_IRQ_MAC_SUSPENDED | \
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B43_IRQ_BEACON | \
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B43_IRQ_TBTT_INDI | \
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B43_IRQ_ATIM_END | \
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B43_IRQ_PMQ | \
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@ -1448,6 +1448,53 @@ static void b43_write_probe_resp_template(struct b43_wldev *dev,
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kfree(probe_resp_data);
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}
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static void handle_irq_beacon(struct b43_wldev *dev)
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{
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struct b43_wl *wl = dev->wl;
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u32 cmd, beacon0_valid, beacon1_valid;
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if (!b43_is_mode(wl, IEEE80211_IF_TYPE_AP))
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return;
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/* This is the bottom half of the asynchronous beacon update. */
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/* Ignore interrupt in the future. */
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dev->irq_savedstate &= ~B43_IRQ_BEACON;
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cmd = b43_read32(dev, B43_MMIO_MACCMD);
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beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
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beacon1_valid = (cmd & B43_MACCMD_BEACON1_VALID);
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/* Schedule interrupt manually, if busy. */
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if (beacon0_valid && beacon1_valid) {
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b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON);
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dev->irq_savedstate |= B43_IRQ_BEACON;
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return;
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}
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if (!beacon0_valid) {
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if (!wl->beacon0_uploaded) {
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b43_write_beacon_template(dev, 0x68, 0x18,
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B43_CCK_RATE_1MB);
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b43_write_probe_resp_template(dev, 0x268, 0x4A,
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&__b43_ratetable[3]);
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wl->beacon0_uploaded = 1;
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}
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cmd = b43_read32(dev, B43_MMIO_MACCMD);
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cmd |= B43_MACCMD_BEACON0_VALID;
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b43_write32(dev, B43_MMIO_MACCMD, cmd);
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} else if (!beacon1_valid) {
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if (!wl->beacon1_uploaded) {
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b43_write_beacon_template(dev, 0x468, 0x1A,
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B43_CCK_RATE_1MB);
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wl->beacon1_uploaded = 1;
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}
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cmd = b43_read32(dev, B43_MMIO_MACCMD);
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cmd |= B43_MACCMD_BEACON1_VALID;
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b43_write32(dev, B43_MMIO_MACCMD, cmd);
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}
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}
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static void b43_beacon_update_trigger_work(struct work_struct *work)
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{
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struct b43_wl *wl = container_of(work, struct b43_wl,
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@ -1457,13 +1504,14 @@ static void b43_beacon_update_trigger_work(struct work_struct *work)
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mutex_lock(&wl->mutex);
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dev = wl->current_dev;
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if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
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/* Force the microcode to trigger the
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* beacon update bottom-half IRQ. */
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spin_lock_irq(&wl->irq_lock);
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b43_write32(dev, B43_MMIO_MACCMD,
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b43_read32(dev, B43_MMIO_MACCMD)
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| B43_MACCMD_BEACON0_VALID
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| B43_MACCMD_BEACON1_VALID);
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/* update beacon right away or defer to irq */
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dev->irq_savedstate = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
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handle_irq_beacon(dev);
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/* The handler might have updated the IRQ mask. */
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b43_write32(dev, B43_MMIO_GEN_IRQ_MASK,
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dev->irq_savedstate);
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mmiowb();
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spin_unlock_irq(&wl->irq_lock);
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}
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mutex_unlock(&wl->mutex);
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@ -1520,41 +1568,6 @@ static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int)
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b43dbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
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}
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static void handle_irq_beacon(struct b43_wldev *dev)
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{
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struct b43_wl *wl = dev->wl;
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u32 cmd, beacon0_valid, beacon1_valid;
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if (!b43_is_mode(wl, IEEE80211_IF_TYPE_AP))
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return;
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/* This is the bottom half of the asynchronous beacon update. */
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cmd = b43_read32(dev, B43_MMIO_MACCMD);
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beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
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beacon1_valid = (cmd & B43_MACCMD_BEACON1_VALID);
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cmd &= ~(B43_MACCMD_BEACON0_VALID | B43_MACCMD_BEACON1_VALID);
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if (!beacon0_valid) {
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if (!wl->beacon0_uploaded) {
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b43_write_beacon_template(dev, 0x68, 0x18,
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B43_CCK_RATE_1MB);
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b43_write_probe_resp_template(dev, 0x268, 0x4A,
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&__b43_ratetable[3]);
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wl->beacon0_uploaded = 1;
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}
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cmd |= B43_MACCMD_BEACON0_VALID;
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} else if (!beacon1_valid) {
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if (!wl->beacon1_uploaded) {
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b43_write_beacon_template(dev, 0x468, 0x1A,
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B43_CCK_RATE_1MB);
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wl->beacon1_uploaded = 1;
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}
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cmd |= B43_MACCMD_BEACON1_VALID;
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}
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b43_write32(dev, B43_MMIO_MACCMD, cmd);
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}
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static void handle_irq_ucode_debug(struct b43_wldev *dev)
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{
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//TODO
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