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perf_counter/x86: Always use NMI for performance-monitoring interrupt 

Always use NMI for performance-monitoring interrupt as there could be
racy situations if we switch between irq and nmi mode frequently.

Signed-off-by: Yong Wang <yong.y.wang@intel.com>
LKML-Reference: <20090529052835.GA13657@ywang-moblin2.bj.intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Yong Wang 2009-05-29 13:28:35 +08:00 committed by Ingo Molnar
parent da417a7537
commit c323d95fa4
3 changed files with 8 additions and 17 deletions
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4
arch/x86/include/asm/perf_counter.h
View File

@ -91,10 +91,10 @@ extern void set_perf_counter_pending(void);
#ifdef CONFIG_PERF_COUNTERS #ifdef CONFIG_PERF_COUNTERS
extern void init_hw_perf_counters(void); extern void init_hw_perf_counters(void);
extern void perf_counters_lapic_init(int nmi); extern void perf_counters_lapic_init(void);
#else #else
static inline void init_hw_perf_counters(void) { } static inline void init_hw_perf_counters(void) { }
static inline void perf_counters_lapic_init(int nmi) { } static inline void perf_counters_lapic_init(void) { }
#endif #endif
#endif /* _ASM_X86_PERF_COUNTER_H */ #endif /* _ASM_X86_PERF_COUNTER_H */

2
arch/x86/kernel/apic/apic.c
View File

@ -1135,7 +1135,7 @@ void __cpuinit setup_local_APIC(void)
apic_write(APIC_ESR, 0); apic_write(APIC_ESR, 0);
} }
#endif #endif
perf_counters_lapic_init(0); perf_counters_lapic_init();
preempt_disable(); preempt_disable();

19
arch/x86/kernel/cpu/perf_counter.c
View File

@ -604,7 +604,7 @@ try_generic:
hwc->counter_base = x86_pmu.perfctr; hwc->counter_base = x86_pmu.perfctr;
} }
perf_counters_lapic_init(hwc->nmi); perf_counters_lapic_init();
x86_pmu.disable(hwc, idx); x86_pmu.disable(hwc, idx);
@ -863,24 +863,15 @@ void set_perf_counter_pending(void)
apic->send_IPI_self(LOCAL_PENDING_VECTOR); apic->send_IPI_self(LOCAL_PENDING_VECTOR);
} }
void perf_counters_lapic_init(int nmi) void perf_counters_lapic_init(void)
{ {
u32 apic_val;
if (!x86_pmu_initialized()) if (!x86_pmu_initialized())
return; return;
/* /*
* Enable the performance counter vector in the APIC LVT: * Always use NMI for PMU
*/ */
apic_val = apic_read(APIC_LVTERR); apic_write(APIC_LVTPC, APIC_DM_NMI);
apic_write(APIC_LVTERR, apic_val | APIC_LVT_MASKED);
if (nmi)
apic_write(APIC_LVTPC, APIC_DM_NMI);
else
apic_write(APIC_LVTPC, LOCAL_PERF_VECTOR);
apic_write(APIC_LVTERR, apic_val);
} }
static int __kprobes static int __kprobes
@ -1054,7 +1045,7 @@ void __init init_hw_perf_counters(void)
pr_info("... counter mask: %016Lx\n", perf_counter_mask); pr_info("... counter mask: %016Lx\n", perf_counter_mask);
perf_counters_lapic_init(0); perf_counters_lapic_init();
register_die_notifier(&perf_counter_nmi_notifier); register_die_notifier(&perf_counter_nmi_notifier);
} }