Merge branch 'sh/g3-prep'
This commit is contained in:
commit
bc0f424faa
16 changed files with 197 additions and 175 deletions
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@ -20,7 +20,7 @@
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#include <linux/smc911x.h>
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#include <linux/smc911x.h>
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#include <media/soc_camera_platform.h>
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#include <media/soc_camera_platform.h>
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#include <media/sh_mobile_ceu.h>
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#include <media/sh_mobile_ceu.h>
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#include <asm/sh_mobile_lcdc.h>
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#include <video/sh_mobile_lcdc.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/clock.h>
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#include <asm/clock.h>
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@ -17,7 +17,7 @@
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <asm/sh_mobile_lcdc.h>
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#include <video/sh_mobile_lcdc.h>
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#include <asm/migor.h>
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#include <asm/migor.h>
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/* LCD Module is a PH240320T according to board schematics. This module
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/* LCD Module is a PH240320T according to board schematics. This module
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@ -19,11 +19,11 @@
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#include <linux/clk.h>
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#include <linux/clk.h>
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#include <media/soc_camera_platform.h>
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#include <media/soc_camera_platform.h>
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#include <media/sh_mobile_ceu.h>
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#include <media/sh_mobile_ceu.h>
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#include <video/sh_mobile_lcdc.h>
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#include <asm/clock.h>
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#include <asm/clock.h>
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#include <asm/machvec.h>
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#include <asm/machvec.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/sh_keysc.h>
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#include <asm/sh_keysc.h>
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#include <asm/sh_mobile_lcdc.h>
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#include <asm/migor.h>
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#include <asm/migor.h>
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/* Address IRQ Size Bus Description
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/* Address IRQ Size Bus Description
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@ -2,6 +2,7 @@
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#define __ASM_SH_HW_IRQ_H
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#define __ASM_SH_HW_IRQ_H
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/sh_intc.h>
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#include <asm/atomic.h>
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#include <asm/atomic.h>
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extern atomic_t irq_err_count;
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extern atomic_t irq_err_count;
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@ -23,101 +24,12 @@ struct ipr_desc {
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void register_ipr_controller(struct ipr_desc *);
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void register_ipr_controller(struct ipr_desc *);
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typedef unsigned char intc_enum;
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struct intc_vect {
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intc_enum enum_id;
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unsigned short vect;
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};
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#define INTC_VECT(enum_id, vect) { enum_id, vect }
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#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
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struct intc_group {
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intc_enum enum_id;
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intc_enum enum_ids[32];
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};
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#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
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struct intc_mask_reg {
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unsigned long set_reg, clr_reg, reg_width;
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intc_enum enum_ids[32];
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#ifdef CONFIG_SMP
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unsigned long smp;
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#endif
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};
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struct intc_prio_reg {
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unsigned long set_reg, clr_reg, reg_width, field_width;
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intc_enum enum_ids[16];
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#ifdef CONFIG_SMP
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unsigned long smp;
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#endif
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};
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struct intc_sense_reg {
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unsigned long reg, reg_width, field_width;
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intc_enum enum_ids[16];
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};
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#ifdef CONFIG_SMP
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#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
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#else
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#define INTC_SMP(stride, nr)
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#endif
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struct intc_desc {
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struct intc_vect *vectors;
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unsigned int nr_vectors;
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struct intc_group *groups;
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unsigned int nr_groups;
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struct intc_mask_reg *mask_regs;
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unsigned int nr_mask_regs;
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struct intc_prio_reg *prio_regs;
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unsigned int nr_prio_regs;
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struct intc_sense_reg *sense_regs;
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unsigned int nr_sense_regs;
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char *name;
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#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
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struct intc_mask_reg *ack_regs;
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unsigned int nr_ack_regs;
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#endif
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};
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#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
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#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
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mask_regs, prio_regs, sense_regs) \
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struct intc_desc symbol __initdata = { \
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_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
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_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
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_INTC_ARRAY(sense_regs), \
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chipname, \
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}
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#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
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#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
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mask_regs, prio_regs, sense_regs, ack_regs) \
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struct intc_desc symbol __initdata = { \
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_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
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_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
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_INTC_ARRAY(sense_regs), \
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chipname, \
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_INTC_ARRAY(ack_regs), \
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}
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#endif
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void __init register_intc_controller(struct intc_desc *desc);
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int intc_set_priority(unsigned int irq, unsigned int prio);
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void __init plat_irq_setup(void);
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void __init plat_irq_setup(void);
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#ifdef CONFIG_CPU_SH3
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void __init plat_irq_setup_sh3(void);
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void __init plat_irq_setup_sh3(void);
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#endif
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void __init plat_irq_setup_pins(int mode);
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enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
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enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
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IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
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IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
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IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
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IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
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void __init plat_irq_setup_pins(int mode);
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#endif /* __ASM_SH_HW_IRQ_H */
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#endif /* __ASM_SH_HW_IRQ_H */
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@ -101,44 +101,33 @@
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#define outsw __outsw
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#define outsw __outsw
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#define outsl __outsl
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#define outsl __outsl
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#define __raw_readb(a) __readb((void __iomem *)(a))
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#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v))
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#define __raw_readw(a) __readw((void __iomem *)(a))
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#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))
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#define __raw_readl(a) __readl((void __iomem *)(a))
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#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a) = (v))
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#define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a))
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#define __raw_writew(v, a) __writew(v, (void __iomem *)(a))
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#define __raw_writel(v, a) __writel(v, (void __iomem *)(a))
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void __raw_writesl(unsigned long addr, const void *data, int longlen);
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#define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a))
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void __raw_readsl(unsigned long addr, void *data, int longlen);
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#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
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#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
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void __raw_writesl(void __iomem *addr, const void *data, int longlen);
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void __raw_readsl(const void __iomem *addr, void *data, int longlen);
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/*
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/*
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* The platform header files may define some of these macros to use
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* The platform header files may define some of these macros to use
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* the inlined versions where appropriate. These macros may also be
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* the inlined versions where appropriate. These macros may also be
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* redefined by userlevel programs.
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* redefined by userlevel programs.
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*/
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*/
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#ifdef __readb
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#define readb(a) ({ unsigned int r_ = __readb(a); mb(); r_; })
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# define readb(a) ({ unsigned int r_ = __raw_readb(a); mb(); r_; })
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#define readw(a) ({ unsigned int r_ = __readw(a); mb(); r_; })
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#endif
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#define readl(a) ({ unsigned int r_ = __readl(a); mb(); r_; })
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#ifdef __raw_readw
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# define readw(a) ({ unsigned int r_ = __raw_readw(a); mb(); r_; })
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#endif
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#ifdef __raw_readl
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# define readl(a) ({ unsigned int r_ = __raw_readl(a); mb(); r_; })
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#endif
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#ifdef __raw_writeb
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#define writeb(v,a) ({ __writeb((v),(a)); mb(); })
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# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
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#define writew(v,a) ({ __writew((v),(a)); mb(); })
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#endif
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#define writel(v,a) ({ __writel((v),(a)); mb(); })
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#ifdef __raw_writew
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# define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
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#endif
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#ifdef __raw_writel
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# define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
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#endif
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#define __BUILD_MEMORY_STRING(bwlq, type) \
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#define __BUILD_MEMORY_STRING(bwlq, type) \
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\
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\
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static inline void writes##bwlq(volatile void __iomem *mem, \
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static inline void __raw_writes##bwlq(volatile void __iomem *mem, \
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const void *addr, unsigned int count) \
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const void *addr, unsigned int count) \
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{ \
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{ \
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const volatile type *__addr = addr; \
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const volatile type *__addr = addr; \
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@ -149,8 +138,8 @@ static inline void writes##bwlq(volatile void __iomem *mem, \
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} \
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} \
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} \
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} \
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\
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\
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static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
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static inline void __raw_reads##bwlq(volatile void __iomem *mem, \
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unsigned int count) \
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void *addr, unsigned int count) \
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{ \
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{ \
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volatile type *__addr = addr; \
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volatile type *__addr = addr; \
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\
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\
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@ -162,7 +151,13 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
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__BUILD_MEMORY_STRING(b, u8)
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__BUILD_MEMORY_STRING(b, u8)
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__BUILD_MEMORY_STRING(w, u16)
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__BUILD_MEMORY_STRING(w, u16)
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#define writesb __raw_writesb
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#define writesw __raw_writesw
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#define writesl __raw_writesl
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#define writesl __raw_writesl
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#define readsb __raw_readsb
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#define readsw __raw_readsw
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#define readsl __raw_readsl
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#define readsl __raw_readsl
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#define readb_relaxed(a) readb(a)
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#define readb_relaxed(a) readb(a)
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@ -170,25 +165,25 @@ __BUILD_MEMORY_STRING(w, u16)
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#define readl_relaxed(a) readl(a)
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#define readl_relaxed(a) readl(a)
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/* Simple MMIO */
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/* Simple MMIO */
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#define ioread8(a) readb(a)
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#define ioread8(a) __raw_readb(a)
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#define ioread16(a) readw(a)
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#define ioread16(a) __raw_readw(a)
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#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
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#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
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#define ioread32(a) readl(a)
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#define ioread32(a) __raw_readl(a)
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#define ioread32be(a) be32_to_cpu(__raw_readl((a)))
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#define ioread32be(a) be32_to_cpu(__raw_readl((a)))
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#define iowrite8(v,a) writeb((v),(a))
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#define iowrite8(v,a) __raw_writeb((v),(a))
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#define iowrite16(v,a) writew((v),(a))
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#define iowrite16(v,a) __raw_writew((v),(a))
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#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
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#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
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#define iowrite32(v,a) writel((v),(a))
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#define iowrite32(v,a) __raw_writel((v),(a))
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#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
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#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
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#define ioread8_rep(a, d, c) readsb((a), (d), (c))
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#define ioread8_rep(a, d, c) __raw_readsb((a), (d), (c))
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#define ioread16_rep(a, d, c) readsw((a), (d), (c))
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#define ioread16_rep(a, d, c) __raw_readsw((a), (d), (c))
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#define ioread32_rep(a, d, c) readsl((a), (d), (c))
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#define ioread32_rep(a, d, c) __raw_readsl((a), (d), (c))
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||||||
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#define iowrite8_rep(a, s, c) writesb((a), (s), (c))
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#define iowrite8_rep(a, s, c) __raw_writesb((a), (s), (c))
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||||||
#define iowrite16_rep(a, s, c) writesw((a), (s), (c))
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#define iowrite16_rep(a, s, c) __raw_writesw((a), (s), (c))
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||||||
#define iowrite32_rep(a, s, c) writesl((a), (s), (c))
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#define iowrite32_rep(a, s, c) __raw_writesl((a), (s), (c))
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||||||
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#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */
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#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */
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@ -54,7 +54,7 @@
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||||||
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||||||
#define BSC_CS6ABCR 0xfec1001c
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#define BSC_CS6ABCR 0xfec1001c
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|
||||||
#include <asm/sh_mobile_lcdc.h>
|
#include <video/sh_mobile_lcdc.h>
|
||||||
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|
||||||
int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
|
int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
|
||||||
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
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struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
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||||||
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|
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@ -1,8 +1,6 @@
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||||||
#
|
#
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||||||
# Makefile for the Linux/SuperH CPU-specifc IRQ handlers.
|
# Makefile for the Linux/SuperH CPU-specifc IRQ handlers.
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||||||
#
|
#
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||||||
obj-y += intc.o
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|
||||||
|
|
||||||
obj-$(CONFIG_SUPERH32) += imask.o
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obj-$(CONFIG_SUPERH32) += imask.o
|
||||||
obj-$(CONFIG_CPU_SH5) += intc-sh5.o
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obj-$(CONFIG_CPU_SH5) += intc-sh5.o
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obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
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obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
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||||||
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|
|
@ -33,7 +33,7 @@ static void disable_ipr_irq(unsigned int irq)
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||||||
struct ipr_data *p = get_irq_chip_data(irq);
|
struct ipr_data *p = get_irq_chip_data(irq);
|
||||||
unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
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unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
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||||||
/* Set the priority in IPR to 0 */
|
/* Set the priority in IPR to 0 */
|
||||||
ctrl_outw(ctrl_inw(addr) & (0xffff ^ (0xf << p->shift)), addr);
|
__raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
|
||||||
}
|
}
|
||||||
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|
||||||
static void enable_ipr_irq(unsigned int irq)
|
static void enable_ipr_irq(unsigned int irq)
|
||||||
|
@ -41,7 +41,7 @@ static void enable_ipr_irq(unsigned int irq)
|
||||||
struct ipr_data *p = get_irq_chip_data(irq);
|
struct ipr_data *p = get_irq_chip_data(irq);
|
||||||
unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
|
unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
|
||||||
/* Set priority in IPR back to original value */
|
/* Set priority in IPR back to original value */
|
||||||
ctrl_outw(ctrl_inw(addr) | (p->priority << p->shift), addr);
|
__raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -14,12 +14,12 @@
|
||||||
#include <linux/module.h>
|
#include <linux/module.h>
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
|
|
||||||
void __raw_readsl(unsigned long addr, void *datap, int len)
|
void __raw_readsl(const void __iomem *addr, void *datap, int len)
|
||||||
{
|
{
|
||||||
u32 *data;
|
u32 *data;
|
||||||
|
|
||||||
for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--)
|
for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--)
|
||||||
*data++ = ctrl_inl(addr);
|
*data++ = __raw_readl(addr);
|
||||||
|
|
||||||
if (likely(len >= (0x20 >> 2))) {
|
if (likely(len >= (0x20 >> 2))) {
|
||||||
int tmp2, tmp3, tmp4, tmp5, tmp6;
|
int tmp2, tmp3, tmp4, tmp5, tmp6;
|
||||||
|
@ -59,11 +59,11 @@ void __raw_readsl(unsigned long addr, void *datap, int len)
|
||||||
}
|
}
|
||||||
|
|
||||||
for (; len != 0; len--)
|
for (; len != 0; len--)
|
||||||
*data++ = ctrl_inl(addr);
|
*data++ = __raw_readl(addr);
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(__raw_readsl);
|
EXPORT_SYMBOL(__raw_readsl);
|
||||||
|
|
||||||
void __raw_writesl(unsigned long addr, const void *data, int len)
|
void __raw_writesl(void __iomem *addr, const void *data, int len)
|
||||||
{
|
{
|
||||||
if (likely(len != 0)) {
|
if (likely(len != 0)) {
|
||||||
int tmp1;
|
int tmp1;
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
*
|
*
|
||||||
* SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
|
* SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
|
||||||
*
|
*
|
||||||
* Copyright (C) 2002 - 2006 Paul Mundt
|
* Copyright (C) 2002 - 2008 Paul Mundt
|
||||||
* Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
|
* Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
|
||||||
*
|
*
|
||||||
* based off of the old drivers/char/sh-sci.c by:
|
* based off of the old drivers/char/sh-sci.c by:
|
||||||
|
@ -46,6 +46,7 @@
|
||||||
#include <linux/cpufreq.h>
|
#include <linux/cpufreq.h>
|
||||||
#include <linux/clk.h>
|
#include <linux/clk.h>
|
||||||
#include <linux/ctype.h>
|
#include <linux/ctype.h>
|
||||||
|
#include <linux/err.h>
|
||||||
|
|
||||||
#ifdef CONFIG_SUPERH
|
#ifdef CONFIG_SUPERH
|
||||||
#include <asm/clock.h>
|
#include <asm/clock.h>
|
||||||
|
@ -1132,12 +1133,16 @@ static void sci_config_port(struct uart_port *port, int flags)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
|
if (port->flags & UPF_IOREMAP && !port->membase) {
|
||||||
if (port->mapbase == 0)
|
#if defined(CONFIG_SUPERH64)
|
||||||
port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
|
port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
|
||||||
|
port->membase = (void __iomem *)port->mapbase;
|
||||||
port->membase = (void __iomem *)port->mapbase;
|
#else
|
||||||
|
port->membase = ioremap_nocache(port->mapbase, 0x40);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
printk(KERN_ERR "sci: can't remap port#%d\n", port->line);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
|
static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
|
||||||
|
@ -1423,7 +1428,7 @@ static struct uart_driver sci_uart_driver = {
|
||||||
static int __devinit sci_probe(struct platform_device *dev)
|
static int __devinit sci_probe(struct platform_device *dev)
|
||||||
{
|
{
|
||||||
struct plat_sci_port *p = dev->dev.platform_data;
|
struct plat_sci_port *p = dev->dev.platform_data;
|
||||||
int i;
|
int i, ret = -EINVAL;
|
||||||
|
|
||||||
for (i = 0; p && p->flags != 0; p++, i++) {
|
for (i = 0; p && p->flags != 0; p++, i++) {
|
||||||
struct sci_port *sciport = &sci_ports[i];
|
struct sci_port *sciport = &sci_ports[i];
|
||||||
|
@ -1440,12 +1445,22 @@ static int __devinit sci_probe(struct platform_device *dev)
|
||||||
|
|
||||||
sciport->port.mapbase = p->mapbase;
|
sciport->port.mapbase = p->mapbase;
|
||||||
|
|
||||||
/*
|
if (p->mapbase && !p->membase) {
|
||||||
* For the simple (and majority of) cases where we don't need
|
if (p->flags & UPF_IOREMAP) {
|
||||||
* to do any remapping, just cast the cookie directly.
|
p->membase = ioremap_nocache(p->mapbase, 0x40);
|
||||||
*/
|
if (IS_ERR(p->membase)) {
|
||||||
if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
|
ret = PTR_ERR(p->membase);
|
||||||
p->membase = (void __iomem *)p->mapbase;
|
goto err_unreg;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
/*
|
||||||
|
* For the simple (and majority of) cases
|
||||||
|
* where we don't need to do any remapping,
|
||||||
|
* just cast the cookie directly.
|
||||||
|
*/
|
||||||
|
p->membase = (void __iomem *)p->mapbase;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
sciport->port.membase = p->membase;
|
sciport->port.membase = p->membase;
|
||||||
|
|
||||||
|
@ -1476,6 +1491,12 @@ static int __devinit sci_probe(struct platform_device *dev)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
err_unreg:
|
||||||
|
for (i = i - 1; i >= 0; i--)
|
||||||
|
uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
|
||||||
|
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __devexit sci_remove(struct platform_device *dev)
|
static int __devexit sci_remove(struct platform_device *dev)
|
||||||
|
|
|
@ -320,18 +320,16 @@
|
||||||
#define SCI_EVENT_WRITE_WAKEUP 0
|
#define SCI_EVENT_WRITE_WAKEUP 0
|
||||||
|
|
||||||
#define SCI_IN(size, offset) \
|
#define SCI_IN(size, offset) \
|
||||||
unsigned int addr = port->mapbase + (offset); \
|
|
||||||
if ((size) == 8) { \
|
if ((size) == 8) { \
|
||||||
return ctrl_inb(addr); \
|
return ioread8(port->membase + (offset)); \
|
||||||
} else { \
|
} else { \
|
||||||
return ctrl_inw(addr); \
|
return ioread16(port->membase + (offset)); \
|
||||||
}
|
}
|
||||||
#define SCI_OUT(size, offset, value) \
|
#define SCI_OUT(size, offset, value) \
|
||||||
unsigned int addr = port->mapbase + (offset); \
|
|
||||||
if ((size) == 8) { \
|
if ((size) == 8) { \
|
||||||
ctrl_outb(value, addr); \
|
iowrite8(value, port->membase + (offset)); \
|
||||||
} else if ((size) == 16) { \
|
} else if ((size) == 16) { \
|
||||||
ctrl_outw(value, addr); \
|
iowrite16(value, port->membase + (offset)); \
|
||||||
}
|
}
|
||||||
|
|
||||||
#define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\
|
#define CPU_SCIx_FNS(name, sci_offset, sci_size, scif_offset, scif_size)\
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
#
|
#
|
||||||
# Makefile for the SuperH specific drivers.
|
# Makefile for the SuperH specific drivers.
|
||||||
#
|
#
|
||||||
|
|
||||||
obj-$(CONFIG_SUPERHYWAY) += superhyway/
|
obj-$(CONFIG_SUPERHYWAY) += superhyway/
|
||||||
obj-$(CONFIG_MAPLE) += maple/
|
obj-$(CONFIG_MAPLE) += maple/
|
||||||
|
obj-y += intc.o
|
||||||
|
|
|
@ -21,6 +21,7 @@
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/bootmem.h>
|
#include <linux/bootmem.h>
|
||||||
|
#include <linux/sh_intc.h>
|
||||||
|
|
||||||
#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
|
#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
|
||||||
((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
|
((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
|
||||||
|
@ -86,24 +87,24 @@ static inline unsigned int set_field(unsigned int value,
|
||||||
|
|
||||||
static void write_8(unsigned long addr, unsigned long h, unsigned long data)
|
static void write_8(unsigned long addr, unsigned long h, unsigned long data)
|
||||||
{
|
{
|
||||||
ctrl_outb(set_field(0, data, h), addr);
|
__raw_writeb(set_field(0, data, h), addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void write_16(unsigned long addr, unsigned long h, unsigned long data)
|
static void write_16(unsigned long addr, unsigned long h, unsigned long data)
|
||||||
{
|
{
|
||||||
ctrl_outw(set_field(0, data, h), addr);
|
__raw_writew(set_field(0, data, h), addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void write_32(unsigned long addr, unsigned long h, unsigned long data)
|
static void write_32(unsigned long addr, unsigned long h, unsigned long data)
|
||||||
{
|
{
|
||||||
ctrl_outl(set_field(0, data, h), addr);
|
__raw_writel(set_field(0, data, h), addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
|
static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
ctrl_outb(set_field(ctrl_inb(addr), data, h), addr);
|
__raw_writeb(set_field(__raw_readb(addr), data, h), addr);
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -111,7 +112,7 @@ static void modify_16(unsigned long addr, unsigned long h, unsigned long data)
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
ctrl_outw(set_field(ctrl_inw(addr), data, h), addr);
|
__raw_writew(set_field(__raw_readw(addr), data, h), addr);
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -119,7 +120,7 @@ static void modify_32(unsigned long addr, unsigned long h, unsigned long data)
|
||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
ctrl_outl(set_field(ctrl_inl(addr), data, h), addr);
|
__raw_writel(set_field(__raw_readl(addr), data, h), addr);
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -246,16 +247,16 @@ static void intc_mask_ack(unsigned int irq)
|
||||||
addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
|
addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
|
||||||
switch (_INTC_FN(handle)) {
|
switch (_INTC_FN(handle)) {
|
||||||
case REG_FN_MODIFY_BASE + 0: /* 8bit */
|
case REG_FN_MODIFY_BASE + 0: /* 8bit */
|
||||||
ctrl_inb(addr);
|
__raw_readb(addr);
|
||||||
ctrl_outb(0xff ^ set_field(0, 1, handle), addr);
|
__raw_writeb(0xff ^ set_field(0, 1, handle), addr);
|
||||||
break;
|
break;
|
||||||
case REG_FN_MODIFY_BASE + 1: /* 16bit */
|
case REG_FN_MODIFY_BASE + 1: /* 16bit */
|
||||||
ctrl_inw(addr);
|
__raw_readw(addr);
|
||||||
ctrl_outw(0xffff ^ set_field(0, 1, handle), addr);
|
__raw_writew(0xffff ^ set_field(0, 1, handle), addr);
|
||||||
break;
|
break;
|
||||||
case REG_FN_MODIFY_BASE + 3: /* 32bit */
|
case REG_FN_MODIFY_BASE + 3: /* 32bit */
|
||||||
ctrl_inl(addr);
|
__raw_readl(addr);
|
||||||
ctrl_outl(0xffffffff ^ set_field(0, 1, handle), addr);
|
__raw_writel(0xffffffff ^ set_field(0, 1, handle), addr);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
BUG();
|
BUG();
|
|
@ -16,7 +16,7 @@
|
||||||
#include <linux/clk.h>
|
#include <linux/clk.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/dma-mapping.h>
|
#include <linux/dma-mapping.h>
|
||||||
#include <asm/sh_mobile_lcdc.h>
|
#include <video/sh_mobile_lcdc.h>
|
||||||
|
|
||||||
#define PALETTE_NR 16
|
#define PALETTE_NR 16
|
||||||
|
|
||||||
|
@ -34,7 +34,9 @@ struct sh_mobile_lcdc_chan {
|
||||||
|
|
||||||
struct sh_mobile_lcdc_priv {
|
struct sh_mobile_lcdc_priv {
|
||||||
void __iomem *base;
|
void __iomem *base;
|
||||||
|
#ifdef CONFIG_HAVE_CLK
|
||||||
struct clk *clk;
|
struct clk *clk;
|
||||||
|
#endif
|
||||||
unsigned long lddckr;
|
unsigned long lddckr;
|
||||||
struct sh_mobile_lcdc_chan ch[2];
|
struct sh_mobile_lcdc_chan ch[2];
|
||||||
};
|
};
|
||||||
|
@ -422,6 +424,7 @@ static int sh_mobile_lcdc_setup_clocks(struct device *dev, int clock_source,
|
||||||
|
|
||||||
priv->lddckr = icksel << 16;
|
priv->lddckr = icksel << 16;
|
||||||
|
|
||||||
|
#ifdef CONFIG_HAVE_CLK
|
||||||
if (str) {
|
if (str) {
|
||||||
priv->clk = clk_get(dev, str);
|
priv->clk = clk_get(dev, str);
|
||||||
if (IS_ERR(priv->clk)) {
|
if (IS_ERR(priv->clk)) {
|
||||||
|
@ -431,6 +434,7 @@ static int sh_mobile_lcdc_setup_clocks(struct device *dev, int clock_source,
|
||||||
|
|
||||||
clk_enable(priv->clk);
|
clk_enable(priv->clk);
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -688,10 +692,12 @@ static int sh_mobile_lcdc_remove(struct platform_device *pdev)
|
||||||
fb_dealloc_cmap(&info->cmap);
|
fb_dealloc_cmap(&info->cmap);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_HAVE_CLK
|
||||||
if (priv->clk) {
|
if (priv->clk) {
|
||||||
clk_disable(priv->clk);
|
clk_disable(priv->clk);
|
||||||
clk_put(priv->clk);
|
clk_put(priv->clk);
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
if (priv->base)
|
if (priv->base)
|
||||||
iounmap(priv->base);
|
iounmap(priv->base);
|
||||||
|
|
91
include/linux/sh_intc.h
Normal file
91
include/linux/sh_intc.h
Normal file
|
@ -0,0 +1,91 @@
|
||||||
|
#ifndef __SH_INTC_H
|
||||||
|
#define __SH_INTC_H
|
||||||
|
|
||||||
|
typedef unsigned char intc_enum;
|
||||||
|
|
||||||
|
struct intc_vect {
|
||||||
|
intc_enum enum_id;
|
||||||
|
unsigned short vect;
|
||||||
|
};
|
||||||
|
|
||||||
|
#define INTC_VECT(enum_id, vect) { enum_id, vect }
|
||||||
|
#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
|
||||||
|
|
||||||
|
struct intc_group {
|
||||||
|
intc_enum enum_id;
|
||||||
|
intc_enum enum_ids[32];
|
||||||
|
};
|
||||||
|
|
||||||
|
#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
|
||||||
|
|
||||||
|
struct intc_mask_reg {
|
||||||
|
unsigned long set_reg, clr_reg, reg_width;
|
||||||
|
intc_enum enum_ids[32];
|
||||||
|
#ifdef CONFIG_SMP
|
||||||
|
unsigned long smp;
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
struct intc_prio_reg {
|
||||||
|
unsigned long set_reg, clr_reg, reg_width, field_width;
|
||||||
|
intc_enum enum_ids[16];
|
||||||
|
#ifdef CONFIG_SMP
|
||||||
|
unsigned long smp;
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
struct intc_sense_reg {
|
||||||
|
unsigned long reg, reg_width, field_width;
|
||||||
|
intc_enum enum_ids[16];
|
||||||
|
};
|
||||||
|
|
||||||
|
#ifdef CONFIG_SMP
|
||||||
|
#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
|
||||||
|
#else
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||||||
|
#define INTC_SMP(stride, nr)
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||||||
|
#endif
|
||||||
|
|
||||||
|
struct intc_desc {
|
||||||
|
struct intc_vect *vectors;
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||||||
|
unsigned int nr_vectors;
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||||||
|
struct intc_group *groups;
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||||||
|
unsigned int nr_groups;
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||||||
|
struct intc_mask_reg *mask_regs;
|
||||||
|
unsigned int nr_mask_regs;
|
||||||
|
struct intc_prio_reg *prio_regs;
|
||||||
|
unsigned int nr_prio_regs;
|
||||||
|
struct intc_sense_reg *sense_regs;
|
||||||
|
unsigned int nr_sense_regs;
|
||||||
|
char *name;
|
||||||
|
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
|
||||||
|
struct intc_mask_reg *ack_regs;
|
||||||
|
unsigned int nr_ack_regs;
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
|
||||||
|
#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
|
||||||
|
mask_regs, prio_regs, sense_regs) \
|
||||||
|
struct intc_desc symbol __initdata = { \
|
||||||
|
_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
|
||||||
|
_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
|
||||||
|
_INTC_ARRAY(sense_regs), \
|
||||||
|
chipname, \
|
||||||
|
}
|
||||||
|
|
||||||
|
#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
|
||||||
|
#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
|
||||||
|
mask_regs, prio_regs, sense_regs, ack_regs) \
|
||||||
|
struct intc_desc symbol __initdata = { \
|
||||||
|
_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
|
||||||
|
_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
|
||||||
|
_INTC_ARRAY(sense_regs), \
|
||||||
|
chipname, \
|
||||||
|
_INTC_ARRAY(ack_regs), \
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void __init register_intc_controller(struct intc_desc *desc);
|
||||||
|
int intc_set_priority(unsigned int irq, unsigned int prio);
|
||||||
|
|
||||||
|
#endif /* __SH_INTC_H */
|
Reference in a new issue