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ARM: OMAP4: Update timer clock aliases 

Commit "ARM: dts: OMAP4: Update timer addresses" updated the device-tree
names of the OMAP4 timers 5-7 because the default address for the timers
was changed from the L3 address to the MPU private address. When booting
with device-tree, this introduces a regression when attempting to set
the parent clock of timers 5-7 to the sys_clk_div_ck. Therefore, update
the clock aliases for timer 5-7 to reflect the updated device-tree name
for the timers.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
[paul@pwsan.com: updated to apply after the CCF conversion]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Jon Hunter 2012-12-15 01:35:39 -07:00 committed by Paul Walmsley
parent 7a280cf512
commit ba68c7eff5
1 changed files with 4 additions and 4 deletions
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8
arch/arm/mach-omap2/cclock44xx_data.c
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@ -1935,10 +1935,10 @@ static struct omap_clk omap44xx_clks[] = {
CLK("4803e000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X),
CLK("48086000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X),
CLK("48088000.timer", "timer_sys_ck", &sys_clkin_ck, CK_443X),
CLK("49038000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
CLK("4903a000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
CLK("4903c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
CLK("4903e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
CLK("40138000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
CLK("4013a000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
CLK("4013c000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
CLK("4013e000.timer", "timer_sys_ck", &syc_clk_div_ck, CK_443X),
CLK(NULL, "cpufreq_ck", &dpll_mpu_ck, CK_443X),
};