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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc 

* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (49 commits)
  [POWERPC] Add zImage.iseries to arch/powerpc/boot/.gitignore
  [POWERPC] bootwrapper: fix build error on virtex405-head.S
  [POWERPC] 4xx: Fix 460GT support to not enable FPU
  [POWERPC] 4xx: Add NOR FLASH entries to Canyonlands and Glacier dts
  [POWERPC] Xilinx: of_serial support for Xilinx uart 16550.
  [POWERPC] Xilinx: boot support for Xilinx uart 16550.
  [POWERPC] celleb: Add support for PCI Express
  [POWERPC] celleb: Move miscellaneous files for Beat
  [POWERPC] celleb: Move a file for SPU on Beat
  [POWERPC] celleb: Move files for Beat mmu and iommu
  [POWERPC] celleb: Move files for Beat hvcall interfaces
  [POWERPC] celleb: Move the SCC related code for celleb
  [POWERPC] celleb: Move the files for celleb base support
  [POWERPC] celleb: Consolidate io-workarounds code
  [POWERPC] cell: Generalize io-workarounds code
  [POWERPC] Add CONFIG_PPC_PSERIES_DEBUG to enable debugging for platforms/pseries
  [POWERPC] Convert from DBG() to pr_debug() in platforms/pseries/
  [POWERPC] Register udbg console early on pseries LPAR
  [POWERPC] Mark udbg console as CON_ANYTIME, ie. callable early in boot
  [POWERPC] Set udbg_console index to 0
  ...
This commit is contained in:
Linus Torvalds 2008-04-25 12:52:16 -07:00
parent 6e18933f2b f360bf0015
commit b9fa38f75e
123 changed files with 1935 additions and 4584 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Documentation/powerpc/booting-without-of.txt
View File

@ -2601,6 +2601,17 @@ platforms are moved over to use the flattened-device-tree model.
differ between different families. May be
'virtex2p', 'virtex4', or 'virtex5'.
vi) Xilinx Uart 16550
Xilinx UART 16550 devices are very similar to the NS16550 but with
different register spacing and an offset from the base address.
Requred properties:
- clock-frequency : Frequency of the clock input
- reg-offset : A value of 3 is required
- reg-shift : A value of 2 is required
p) Freescale Synchronous Serial Interface
The SSI is a serial device that communicates with audio codecs. It can

25
MAINTAINERS
View File

@ -1106,6 +1106,12 @@ M: kernel@wantstofly.org
L: linux-usb@vger.kernel.org
S: Maintained
CIRRUS LOGIC CS4270 SOUND DRIVER
P: Timur Tabi
M: timur@freescale.com
L: alsa-devel@alsa-project.org
S: Supported
CIRRUS LOGIC CS4280/CS461x SOUNDDRIVER
P: Cirrus Logic Corporation (kernel 2.2 driver)
M: Cirrus Logic Corporation, Thomas Woller <twoller@crystal.cirrus.com>
@ -1628,6 +1634,12 @@ L: linuxppc-dev@ozlabs.org
L: netdev@vger.kernel.org
S: Maintained
FREESCALE QUICC ENGINE LIBRARY
P: Timur Tabi
M: timur@freescale.com
L: linuxppc-dev@ozlabs.org
S: Supported
FREESCALE HIGHSPEED USB DEVICE DRIVER
P: Li Yang
M: leoli@freescale.com
@ -1642,6 +1654,19 @@ L: netdev@vger.kernel.org
L: linuxppc-dev@ozlabs.org
S: Maintained
FREESCALE QUICC ENGINE UCC UART DRIVER
P: Timur Tabi
M: timur@freescale.com
L: linuxppc-dev@ozlabs.org
S: Supported
FREESCALE SOC SOUND DRIVERS
P: Timur Tabi
M: timur@freescale.com
L: alsa-devel@alsa-project.org
L: linuxppc-dev@ozlabs.org
S: Supported
FILE LOCKING (flock() and fcntl()/lockf())
P: Matthew Wilcox
M: matthew@wil.cx

85
arch/powerpc/Kconfig
View File

@ -626,20 +626,6 @@ config ADVANCED_OPTIONS
comment "Default settings for advanced configuration options are used"
depends on !ADVANCED_OPTIONS
config HIGHMEM_START_BOOL
bool "Set high memory pool address"
depends on ADVANCED_OPTIONS && HIGHMEM
help
This option allows you to set the base address of the kernel virtual
area used to map high memory pages. This can be useful in
optimizing the layout of kernel virtual memory.
Say N here unless you know what you are doing.
config HIGHMEM_START
hex "Virtual start address of high memory pool" if HIGHMEM_START_BOOL
default "0xfe000000"
config LOWMEM_SIZE_BOOL
bool "Set maximum low memory"
depends on ADVANCED_OPTIONS
@ -656,21 +642,76 @@ config LOWMEM_SIZE
hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
default "0x30000000"
config RELOCATABLE
bool "Build a relocatable kernel (EXPERIMENTAL)"
depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE
help
This builds a kernel image that is capable of running at the
location the kernel is loaded at (some alignment restrictions may
exist).
One use is for the kexec on panic case where the recovery kernel
must live at a different physical address than the primary
kernel.
Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address
it has been loaded at and the compile time physical addresses
CONFIG_PHYSICAL_START is ignored. However CONFIG_PHYSICAL_START
setting can still be useful to bootwrappers that need to know the
load location of the kernel (eg. u-boot/mkimage).
config PAGE_OFFSET_BOOL
bool "Set custom page offset address"
depends on ADVANCED_OPTIONS
help
This option allows you to set the kernel virtual address at which
the kernel will map low memory. This can be useful in optimizing
the virtual memory layout of the system.
Say N here unless you know what you are doing.
config PAGE_OFFSET
hex "Virtual address of memory base" if PAGE_OFFSET_BOOL
default "0xc0000000"
config KERNEL_START_BOOL
bool "Set custom kernel base address"
depends on ADVANCED_OPTIONS
help
This option allows you to set the kernel virtual address at which
the kernel will map low memory (the kernel image will be linked at
this address). This can be useful in optimizing the virtual memory
layout of the system.
the kernel will be loaded. Normally this should match PAGE_OFFSET
however there are times (like kdump) that one might not want them
to be the same.
Say N here unless you know what you are doing.
config KERNEL_START
hex "Virtual address of kernel base" if KERNEL_START_BOOL
default PAGE_OFFSET if PAGE_OFFSET_BOOL
default "0xc2000000" if CRASH_DUMP
default "0xc0000000"
config PHYSICAL_START_BOOL
bool "Set physical address where the kernel is loaded"
depends on ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE
help
This gives the physical address where the kernel is loaded.
Say N here unless you know what you are doing.
config PHYSICAL_START
hex "Physical address where the kernel is loaded" if PHYSICAL_START_BOOL
default "0x02000000" if PPC_STD_MMU && CRASH_DUMP
default "0x00000000"
config PHYSICAL_ALIGN
hex
default "0x10000000" if FSL_BOOKE
help
This value puts the alignment restrictions on physical address
where kernel is loaded and run from. Kernel is compiled for an
address which meets above alignment restriction.
config TASK_SIZE_BOOL
bool "Set custom user task size"
depends on ADVANCED_OPTIONS
@ -717,9 +758,17 @@ config PIN_TLB
endmenu
if PPC64
config KERNEL_START
config PAGE_OFFSET
hex
default "0xc000000000000000"
config KERNEL_START
hex
default "0xc000000002000000" if CRASH_DUMP
default "0xc000000000000000"
config PHYSICAL_START
hex
default "0x02000000" if CRASH_DUMP
default "0x00000000"
endif
source "net/Kconfig"

1
arch/powerpc/boot/.gitignore vendored
View File

@ -27,6 +27,7 @@ zImage.chrp
zImage.coff
zImage.coff.lds
zImage.ep*
zImage.iseries
zImage.*lds
zImage.miboot
zImage.pmac

2
arch/powerpc/boot/Makefile
View File

@ -40,7 +40,7 @@ $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
$(obj)/virtex405-head.o: BOOTCFLAGS += -mcpu=405
$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
zlib := inffast.c inflate.c inftrees.c

37
arch/powerpc/boot/dts/canyonlands.dts
View File

@ -142,8 +142,45 @@
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
interrupts = <6 4>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
reg = <0 000000 4000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0 1e0000>;
};
partition@1e0000 {
label = "dtb";
reg = <1e0000 20000>;
};
partition@200000 {
label = "ramdisk";
reg = <200000 1400000>;
};
partition@1600000 {
label = "jffs2";
reg = <1600000 400000>;
};
partition@1a00000 {
label = "user";
reg = <1a00000 2560000>;
};
partition@3f60000 {
label = "env";
reg = <3f60000 40000>;
};
partition@3fa0000 {
label = "u-boot";
reg = <3fa0000 60000>;
};
};
};
UART0: serial@ef600300 {

37
arch/powerpc/boot/dts/glacier.dts
View File

@ -145,8 +145,45 @@
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
interrupts = <6 4>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
reg = <0 000000 4000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0 1e0000>;
};
partition@1e0000 {
label = "dtb";
reg = <1e0000 20000>;
};
partition@200000 {
label = "ramdisk";
reg = <200000 1400000>;
};
partition@1600000 {
label = "jffs2";
reg = <1600000 400000>;
};
partition@1a00000 {
label = "user";
reg = <1a00000 2560000>;
};
partition@3f60000 {
label = "env";
reg = <3f60000 40000>;
};
partition@3fa0000 {
label = "u-boot";
reg = <3fa0000 60000>;
};
};
};
UART0: serial@ef600300 {

5
arch/powerpc/boot/ns16550.c
View File

@ -55,10 +55,15 @@ static u8 ns16550_tstc(void)
int ns16550_console_init(void *devp, struct serial_console_data *scdp)
{
int n;
u32 reg_offset;
if (dt_get_virtual_reg(devp, (void **)&reg_base, 1) < 1)
return -1;
n = getprop(devp, "reg-offset", &reg_offset, sizeof(reg_offset));
if (n == sizeof(reg_offset))
reg_base += reg_offset;
n = getprop(devp, "reg-shift", &reg_shift, sizeof(reg_shift));
if (n != sizeof(reg_shift))
reg_shift = 0;

9
arch/powerpc/kernel/Makefile
View File

@ -106,4 +106,13 @@ PHONY += systbl_chk
systbl_chk: $(src)/systbl_chk.sh $(obj)/systbl_chk.i
$(call cmd,systbl_chk)
$(obj)/built-in.o: prom_init_check
quiet_cmd_prom_init_check = CALL $<
cmd_prom_init_check = $(CONFIG_SHELL) $< "$(NM)" "$(obj)/prom_init.o"
PHONY += prom_init_check
prom_init_check: $(src)/prom_init_check.sh $(obj)/prom_init.o
$(call cmd,prom_init_check)
clean-files := vmlinux.lds

11
arch/powerpc/kernel/asm-offsets.c
View File

@ -93,10 +93,7 @@ int main(void)
DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
DEFINE(TI_TASK, offsetof(struct thread_info, task));
#ifdef CONFIG_PPC32
DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain));
DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
#endif /* CONFIG_PPC32 */
#ifdef CONFIG_PPC64
DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
@ -165,13 +162,9 @@ int main(void)
/* Interrupt register frame */
DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD);
#ifndef CONFIG_PPC64
DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
#else /* CONFIG_PPC64 */
DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
#ifdef CONFIG_PPC64
DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
/* 288 = # of volatile regs, int & fp, for leaf routines */
/* which do not stack a frame. See the PPC64 ABI. */
DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 288);
/* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);

1
arch/powerpc/kernel/cpu_setup_44x.S
View File

@ -33,7 +33,6 @@ _GLOBAL(__setup_cpu_440grx)
mtlr r4
blr
_GLOBAL(__setup_cpu_460ex)
_GLOBAL(__setup_cpu_460gt)
b __init_fpu_44x
_GLOBAL(__setup_cpu_440gx)
_GLOBAL(__setup_cpu_440spe)

8
arch/powerpc/kernel/cpu_setup_6xx.S
View File

@ -17,7 +17,13 @@
#include <asm/cache.h>
_GLOBAL(__setup_cpu_603)
b setup_common_caches
mflr r4
BEGIN_FTR_SECTION
bl __init_fpu_registers
END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)
bl setup_common_caches
mtlr r4
blr
_GLOBAL(__setup_cpu_604)
mflr r4
bl setup_common_caches

4
arch/powerpc/kernel/cputable.c
View File

@ -37,7 +37,6 @@ extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@ -1416,10 +1415,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
.pvr_value = 0x13020000,
.cpu_name = "460GT",
.cpu_features = CPU_FTRS_44X,
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
.cpu_user_features = COMMON_USER_BOOKE,
.icache_bsize = 32,
.dcache_bsize = 32,
.cpu_setup = __setup_cpu_460gt,
.machine_check = machine_check_440A,
.platform = "ppc440",
},

11
arch/powerpc/kernel/head_fsl_booke.S
View File

@ -371,6 +371,17 @@ skpinv: addi r6,r6,1 /* Increment */
bl early_init
#ifdef CONFIG_RELOCATABLE
lis r3,kernstart_addr@ha
la r3,kernstart_addr@l(r3)
#ifdef CONFIG_PHYS_64BIT
stw r23,0(r3)
stw r25,4(r3)
#else
stw r25,0(r3)
#endif
#endif
mfspr r3,SPRN_TLB1CFG
andi. r3,r3,0xfff
lis r4,num_tlbcam_entries@ha

6
arch/powerpc/kernel/misc_32.S
View File

@ -152,7 +152,7 @@ _GLOBAL(low_choose_750fx_pll)
mtspr SPRN_HID1,r4
/* Store new HID1 image */
rlwinm r6,r1,0,0,18
rlwinm r6,r1,0,0,(31-THREAD_SHIFT)
lwz r6,TI_CPU(r6)
slwi r6,r6,2
addis r6,r6,nap_save_hid1@ha
@ -281,7 +281,7 @@ _GLOBAL(_tlbia)
#endif /* CONFIG_SMP */
#else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
#if defined(CONFIG_SMP)
rlwinm r8,r1,0,0,18
rlwinm r8,r1,0,0,(31-THREAD_SHIFT)
lwz r8,TI_CPU(r8)
oris r8,r8,10
mfmsr r10
@ -377,7 +377,7 @@ _GLOBAL(_tlbie)
#endif /* CONFIG_SMP */
#else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
#if defined(CONFIG_SMP)
rlwinm r8,r1,0,0,18
rlwinm r8,r1,0,0,(31-THREAD_SHIFT)
lwz r8,TI_CPU(r8)
oris r8,r8,11
mfmsr r10

20
arch/powerpc/kernel/misc_64.S
View File

@ -27,23 +27,11 @@
.text
_GLOBAL(get_msr)
mfmsr r3
blr
_GLOBAL(get_srr0)
mfsrr0 r3
blr
_GLOBAL(get_srr1)
mfsrr1 r3
blr
#ifdef CONFIG_IRQSTACKS
_GLOBAL(call_do_softirq)
mflr r0
std r0,16(r1)
stdu r1,THREAD_SIZE-112(r3)
stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
mr r1,r3
bl .__do_softirq
ld r1,0(r1)
@ -56,7 +44,7 @@ _GLOBAL(call_handle_irq)
mflr r0
std r0,16(r1)
mtctr r8
stdu r1,THREAD_SIZE-112(r5)
stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r5)
mr r1,r5
bctrl
ld r1,0(r1)
@ -599,7 +587,7 @@ _GLOBAL(kexec_sequence)
std r0,16(r1)
/* switch stacks to newstack -- &kexec_stack.stack */
stdu r1,THREAD_SIZE-112(r3)
stdu r1,THREAD_SIZE-STACK_FRAME_OVERHEAD(r3)
mr r1,r3
li r0,0
@ -616,7 +604,7 @@ _GLOBAL(kexec_sequence)
std r26,-48(r1)
std r25,-56(r1)
stdu r1,-112-64(r1)
stdu r1,-STACK_FRAME_OVERHEAD-64(r1)
/* save args into preserved regs */
mr r31,r3 /* newstack (both) */

2
arch/powerpc/kernel/of_platform.c
View File

@ -275,6 +275,8 @@ static int __devinit of_pci_phb_probe(struct of_device *dev,
/* Scan the bus */
scan_phb(phb);
if (phb->bus == NULL)
return -ENXIO;
/* Claim resources. This might need some rework as well depending
* wether we are doing probe-only or not, like assigning unassigned

87
arch/powerpc/kernel/paca.c
View File

@ -7,17 +7,11 @@
* 2 of the License, or (at your option) any later version.
*/
#include <linux/types.h>
#include <linux/threads.h>
#include <linux/module.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/page.h>
#include <asm/lppaca.h>
#include <asm/paca.h>
#include <asm/mmu.h>
/* This symbol is provided by the linker - let it fill in the paca
* field correctly */
@ -65,60 +59,29 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = {
* processors. The processor VPD array needs one entry per physical
* processor (not thread).
*/
#define PACA_INIT(number) \
{ \
.lppaca_ptr = &lppaca[number], \
.lock_token = 0x8000, \
.paca_index = (number), /* Paca Index */ \
.kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL, \
.hw_cpu_id = 0xffff, \
.slb_shadow_ptr = &slb_shadow[number], \
.__current = &init_task, \
}
struct paca_struct paca[] = {
PACA_INIT(0),
#if NR_CPUS > 1
PACA_INIT( 1), PACA_INIT( 2), PACA_INIT( 3),
#if NR_CPUS > 4
PACA_INIT( 4), PACA_INIT( 5), PACA_INIT( 6), PACA_INIT( 7),
#if NR_CPUS > 8
PACA_INIT( 8), PACA_INIT( 9), PACA_INIT( 10), PACA_INIT( 11),
PACA_INIT( 12), PACA_INIT( 13), PACA_INIT( 14), PACA_INIT( 15),
PACA_INIT( 16), PACA_INIT( 17), PACA_INIT( 18), PACA_INIT( 19),
PACA_INIT( 20), PACA_INIT( 21), PACA_INIT( 22), PACA_INIT( 23),
PACA_INIT( 24), PACA_INIT( 25), PACA_INIT( 26), PACA_INIT( 27),
PACA_INIT( 28), PACA_INIT( 29), PACA_INIT( 30), PACA_INIT( 31),
#if NR_CPUS > 32
PACA_INIT( 32), PACA_INIT( 33), PACA_INIT( 34), PACA_INIT( 35),
PACA_INIT( 36), PACA_INIT( 37), PACA_INIT( 38), PACA_INIT( 39),
PACA_INIT( 40), PACA_INIT( 41), PACA_INIT( 42), PACA_INIT( 43),
PACA_INIT( 44), PACA_INIT( 45), PACA_INIT( 46), PACA_INIT( 47),
PACA_INIT( 48), PACA_INIT( 49), PACA_INIT( 50), PACA_INIT( 51),
PACA_INIT( 52), PACA_INIT( 53), PACA_INIT( 54), PACA_INIT( 55),
PACA_INIT( 56), PACA_INIT( 57), PACA_INIT( 58), PACA_INIT( 59),
PACA_INIT( 60), PACA_INIT( 61), PACA_INIT( 62), PACA_INIT( 63),
#if NR_CPUS > 64
PACA_INIT( 64), PACA_INIT( 65), PACA_INIT( 66), PACA_INIT( 67),
PACA_INIT( 68), PACA_INIT( 69), PACA_INIT( 70), PACA_INIT( 71),
PACA_INIT( 72), PACA_INIT( 73), PACA_INIT( 74), PACA_INIT( 75),
PACA_INIT( 76), PACA_INIT( 77), PACA_INIT( 78), PACA_INIT( 79),
PACA_INIT( 80), PACA_INIT( 81), PACA_INIT( 82), PACA_INIT( 83),
PACA_INIT( 84), PACA_INIT( 85), PACA_INIT( 86), PACA_INIT( 87),
PACA_INIT( 88), PACA_INIT( 89), PACA_INIT( 90), PACA_INIT( 91),
PACA_INIT( 92), PACA_INIT( 93), PACA_INIT( 94), PACA_INIT( 95),
PACA_INIT( 96), PACA_INIT( 97), PACA_INIT( 98), PACA_INIT( 99),
PACA_INIT(100), PACA_INIT(101), PACA_INIT(102), PACA_INIT(103),
PACA_INIT(104), PACA_INIT(105), PACA_INIT(106), PACA_INIT(107),
PACA_INIT(108), PACA_INIT(109), PACA_INIT(110), PACA_INIT(111),
PACA_INIT(112), PACA_INIT(113), PACA_INIT(114), PACA_INIT(115),
PACA_INIT(116), PACA_INIT(117), PACA_INIT(118), PACA_INIT(119),
PACA_INIT(120), PACA_INIT(121), PACA_INIT(122), PACA_INIT(123),
PACA_INIT(124), PACA_INIT(125), PACA_INIT(126), PACA_INIT(127),
#endif
#endif
#endif
#endif
#endif
};
struct paca_struct paca[NR_CPUS];
EXPORT_SYMBOL(paca);
void __init initialise_pacas(void)
{
int cpu;
/* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
* of the TOC can be addressed using a single machine instruction.
*/
unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
/* Can't use for_each_*_cpu, as they aren't functional yet */
for (cpu = 0; cpu < NR_CPUS; cpu++) {
struct paca_struct *new_paca = &paca[cpu];
new_paca->lppaca_ptr = &lppaca[cpu];
new_paca->lock_token = 0x8000;
new_paca->paca_index = cpu;
new_paca->kernel_toc = kernel_toc;
new_paca->hw_cpu_id = 0xffff;
new_paca->slb_shadow_ptr = &slb_shadow[cpu];
new_paca->__current = &init_task;
}
}

2
arch/powerpc/kernel/ppc32.h
View File

@ -135,6 +135,4 @@ struct ucontext32 {
struct mcontext32 uc_mcontext;
};
extern int copy_siginfo_to_user32(struct compat_siginfo __user *d, siginfo_t *s);
#endif /* _PPC64_PPC32_H */

31
arch/powerpc/kernel/process.c
View File

@ -1033,3 +1033,34 @@ void ppc64_runlatch_off(void)
}
}
#endif
#if THREAD_SHIFT < PAGE_SHIFT
static struct kmem_cache *thread_info_cache;
struct thread_info *alloc_thread_info(struct task_struct *tsk)
{
struct thread_info *ti;
ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
if (unlikely(ti == NULL))
return NULL;
#ifdef CONFIG_DEBUG_STACK_USAGE
memset(ti, 0, THREAD_SIZE);
#endif
return ti;
}
void free_thread_info(struct thread_info *ti)
{
kmem_cache_free(thread_info_cache, ti);
}
void thread_info_cache_init(void)
{
thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
THREAD_SIZE, 0, NULL);
BUG_ON(thread_info_cache == NULL);
}
#endif /* THREAD_SHIFT < PAGE_SHIFT */

4
arch/powerpc/kernel/prom.c
View File

@ -53,6 +53,7 @@
#include <asm/pci-bridge.h>
#include <asm/phyp_dump.h>
#include <asm/kexec.h>
#include <mm/mmu_decl.h>
#ifdef DEBUG
#define DBG(fmt...) printk(KERN_ERR fmt)
@ -978,7 +979,10 @@ static int __init early_init_dt_scan_memory(unsigned long node,
}
#endif
lmb_add(base, size);
memstart_addr = min((u64)memstart_addr, base);
}
return 0;
}

58
arch/powerpc/kernel/prom_init_check.sh Normal file
View File

@ -0,0 +1,58 @@
#!/bin/sh
#
# Copyright © 2008 IBM Corporation
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version
# 2 of the License, or (at your option) any later version.
# This script checks prom_init.o to see what external symbols it
# is using, if it finds symbols not in the whitelist it returns
# an error. The point of this is to discourage people from
# intentionally or accidentally adding new code to prom_init.c
# which has side effects on other parts of the kernel.
# If you really need to reference something from prom_init.o add
# it to the list below:
WHITELIST="add_reloc_offset __bss_start __bss_stop copy_and_flush
_end enter_prom memcpy memset reloc_offset __secondary_hold
__secondary_hold_acknowledge __secondary_hold_spinloop __start
strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224
reloc_got2"
NM="$1"
OBJ="$2"
ERROR=0
for UNDEF in $($NM -u $OBJ | awk '{print $2}')
do
# On 64-bit nm gives us the function descriptors, which have
# a leading . on the name, so strip it off here.
UNDEF="${UNDEF#.}"
if [ $KBUILD_VERBOSE ]; then
if [ $KBUILD_VERBOSE -ne 0 ]; then
echo "Checking prom_init.o symbol '$UNDEF'"
fi
fi
OK=0
for WHITE in $WHITELIST
do
if [ "$UNDEF" = "$WHITE" ]; then
OK=1
break
fi
done
if [ $OK -eq 0 ]; then
ERROR=1
echo "Error: External symbol '$UNDEF' referenced" \
"from prom_init.c" >&2
fi
done
exit $ERROR

27
arch/powerpc/kernel/ptrace32.c
View File

@ -29,15 +29,12 @@
#include <linux/security.h>
#include <linux/signal.h>
#include <linux/compat.h>
#include <linux/elf.h>
#include <asm/uaccess.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include "ppc32.h"
/*
* does not yet catch signals sent when the child dies.
* in exit.c or in signal.c.
@ -67,27 +64,6 @@ static long compat_ptrace_old(struct task_struct *child, long request,
return -EPERM;
}
static int compat_ptrace_getsiginfo(struct task_struct *child, compat_siginfo_t __user *data)
{
siginfo_t lastinfo;
int error = -ESRCH;
read_lock(&tasklist_lock);
if (likely(child->sighand != NULL)) {
error = -EINVAL;
spin_lock_irq(&child->sighand->siglock);
if (likely(child->last_siginfo != NULL)) {
lastinfo = *child->last_siginfo;
error = 0;
}
spin_unlock_irq(&child->sighand->siglock);
}
read_unlock(&tasklist_lock);
if (!error)
return copy_siginfo_to_user32(data, &lastinfo);
return error;
}
long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
compat_ulong_t caddr, compat_ulong_t cdata)
{
@ -306,9 +282,6 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
0, PT_REGS_COUNT * sizeof(compat_long_t),
compat_ptr(data));
case PTRACE_GETSIGINFO:
return compat_ptrace_getsiginfo(child, compat_ptr(data));
case PTRACE_GETFPREGS:
case PTRACE_SETFPREGS:
case PTRACE_GETVRREGS:

5
arch/powerpc/kernel/setup_64.c
View File

@ -170,6 +170,9 @@ void __init setup_paca(int cpu)
void __init early_setup(unsigned long dt_ptr)
{
/* Fill in any unititialised pacas */
initialise_pacas();
/* Identify CPU type */
identify_cpu(0, mfspr(SPRN_PVR));
@ -435,7 +438,7 @@ void __init setup_system(void)
printk("htab_address = 0x%p\n", htab_address);
printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
#if PHYSICAL_START > 0
printk("physical_start = 0x%x\n", PHYSICAL_START);
printk("physical_start = 0x%lx\n", PHYSICAL_START);
#endif
printk("-----------------------------------------------------\n");

1
arch/powerpc/kernel/stacktrace.c
View File

@ -13,7 +13,6 @@
#include <linux/sched.h>
#include <linux/stacktrace.h>
#include <asm/ptrace.h>
#include <asm/asm-offsets.h>
/*
* Save stack-backtrace addresses into a stack_trace buffer.

4
arch/powerpc/kernel/udbg.c
View File

@ -154,8 +154,8 @@ static void udbg_console_write(struct console *con, const char *s,
static struct console udbg_console = {
.name = "udbg",
.write = udbg_console_write,
.flags = CON_PRINTBUFFER | CON_ENABLED | CON_BOOT,
.index = -1,
.flags = CON_PRINTBUFFER | CON_ENABLED | CON_BOOT | CON_ANYTIME,
.index = 0,
};
static int early_console_initialized;

2
arch/powerpc/mm/fsl_booke_mmu.c
View File

@ -202,7 +202,7 @@ adjust_total_lowmem(void)
cam_max_size = max_lowmem_size;
/* adjust lowmem size to max_lowmem_size */
ram = min(max_lowmem_size, total_lowmem);
ram = min(max_lowmem_size, (phys_addr_t)total_lowmem);
/* Calculate CAM values */
__cam0 = 1UL << 2 * (__ilog2(ram) / 2);

4
arch/powerpc/mm/hash_low_32.S
View File

@ -191,7 +191,7 @@ _GLOBAL(add_hash_page)
add r3,r3,r0 /* note create_hpte trims to 24 bits */
#ifdef CONFIG_SMP
rlwinm r8,r1,0,0,18 /* use cpu number to make tag */
rlwinm r8,r1,0,0,(31-THREAD_SHIFT) /* use cpu number to make tag */
lwz r8,TI_CPU(r8) /* to go in mmu_hash_lock */
oris r8,r8,12
#endif /* CONFIG_SMP */
@ -526,7 +526,7 @@ _GLOBAL(flush_hash_pages)
#ifdef CONFIG_SMP
addis r9,r7,mmu_hash_lock@ha
addi r9,r9,mmu_hash_lock@l
rlwinm r8,r1,0,0,18
rlwinm r8,r1,0,0,(31-THREAD_SHIFT)
add r8,r8,r7
lwz r8,TI_CPU(r8)
oris r8,r8,9

13
arch/powerpc/mm/init_32.c
View File

@ -59,7 +59,10 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
unsigned long total_memory;
unsigned long total_lowmem;
phys_addr_t memstart_addr;
phys_addr_t memstart_addr = (phys_addr_t)~0ull;
EXPORT_SYMBOL(memstart_addr);
phys_addr_t kernstart_addr;
EXPORT_SYMBOL(kernstart_addr);
phys_addr_t lowmem_end_addr;
int boot_mapsize;
@ -68,14 +71,6 @@ unsigned long agp_special_page;
EXPORT_SYMBOL(agp_special_page);
#endif
#ifdef CONFIG_HIGHMEM
pte_t *kmap_pte;
pgprot_t kmap_prot;
EXPORT_SYMBOL(kmap_prot);
EXPORT_SYMBOL(kmap_pte);
#endif
void MMU_init(void);
/* XXX should be in current.h -- paulus */

3
arch/powerpc/mm/init_64.c
View File

@ -72,7 +72,8 @@
#warning TASK_SIZE is smaller than it needs to be.
#endif
phys_addr_t memstart_addr;
phys_addr_t memstart_addr = ~0;
phys_addr_t kernstart_addr;
void free_initmem(void)
{

37
arch/powerpc/mm/mem.c
View File

@ -45,6 +45,7 @@
#include <asm/tlb.h>
#include <asm/sections.h>
#include <asm/vdso.h>
#include <asm/fixmap.h>
#include "mmu_decl.h"
@ -57,6 +58,20 @@ int init_bootmem_done;
int mem_init_done;
unsigned long memory_limit;
#ifdef CONFIG_HIGHMEM
pte_t *kmap_pte;
pgprot_t kmap_prot;
EXPORT_SYMBOL(kmap_prot);
EXPORT_SYMBOL(kmap_pte);
static inline pte_t *virt_to_kpte(unsigned long vaddr)
{
return pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr),
vaddr), vaddr), vaddr);
}
#endif
int page_is_ram(unsigned long pfn)
{
unsigned long paddr = (pfn << PAGE_SHIFT);
@ -216,7 +231,7 @@ void __init do_init_bootmem(void)
unsigned long total_pages;
int boot_mapsize;
max_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT;
max_low_pfn = max_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT;
total_pages = (lmb_end_of_DRAM() - memstart_addr) >> PAGE_SHIFT;
#ifdef CONFIG_HIGHMEM
total_pages = total_lowmem >> PAGE_SHIFT;
@ -232,7 +247,8 @@ void __init do_init_bootmem(void)
start = lmb_alloc(bootmap_pages << PAGE_SHIFT, PAGE_SIZE);
boot_mapsize = init_bootmem(start >> PAGE_SHIFT, total_pages);
min_low_pfn = MEMORY_START >> PAGE_SHIFT;
boot_mapsize = init_bootmem_node(NODE_DATA(0), start >> PAGE_SHIFT, min_low_pfn, max_low_pfn);
/* Add active regions with valid PFNs */
for (i = 0; i < lmb.memory.cnt; i++) {
@ -310,14 +326,19 @@ void __init paging_init(void)
unsigned long top_of_ram = lmb_end_of_DRAM();
unsigned long max_zone_pfns[MAX_NR_ZONES];
#ifdef CONFIG_PPC32
unsigned long v = __fix_to_virt(__end_of_fixed_addresses - 1);
unsigned long end = __fix_to_virt(FIX_HOLE);
for (; v < end; v += PAGE_SIZE)
map_page(v, 0, 0); /* XXX gross */
#endif
#ifdef CONFIG_HIGHMEM
map_page(PKMAP_BASE, 0, 0); /* XXX gross */
pkmap_page_table = pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k
(PKMAP_BASE), PKMAP_BASE), PKMAP_BASE), PKMAP_BASE);
map_page(KMAP_FIX_BEGIN, 0, 0); /* XXX gross */
kmap_pte = pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k
(KMAP_FIX_BEGIN), KMAP_FIX_BEGIN), KMAP_FIX_BEGIN),
KMAP_FIX_BEGIN);
pkmap_page_table = virt_to_kpte(PKMAP_BASE);
kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN));
kmap_prot = PAGE_KERNEL;
#endif /* CONFIG_HIGHMEM */

1
arch/powerpc/mm/numa.c
View File

@ -18,6 +18,7 @@
#include <linux/cpu.h>
#include <linux/notifier.h>
#include <linux/lmb.h>
#include <linux/of.h>
#include <asm/sparsemem.h>
#include <asm/prom.h>
#include <asm/system.h>

23
arch/powerpc/mm/pgtable_32.c
View File

@ -29,6 +29,7 @@
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/fixmap.h>
#include <asm/io.h>
#include "mmu_decl.h"
@ -387,3 +388,25 @@ void kernel_map_pages(struct page *page, int numpages, int enable)
change_page_attr(page, numpages, enable ? PAGE_KERNEL : __pgprot(0));
}
#endif /* CONFIG_DEBUG_PAGEALLOC */
static int fixmaps;
unsigned long FIXADDR_TOP = 0xfffff000;
EXPORT_SYMBOL(FIXADDR_TOP);
void __set_fixmap (enum fixed_addresses idx, phys_addr_t phys, pgprot_t flags)
{
unsigned long address = __fix_to_virt(idx);
if (idx >= __end_of_fixed_addresses) {
BUG();
return;
}
map_page(address, phys, flags);
fixmaps++;
}
void __this_fixmap_does_not_exist(void)
{
WARN_ON(1);
}

1
arch/powerpc/platforms/Kconfig
View File

@ -45,7 +45,6 @@ source "arch/powerpc/platforms/powermac/Kconfig"
source "arch/powerpc/platforms/prep/Kconfig"
source "arch/powerpc/platforms/maple/Kconfig"
source "arch/powerpc/platforms/pasemi/Kconfig"
source "arch/powerpc/platforms/celleb/Kconfig"
source "arch/powerpc/platforms/ps3/Kconfig"
source "arch/powerpc/platforms/cell/Kconfig"
source "arch/powerpc/platforms/8xx/Kconfig"

4
arch/powerpc/platforms/Kconfig.cputype
View File

@ -220,8 +220,8 @@ config SMP
If you don't know what to do here, say N.
config NR_CPUS
int "Maximum number of CPUs (2-128)"
range 2 128
int "Maximum number of CPUs (2-1024)"
range 2 1024
depends on SMP
default "32" if PPC64
default "4"

1
arch/powerpc/platforms/Makefile
View File

@ -24,5 +24,4 @@ obj-$(CONFIG_PPC_MAPLE) += maple/
obj-$(CONFIG_PPC_PASEMI) += pasemi/
obj-$(CONFIG_PPC_CELL) += cell/
obj-$(CONFIG_PPC_PS3) += ps3/
obj-$(CONFIG_PPC_CELLEB) += celleb/
obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/

13
arch/powerpc/platforms/cell/Kconfig
View File

@ -25,6 +25,19 @@ config PPC_IBM_CELL_BLADE
select PPC_UDBG_16550
select UDBG_RTAS_CONSOLE
config PPC_CELLEB
bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
depends on PPC_MULTIPLATFORM && PPC64
select PPC_CELL
select PPC_CELL_NATIVE
select PPC_RTAS
select PPC_INDIRECT_IO
select PPC_OF_PLATFORM_PCI
select HAS_TXX9_SERIAL
select PPC_UDBG_BEAT
select USB_OHCI_BIG_ENDIAN_MMIO
select USB_EHCI_BIG_ENDIAN_MMIO
menu "Cell Broadband Engine options"
depends on PPC_CELL

20
arch/powerpc/platforms/cell/Makefile
View File

@ -1,6 +1,7 @@
obj-$(CONFIG_PPC_CELL_NATIVE) += interrupt.o iommu.o setup.o \
cbe_regs.o spider-pic.o \
pervasive.o pmu.o io-workarounds.o
pervasive.o pmu.o io-workarounds.o \
spider-pci.o
obj-$(CONFIG_CBE_RAS) += ras.o
obj-$(CONFIG_CBE_THERM) += cbe_thermal.o
@ -26,3 +27,20 @@ obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
spufs/
obj-$(CONFIG_PCI_MSI) += axon_msi.o
# celleb stuff
ifeq ($(CONFIG_PPC_CELLEB),y)
obj-y += celleb_setup.o \
celleb_pci.o celleb_scc_epci.o \
celleb_scc_pciex.o \
celleb_scc_uhc.o \
io-workarounds.o spider-pci.o \
beat.o beat_htab.o beat_hvCall.o \
beat_interrupt.o beat_iommu.o
obj-$(CONFIG_SMP) += beat_smp.o
obj-$(CONFIG_PPC_UDBG_BEAT) += beat_udbg.o
obj-$(CONFIG_SERIAL_TXX9) += celleb_scc_sio.o
obj-$(CONFIG_SPU_BASE) += beat_spu_priv1.o
endif

6
arch/powerpc/platforms/cell/axon_msi.c
View File

@ -123,7 +123,7 @@ static struct axon_msic *find_msi_translator(struct pci_dev *dev)
return NULL;
}
for (; dn; tmp = of_get_parent(dn), of_node_put(dn), dn = tmp) {
for (; dn; dn = of_get_next_parent(dn)) {
ph = of_get_property(dn, "msi-translator", NULL);
if (ph)
break;
@ -169,7 +169,7 @@ static int axon_msi_check_device(struct pci_dev *dev, int nvec, int type)
static int setup_msi_msg_address(struct pci_dev *dev, struct msi_msg *msg)
{
struct device_node *dn, *tmp;
struct device_node *dn;
struct msi_desc *entry;
int len;
const u32 *prop;
@ -182,7 +182,7 @@ static int setup_msi_msg_address(struct pci_dev *dev, struct msi_msg *msg)
entry = list_first_entry(&dev->msi_list, struct msi_desc, list);
for (; dn; tmp = of_get_parent(dn), of_node_put(dn), dn = tmp) {
for (; dn; dn = of_get_next_parent(dn)) {
if (entry->msi_attrib.is_64) {
prop = of_get_property(dn, "msi-address-64", &len);
if (prop)

2
arch/powerpc/platforms/celleb/beat.c → arch/powerpc/platforms/cell/beat.c
View File

@ -33,7 +33,7 @@
#include "beat_wrapper.h"
#include "beat.h"
#include "interrupt.h"
#include "beat_interrupt.h"
static int beat_pm_poweroff_flag;

0
arch/powerpc/platforms/celleb/beat.h → arch/powerpc/platforms/cell/beat.h
View File

0
arch/powerpc/platforms/celleb/htab.c → arch/powerpc/platforms/cell/beat_htab.c
View File

0
arch/powerpc/platforms/celleb/hvCall.S → arch/powerpc/platforms/cell/beat_hvCall.S
View File

2
arch/powerpc/platforms/celleb/interrupt.c → arch/powerpc/platforms/cell/beat_interrupt.c
View File

@ -26,7 +26,7 @@
#include <asm/machdep.h>
#include "interrupt.h"
#include "beat_interrupt.h"
#include "beat_wrapper.h"
#define MAX_IRQS NR_IRQS

0
arch/powerpc/platforms/celleb/interrupt.h → arch/powerpc/platforms/cell/beat_interrupt.h
View File

0
arch/powerpc/platforms/celleb/iommu.c → arch/powerpc/platforms/cell/beat_iommu.c
View File

2
arch/powerpc/platforms/celleb/smp.c → arch/powerpc/platforms/cell/beat_smp.c
View File

@ -37,7 +37,7 @@
#include <asm/machdep.h>
#include <asm/udbg.h>
#include "interrupt.h"
#include "beat_interrupt.h"
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)

0
arch/powerpc/platforms/celleb/spu_priv1.c → arch/powerpc/platforms/cell/beat_spu_priv1.c
View File

0
arch/powerpc/platforms/celleb/beat_syscall.h → arch/powerpc/platforms/cell/beat_syscall.h
View File

0
arch/powerpc/platforms/celleb/udbg_beat.c → arch/powerpc/platforms/cell/beat_udbg.c
View File

0
arch/powerpc/platforms/celleb/beat_wrapper.h → arch/powerpc/platforms/cell/beat_wrapper.h
View File

50
arch/powerpc/platforms/celleb/pci.c → arch/powerpc/platforms/cell/celleb_pci.c
View File

@ -37,12 +37,11 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/ppc-pci.h>
#include "pci.h"
#include "interrupt.h"
#include "io-workarounds.h"
#include "celleb_pci.h"
#define MAX_PCI_DEVICES 32
#define MAX_PCI_FUNCTIONS 8
@ -190,7 +189,7 @@ static int celleb_fake_pci_read_config(struct pci_bus *bus,
static int celleb_fake_pci_write_config(struct pci_bus *bus,
unsigned int devfn, int where, int size, u32 val)
unsigned int devfn, int where, int size, u32 val)
{
char *config;
struct device_node *node;
@ -457,33 +456,42 @@ static int __init celleb_setup_fake_pci(struct device_node *dev,
return 0;
}
void __init fake_pci_workaround_init(struct pci_controller *phb)
{
/**
* We will add fake pci bus to scc_pci_bus for the purpose to improve
* I/O Macro performance. But device-tree and device drivers
* are not ready to use address with a token.
*/
/* celleb_pci_add_one(phb, NULL); */
}
static struct celleb_phb_spec celleb_fake_pci_spec __initdata = {
.setup = celleb_setup_fake_pci,
};
static struct of_device_id celleb_phb_match[] __initdata = {
{
.name = "pci-pseudo",
.data = celleb_setup_fake_pci,
.data = &celleb_fake_pci_spec,
}, {
.name = "epci",
.data = celleb_setup_epci,
.data = &celleb_epci_spec,
}, {
.name = "pcie",
.data = &celleb_pciex_spec,
}, {
},
};
static int __init celleb_io_workaround_init(struct pci_controller *phb,
struct celleb_phb_spec *phb_spec)
{
if (phb_spec->ops) {
iowa_register_bus(phb, phb_spec->ops, phb_spec->iowa_init,
phb_spec->iowa_data);
io_workaround_init();
}
return 0;
}
int __init celleb_setup_phb(struct pci_controller *phb)
{
struct device_node *dev = phb->dn;
const struct of_device_id *match;
int (*setup_func)(struct device_node *, struct pci_controller *);
struct celleb_phb_spec *phb_spec;
int rc;
match = of_match_node(celleb_phb_match, dev);
if (!match)
@ -492,8 +500,12 @@ int __init celleb_setup_phb(struct pci_controller *phb)
phb_set_bus_ranges(dev, phb);
phb->buid = 1;
setup_func = match->data;
return (*setup_func)(dev, phb);
phb_spec = match->data;
rc = (*phb_spec->setup)(dev, phb);
if (rc)
return 1;
return celleb_io_workaround_init(phb, phb_spec);
}
int celleb_pci_probe_mode(struct pci_bus *bus)

19
arch/powerpc/platforms/celleb/pci.h → arch/powerpc/platforms/cell/celleb_pci.h
View File

@ -27,16 +27,19 @@
#include <asm/prom.h>
#include <asm/ppc-pci.h>
#include "io-workarounds.h"
struct celleb_phb_spec {
int (*setup)(struct device_node *, struct pci_controller *);
struct ppc_pci_io *ops;
int (*iowa_init)(struct iowa_bus *, void *);
void *iowa_data;
};
extern int celleb_setup_phb(struct pci_controller *);
extern int celleb_pci_probe_mode(struct pci_bus *);
extern int celleb_setup_epci(struct device_node *, struct pci_controller *);
extern void *celleb_dummy_page_va;
extern int __init celleb_pci_workaround_init(void);
extern void __init celleb_pci_add_one(struct pci_controller *,
void (*)(struct pci_controller *));
extern void fake_pci_workaround_init(struct pci_controller *);
extern void epci_workaround_init(struct pci_controller *);
extern struct celleb_phb_spec celleb_epci_spec;
extern struct celleb_phb_spec celleb_pciex_spec;
#endif /* _CELLEB_PCI_H */

87
arch/powerpc/platforms/celleb/scc.h → arch/powerpc/platforms/cell/celleb_scc.h
View File

@ -125,6 +125,93 @@
/* bits for SCC_EPCI_CNTOPT */
#define SCC_EPCI_CNTOPT_O2PMB 0x00000002
/* SCC PCIEXC SMMIO registers */
#define PEXCADRS 0x000
#define PEXCWDATA 0x004
#define PEXCRDATA 0x008
#define PEXDADRS 0x010
#define PEXDCMND 0x014
#define PEXDWDATA 0x018
#define PEXDRDATA 0x01c
#define PEXREQID 0x020
#define PEXTIDMAP 0x024
#define PEXINTMASK 0x028
#define PEXINTSTS 0x02c
#define PEXAERRMASK 0x030
#define PEXAERRSTS 0x034
#define PEXPRERRMASK 0x040
#define PEXPRERRSTS 0x044
#define PEXPRERRID01 0x048
#define PEXPRERRID23 0x04c
#define PEXVDMASK 0x050
#define PEXVDSTS 0x054
#define PEXRCVCPLIDA 0x060
#define PEXLENERRIDA 0x068
#define PEXPHYPLLST 0x070
#define PEXDMRDEN0 0x100
#define PEXDMRDADR0 0x104
#define PEXDMRDENX 0x110
#define PEXDMRDADRX 0x114
#define PEXECMODE 0xf00
#define PEXMAEA(n) (0xf50 + (8 * n))
#define PEXMAEC(n) (0xf54 + (8 * n))
#define PEXCCRCTRL 0xff0
/* SCC PCIEXC bits and shifts for PEXCADRS */
#define PEXCADRS_BYTE_EN_SHIFT 20
#define PEXCADRS_CMD_SHIFT 16
#define PEXCADRS_CMD_READ (0xa << PEXCADRS_CMD_SHIFT)
#define PEXCADRS_CMD_WRITE (0xb << PEXCADRS_CMD_SHIFT)
/* SCC PCIEXC shifts for PEXDADRS */
#define PEXDADRS_BUSNO_SHIFT 20
#define PEXDADRS_DEVNO_SHIFT 15
#define PEXDADRS_FUNCNO_SHIFT 12
/* SCC PCIEXC bits and shifts for PEXDCMND */
#define PEXDCMND_BYTE_EN_SHIFT 4
#define PEXDCMND_IO_READ 0x2
#define PEXDCMND_IO_WRITE 0x3
#define PEXDCMND_CONFIG_READ 0xa
#define PEXDCMND_CONFIG_WRITE 0xb
/* SCC PCIEXC bits for PEXPHYPLLST */
#define PEXPHYPLLST_PEXPHYAPLLST 0x00000001
/* SCC PCIEXC bits for PEXECMODE */
#define PEXECMODE_ALL_THROUGH 0x00000000
#define PEXECMODE_ALL_8BIT 0x00550155
#define PEXECMODE_ALL_16BIT 0x00aa02aa
/* SCC PCIEXC bits for PEXCCRCTRL */
#define PEXCCRCTRL_PEXIPCOREEN 0x00040000
#define PEXCCRCTRL_PEXIPCONTEN 0x00020000
#define PEXCCRCTRL_PEXPHYPLLEN 0x00010000
#define PEXCCRCTRL_PCIEXCAOCKEN 0x00000100
/* SCC PCIEXC port configuration registers */
#define PEXTCERRCHK 0x21c
#define PEXTAMAPB0 0x220
#define PEXTAMAPL0 0x224
#define PEXTAMAPB(n) (PEXTAMAPB0 + 8 * (n))
#define PEXTAMAPL(n) (PEXTAMAPL0 + 8 * (n))
#define PEXCHVC0P 0x500
#define PEXCHVC0NP 0x504
#define PEXCHVC0C 0x508
#define PEXCDVC0P 0x50c
#define PEXCDVC0NP 0x510
#define PEXCDVC0C 0x514
#define PEXCHVCXP 0x518
#define PEXCHVCXNP 0x51c
#define PEXCHVCXC 0x520
#define PEXCDVCXP 0x524
#define PEXCDVCXNP 0x528
#define PEXCDVCXC 0x52c
#define PEXCTTRG 0x530
#define PEXTSCTRL 0x700
#define PEXTSSTS 0x704
#define PEXSKPCTRL 0x708
/* UHC registers */
#define SCC_UHC_CKRCTRL 0xff0
#define SCC_UHC_ECMODE 0xf00

77
arch/powerpc/platforms/celleb/scc_epci.c → arch/powerpc/platforms/cell/celleb_scc_epci.c
View File

@ -30,23 +30,17 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/ppc-pci.h>
#include "scc.h"
#include "pci.h"
#include "interrupt.h"
#include "celleb_scc.h"
#include "celleb_pci.h"
#define MAX_PCI_DEVICES 32
#define MAX_PCI_FUNCTIONS 8
#define iob() __asm__ __volatile__("eieio; sync":::"memory")
struct epci_private {
dma_addr_t dummy_page_da;
};
static inline PCI_IO_ADDR celleb_epci_get_epci_base(
struct pci_controller *hose)
{
@ -71,42 +65,6 @@ static inline PCI_IO_ADDR celleb_epci_get_epci_cfg(
return hose->cfg_data;
}
static void scc_epci_dummy_read(struct pci_controller *hose)
{
PCI_IO_ADDR epci_base;
u32 val;
epci_base = celleb_epci_get_epci_base(hose);
val = in_be32(epci_base + SCC_EPCI_WATRP);
iosync();
return;
}
void __init epci_workaround_init(struct pci_controller *hose)
{
PCI_IO_ADDR epci_base;
PCI_IO_ADDR reg;
struct epci_private *private = hose->private_data;
BUG_ON(!private);
private->dummy_page_da = dma_map_single(hose->parent,
celleb_dummy_page_va, PAGE_SIZE, DMA_FROM_DEVICE);
if (private->dummy_page_da == DMA_ERROR_CODE) {
printk(KERN_ERR "EPCI: dummy read disabled. "
"Map dummy page failed.\n");
return;
}
celleb_pci_add_one(hose, scc_epci_dummy_read);
epci_base = celleb_epci_get_epci_base(hose);
reg = epci_base + SCC_EPCI_DUMYRADR;
out_be32(reg, private->dummy_page_da);
}
static inline void clear_and_disable_master_abort_interrupt(
struct pci_controller *hose)
{
@ -151,10 +109,8 @@ static int celleb_epci_check_abort(struct pci_controller *hose,
return PCIBIOS_SUCCESSFUL;
}
static PCI_IO_ADDR celleb_epci_make_config_addr(
struct pci_bus *bus,
struct pci_controller *hose,
unsigned int devfn, int where)
static PCI_IO_ADDR celleb_epci_make_config_addr(struct pci_bus *bus,
struct pci_controller *hose, unsigned int devfn, int where)
{
PCI_IO_ADDR addr;
@ -425,8 +381,8 @@ static int __init celleb_epci_init(struct pci_controller *hose)
return 0;
}
int __init celleb_setup_epci(struct device_node *node,
struct pci_controller *hose)
static int __init celleb_setup_epci(struct device_node *node,
struct pci_controller *hose)
{
struct resource r;
@ -450,8 +406,7 @@ int __init celleb_setup_epci(struct device_node *node,
if (!hose->cfg_addr)
goto error;
pr_debug("EPCI: cfg_addr map 0x%016lx->0x%016lx + 0x%016lx\n",
r.start, (unsigned long)hose->cfg_addr,
(r.end - r.start + 1));
r.start, (unsigned long)hose->cfg_addr, (r.end - r.start + 1));
if (of_address_to_resource(node, 2, &r))
goto error;
@ -459,14 +414,7 @@ int __init celleb_setup_epci(struct device_node *node,
if (!hose->cfg_data)
goto error;
pr_debug("EPCI: cfg_data map 0x%016lx->0x%016lx + 0x%016lx\n",
r.start, (unsigned long)hose->cfg_data,
(r.end - r.start + 1));
hose->private_data = kzalloc(sizeof(struct epci_private), GFP_KERNEL);
if (hose->private_data == NULL) {
printk(KERN_ERR "EPCI: no memory for private data.\n");
goto error;
}
r.start, (unsigned long)hose->cfg_data, (r.end - r.start + 1));
hose->ops = &celleb_epci_ops;
celleb_epci_init(hose);
@ -474,8 +422,6 @@ int __init celleb_setup_epci(struct device_node *node,
return 0;
error:
kfree(hose->private_data);
if (hose->cfg_addr)
iounmap(hose->cfg_addr);
@ -483,3 +429,10 @@ error:
iounmap(hose->cfg_data);
return 1;
}
struct celleb_phb_spec celleb_epci_spec __initdata = {
.setup = celleb_setup_epci,
.ops = &spiderpci_ops,
.iowa_init = &spiderpci_iowa_init,
.iowa_data = (void *)0,
};

547
arch/powerpc/platforms/cell/celleb_scc_pciex.c Normal file
View File

@ -0,0 +1,547 @@
/*
* Support for Celleb PCI-Express.
*
* (C) Copyright 2007-2008 TOSHIBA CORPORATION
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#undef DEBUG
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/iommu.h>
#include <asm/byteorder.h>
#include "celleb_scc.h"
#include "celleb_pci.h"
#define PEX_IN(base, off) in_be32((void *)(base) + (off))
#define PEX_OUT(base, off, data) out_be32((void *)(base) + (off), (data))
static void scc_pciex_io_flush(struct iowa_bus *bus)
{
(void)PEX_IN(bus->phb->cfg_addr, PEXDMRDEN0);
}
/*
* Memory space access to device on PCIEX
*/
#define PCIEX_MMIO_READ(name, ret) \
static ret scc_pciex_##name(const PCI_IO_ADDR addr) \
{ \
ret val = __do_##name(addr); \
scc_pciex_io_flush(iowa_mem_find_bus(addr)); \
return val; \
}
#define PCIEX_MMIO_READ_STR(name) \
static void scc_pciex_##name(const PCI_IO_ADDR addr, void *buf, \
unsigned long count) \
{ \
__do_##name(addr, buf, count); \
scc_pciex_io_flush(iowa_mem_find_bus(addr)); \
}
PCIEX_MMIO_READ(readb, u8)
PCIEX_MMIO_READ(readw, u16)
PCIEX_MMIO_READ(readl, u32)
PCIEX_MMIO_READ(readq, u64)
PCIEX_MMIO_READ(readw_be, u16)
PCIEX_MMIO_READ(readl_be, u32)
PCIEX_MMIO_READ(readq_be, u64)
PCIEX_MMIO_READ_STR(readsb)
PCIEX_MMIO_READ_STR(readsw)
PCIEX_MMIO_READ_STR(readsl)
static void scc_pciex_memcpy_fromio(void *dest, const PCI_IO_ADDR src,
unsigned long n)
{
__do_memcpy_fromio(dest, src, n);
scc_pciex_io_flush(iowa_mem_find_bus(src));
}
/*
* I/O port access to devices on PCIEX.
*/
static inline unsigned long get_bus_address(struct pci_controller *phb,
unsigned long port)
{
return port - ((unsigned long)(phb->io_base_virt) - _IO_BASE);
}
static u32 scc_pciex_read_port(struct pci_controller *phb,
unsigned long port, int size)
{
unsigned int byte_enable;
unsigned int cmd, shift;
unsigned long addr;
u32 data, ret;
BUG_ON(((port & 0x3ul) + size) > 4);
addr = get_bus_address(phb, port);
shift = addr & 0x3ul;
byte_enable = ((1 << size) - 1) << shift;
cmd = PEXDCMND_IO_READ | (byte_enable << PEXDCMND_BYTE_EN_SHIFT);
PEX_OUT(phb->cfg_addr, PEXDADRS, (addr & ~0x3ul));
PEX_OUT(phb->cfg_addr, PEXDCMND, cmd);
data = PEX_IN(phb->cfg_addr, PEXDRDATA);
ret = (data >> (shift * 8)) & (0xFFFFFFFF >> ((4 - size) * 8));
pr_debug("PCIEX:PIO READ:port=0x%lx, addr=0x%lx, size=%d, be=%x,"
" cmd=%x, data=%x, ret=%x\n", port, addr, size, byte_enable,
cmd, data, ret);
return ret;
}
static void scc_pciex_write_port(struct pci_controller *phb,
unsigned long port, int size, u32 val)
{
unsigned int byte_enable;
unsigned int cmd, shift;
unsigned long addr;
u32 data;
BUG_ON(((port & 0x3ul) + size) > 4);
addr = get_bus_address(phb, port);
shift = addr & 0x3ul;
byte_enable = ((1 << size) - 1) << shift;
cmd = PEXDCMND_IO_WRITE | (byte_enable << PEXDCMND_BYTE_EN_SHIFT);
data = (val & (0xFFFFFFFF >> (4 - size) * 8)) << (shift * 8);
PEX_OUT(phb->cfg_addr, PEXDADRS, (addr & ~0x3ul));
PEX_OUT(phb->cfg_addr, PEXDCMND, cmd);
PEX_OUT(phb->cfg_addr, PEXDWDATA, data);
pr_debug("PCIEX:PIO WRITE:port=0x%lx, addr=%lx, size=%d, val=%x,"
" be=%x, cmd=%x, data=%x\n", port, addr, size, val,
byte_enable, cmd, data);
}
static u8 __scc_pciex_inb(struct pci_controller *phb, unsigned long port)
{
return (u8)scc_pciex_read_port(phb, port, 1);
}
static u16 __scc_pciex_inw(struct pci_controller *phb, unsigned long port)
{
u32 data;
if ((port & 0x3ul) < 3)
data = scc_pciex_read_port(phb, port, 2);
else {
u32 d1 = scc_pciex_read_port(phb, port, 1);
u32 d2 = scc_pciex_read_port(phb, port + 1, 1);
data = d1 | (d2 << 8);
}
return (u16)data;
}
static u32 __scc_pciex_inl(struct pci_controller *phb, unsigned long port)
{
unsigned int mod = port & 0x3ul;
u32 data;
if (mod == 0)
data = scc_pciex_read_port(phb, port, 4);
else {
u32 d1 = scc_pciex_read_port(phb, port, 4 - mod);
u32 d2 = scc_pciex_read_port(phb, port + 1, mod);
data = d1 | (d2 << (mod * 8));
}
return data;
}
static void __scc_pciex_outb(struct pci_controller *phb,
u8 val, unsigned long port)
{
scc_pciex_write_port(phb, port, 1, (u32)val);
}
static void __scc_pciex_outw(struct pci_controller *phb,
u16 val, unsigned long port)
{
if ((port & 0x3ul) < 3)
scc_pciex_write_port(phb, port, 2, (u32)val);
else {
u32 d1 = val & 0x000000FF;
u32 d2 = (val & 0x0000FF00) >> 8;
scc_pciex_write_port(phb, port, 1, d1);
scc_pciex_write_port(phb, port + 1, 1, d2);
}
}
static void __scc_pciex_outl(struct pci_controller *phb,
u32 val, unsigned long port)
{
unsigned int mod = port & 0x3ul;
if (mod == 0)
scc_pciex_write_port(phb, port, 4, val);
else {
u32 d1 = val & (0xFFFFFFFFul >> (mod * 8));
u32 d2 = val >> ((4 - mod) * 8);
scc_pciex_write_port(phb, port, 4 - mod, d1);
scc_pciex_write_port(phb, port + 1, mod, d2);
}
}
#define PCIEX_PIO_FUNC(size, name) \
static u##size scc_pciex_in##name(unsigned long port) \
{ \
struct iowa_bus *bus = iowa_pio_find_bus(port); \
u##size data = __scc_pciex_in##name(bus->phb, port); \
scc_pciex_io_flush(bus); \
return data; \
} \
static void scc_pciex_ins##name(unsigned long p, void *b, unsigned long c) \
{ \
struct iowa_bus *bus = iowa_pio_find_bus(p); \
u##size *dst = b; \
for (; c != 0; c--, dst++) \
*dst = cpu_to_le##size(__scc_pciex_in##name(bus->phb, p)); \
scc_pciex_io_flush(bus); \
} \
static void scc_pciex_out##name(u##size val, unsigned long port) \
{ \
struct iowa_bus *bus = iowa_pio_find_bus(port); \
__scc_pciex_out##name(bus->phb, val, port); \
} \
static void scc_pciex_outs##name(unsigned long p, const void *b, \
unsigned long c) \
{ \
struct iowa_bus *bus = iowa_pio_find_bus(p); \
const u##size *src = b; \
for (; c != 0; c--, src++) \
__scc_pciex_out##name(bus->phb, le##size##_to_cpu(*src), p); \
}
#define cpu_to_le8(x) (x)
#define le8_to_cpu(x) (x)
PCIEX_PIO_FUNC(8, b)
PCIEX_PIO_FUNC(16, w)
PCIEX_PIO_FUNC(32, l)
static struct ppc_pci_io scc_pciex_ops = {
.readb = scc_pciex_readb,
.readw = scc_pciex_readw,
.readl = scc_pciex_readl,
.readq = scc_pciex_readq,
.readw_be = scc_pciex_readw_be,
.readl_be = scc_pciex_readl_be,
.readq_be = scc_pciex_readq_be,
.readsb = scc_pciex_readsb,
.readsw = scc_pciex_readsw,
.readsl = scc_pciex_readsl,
.memcpy_fromio = scc_pciex_memcpy_fromio,
.inb = scc_pciex_inb,
.inw = scc_pciex_inw,
.inl = scc_pciex_inl,
.outb = scc_pciex_outb,
.outw = scc_pciex_outw,
.outl = scc_pciex_outl,
.insb = scc_pciex_insb,
.insw = scc_pciex_insw,
.insl = scc_pciex_insl,
.outsb = scc_pciex_outsb,
.outsw = scc_pciex_outsw,
.outsl = scc_pciex_outsl,
};
static int __init scc_pciex_iowa_init(struct iowa_bus *bus, void *data)
{
dma_addr_t dummy_page_da;
void *dummy_page_va;
dummy_page_va = kmalloc(PAGE_SIZE, GFP_KERNEL);
if (!dummy_page_va) {
pr_err("PCIEX:Alloc dummy_page_va failed\n");
return -1;
}
dummy_page_da = dma_map_single(bus->phb->parent, dummy_page_va,
PAGE_SIZE, DMA_FROM_DEVICE);
if (dma_mapping_error(dummy_page_da)) {
pr_err("PCIEX:Map dummy page failed.\n");
kfree(dummy_page_va);
return -1;
}
PEX_OUT(bus->phb->cfg_addr, PEXDMRDADR0, dummy_page_da);
return 0;
}
/*
* config space access
*/
#define MK_PEXDADRS(bus_no, dev_no, func_no, addr) \
((uint32_t)(((addr) & ~0x3UL) | \
((bus_no) << PEXDADRS_BUSNO_SHIFT) | \
((dev_no) << PEXDADRS_DEVNO_SHIFT) | \
((func_no) << PEXDADRS_FUNCNO_SHIFT)))
#define MK_PEXDCMND_BYTE_EN(addr, size) \
((((0x1 << (size))-1) << ((addr) & 0x3)) << PEXDCMND_BYTE_EN_SHIFT)
#define MK_PEXDCMND(cmd, addr, size) ((cmd) | MK_PEXDCMND_BYTE_EN(addr, size))
static uint32_t config_read_pciex_dev(unsigned int *base,
uint64_t bus_no, uint64_t dev_no, uint64_t func_no,
uint64_t off, uint64_t size)
{
uint32_t ret;
uint32_t addr, cmd;
addr = MK_PEXDADRS(bus_no, dev_no, func_no, off);
cmd = MK_PEXDCMND(PEXDCMND_CONFIG_READ, off, size);
PEX_OUT(base, PEXDADRS, addr);
PEX_OUT(base, PEXDCMND, cmd);
ret = (PEX_IN(base, PEXDRDATA)
>> ((off & (4-size)) * 8)) & ((0x1 << (size * 8)) - 1);
return ret;
}
static void config_write_pciex_dev(unsigned int *base, uint64_t bus_no,
uint64_t dev_no, uint64_t func_no, uint64_t off, uint64_t size,
uint32_t data)
{
uint32_t addr, cmd;
addr = MK_PEXDADRS(bus_no, dev_no, func_no, off);
cmd = MK_PEXDCMND(PEXDCMND_CONFIG_WRITE, off, size);
PEX_OUT(base, PEXDADRS, addr);
PEX_OUT(base, PEXDCMND, cmd);
PEX_OUT(base, PEXDWDATA,
(data & ((0x1 << (size * 8)) - 1)) << ((off & (4-size)) * 8));
}
#define MK_PEXCADRS_BYTE_EN(off, len) \
((((0x1 << (len)) - 1) << ((off) & 0x3)) << PEXCADRS_BYTE_EN_SHIFT)
#define MK_PEXCADRS(cmd, addr, size) \
((cmd) | MK_PEXCADRS_BYTE_EN(addr, size) | ((addr) & ~0x3))
static uint32_t config_read_pciex_rc(unsigned int *base,
uint32_t where, uint32_t size)
{
PEX_OUT(base, PEXCADRS, MK_PEXCADRS(PEXCADRS_CMD_READ, where, size));
return (PEX_IN(base, PEXCRDATA)
>> ((where & (4 - size)) * 8)) & ((0x1 << (size * 8)) - 1);
}
static void config_write_pciex_rc(unsigned int *base, uint32_t where,
uint32_t size, uint32_t val)
{
uint32_t data;
data = (val & ((0x1 << (size * 8)) - 1)) << ((where & (4 - size)) * 8);
PEX_OUT(base, PEXCADRS, MK_PEXCADRS(PEXCADRS_CMD_WRITE, where, size));
PEX_OUT(base, PEXCWDATA, data);
}
/* Interfaces */
/* Note: Work-around
* On SCC PCIEXC, one device is seen on all 32 dev_no.
* As SCC PCIEXC can have only one device on the bus, we look only one dev_no.
* (dev_no = 1)
*/
static int scc_pciex_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, unsigned int *val)
{
struct device_node *dn;
struct pci_controller *phb;
dn = bus->sysdata;
phb = pci_find_hose_for_OF_device(dn);
if (bus->number == phb->first_busno && PCI_SLOT(devfn) != 1) {
*val = ~0;
return PCIBIOS_DEVICE_NOT_FOUND;
}
if (bus->number == 0 && PCI_SLOT(devfn) == 0)
*val = config_read_pciex_rc(phb->cfg_addr, where, size);
else
*val = config_read_pciex_dev(phb->cfg_addr, bus->number,
PCI_SLOT(devfn), PCI_FUNC(devfn), where, size);
return PCIBIOS_SUCCESSFUL;
}
static int scc_pciex_write_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, unsigned int val)
{
struct device_node *dn;
struct pci_controller *phb;
dn = bus->sysdata;
phb = pci_find_hose_for_OF_device(dn);
if (bus->number == phb->first_busno && PCI_SLOT(devfn) != 1)
return PCIBIOS_DEVICE_NOT_FOUND;
if (bus->number == 0 && PCI_SLOT(devfn) == 0)
config_write_pciex_rc(phb->cfg_addr, where, size, val);
else
config_write_pciex_dev(phb->cfg_addr, bus->number,
PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, val);
return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops scc_pciex_pci_ops = {
scc_pciex_read_config,
scc_pciex_write_config,
};
static void pciex_clear_intr_all(unsigned int *base)
{
PEX_OUT(base, PEXAERRSTS, 0xffffffff);
PEX_OUT(base, PEXPRERRSTS, 0xffffffff);
PEX_OUT(base, PEXINTSTS, 0xffffffff);
}
#if 0
static void pciex_disable_intr_all(unsigned int *base)
{
PEX_OUT(base, PEXINTMASK, 0x0);
PEX_OUT(base, PEXAERRMASK, 0x0);
PEX_OUT(base, PEXPRERRMASK, 0x0);
PEX_OUT(base, PEXVDMASK, 0x0);
}
#endif
static void pciex_enable_intr_all(unsigned int *base)
{
PEX_OUT(base, PEXINTMASK, 0x0000e7f1);
PEX_OUT(base, PEXAERRMASK, 0x03ff01ff);
PEX_OUT(base, PEXPRERRMASK, 0x0001010f);
PEX_OUT(base, PEXVDMASK, 0x00000001);
}
static void pciex_check_status(unsigned int *base)
{
uint32_t err = 0;
uint32_t intsts, aerr, prerr, rcvcp, lenerr;
uint32_t maea, maec;
intsts = PEX_IN(base, PEXINTSTS);
aerr = PEX_IN(base, PEXAERRSTS);
prerr = PEX_IN(base, PEXPRERRSTS);
rcvcp = PEX_IN(base, PEXRCVCPLIDA);
lenerr = PEX_IN(base, PEXLENERRIDA);
if (intsts || aerr || prerr || rcvcp || lenerr)
err = 1;
pr_info("PCEXC interrupt!!\n");
pr_info("PEXINTSTS :0x%08x\n", intsts);
pr_info("PEXAERRSTS :0x%08x\n", aerr);
pr_info("PEXPRERRSTS :0x%08x\n", prerr);
pr_info("PEXRCVCPLIDA :0x%08x\n", rcvcp);
pr_info("PEXLENERRIDA :0x%08x\n", lenerr);
/* print detail of Protection Error */
if (intsts & 0x00004000) {
uint32_t i, n;
for (i = 0; i < 4; i++) {
n = 1 << i;
if (prerr & n) {
maea = PEX_IN(base, PEXMAEA(i));
maec = PEX_IN(base, PEXMAEC(i));
pr_info("PEXMAEC%d :0x%08x\n", i, maec);
pr_info("PEXMAEA%d :0x%08x\n", i, maea);
}
}
}
if (err)
pciex_clear_intr_all(base);
}
static irqreturn_t pciex_handle_internal_irq(int irq, void *dev_id)
{
struct pci_controller *phb = dev_id;
pr_debug("PCIEX:pciex_handle_internal_irq(irq=%d)\n", irq);
BUG_ON(phb->cfg_addr == NULL);
pciex_check_status(phb->cfg_addr);
return IRQ_HANDLED;
}
static __init int celleb_setup_pciex(struct device_node *node,
struct pci_controller *phb)
{
struct resource r;
struct of_irq oirq;
int virq;
/* SMMIO registers; used inside this file */
if (of_address_to_resource(node, 0, &r)) {
pr_err("PCIEXC:Failed to get config resource.\n");
return 1;
}
phb->cfg_addr = ioremap(r.start, r.end - r.start + 1);
if (!phb->cfg_addr) {
pr_err("PCIEXC:Failed to remap SMMIO region.\n");
return 1;
}
/* Not use cfg_data, cmd and data regs are near address reg */
phb->cfg_data = NULL;
/* set pci_ops */
phb->ops = &scc_pciex_pci_ops;
/* internal interrupt handler */
if (of_irq_map_one(node, 1, &oirq)) {
pr_err("PCIEXC:Failed to map irq\n");
goto error;
}
virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
oirq.size);
if (request_irq(virq, pciex_handle_internal_irq,
IRQF_DISABLED, "pciex", (void *)phb)) {
pr_err("PCIEXC:Failed to request irq\n");
goto error;
}
/* enable all interrupts */
pciex_clear_intr_all(phb->cfg_addr);
pciex_enable_intr_all(phb->cfg_addr);
/* MSI: TBD */
return 0;
error:
phb->cfg_data = NULL;
if (phb->cfg_addr)
iounmap(phb->cfg_addr);
phb->cfg_addr = NULL;
return 1;
}
struct celleb_phb_spec celleb_pciex_spec __initdata = {
.setup = celleb_setup_pciex,
.ops = &scc_pciex_ops,
.iowa_init = &scc_pciex_iowa_init,
};

0
arch/powerpc/platforms/celleb/scc_sio.c → arch/powerpc/platforms/cell/celleb_scc_sio.c
View File

2
arch/powerpc/platforms/celleb/scc_uhc.c → arch/powerpc/platforms/cell/celleb_scc_uhc.c
View File

@ -25,7 +25,7 @@
#include <asm/io.h>
#include <asm/machdep.h>
#include "scc.h"
#include "celleb_scc.h"
#define UHC_RESET_WAIT_MAX 10000

12
arch/powerpc/platforms/celleb/setup.c → arch/powerpc/platforms/cell/celleb_setup.c
View File

@ -56,13 +56,13 @@
#include <asm/rtas.h>
#include <asm/cell-regs.h>
#include "interrupt.h"
#include "beat_interrupt.h"
#include "beat_wrapper.h"
#include "beat.h"
#include "pci.h"
#include "../cell/interrupt.h"
#include "../cell/pervasive.h"
#include "../cell/ras.h"
#include "celleb_pci.h"
#include "interrupt.h"
#include "pervasive.h"
#include "ras.h"
static char celleb_machine_type[128] = "Celleb";
@ -114,8 +114,6 @@ static int __init celleb_publish_devices(void)
/* Publish OF platform devices for southbridge IOs */
of_platform_bus_probe(NULL, celleb_bus_ids, NULL);
celleb_pci_workaround_init();
return 0;
}
machine_device_initcall(celleb_beat, celleb_publish_devices);

380
arch/powerpc/platforms/cell/io-workarounds.c
View File

@ -1,6 +1,9 @@
/*
* Support PCI IO workaround
*
* Copyright (C) 2006 Benjamin Herrenschmidt <benh@kernel.crashing.org>
* IBM, Corp.
* (C) Copyright 2007-2008 TOSHIBA CORPORATION
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@ -9,335 +12,174 @@
#undef DEBUG
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/pgtable.h>
#include <asm/ppc-pci.h>
#include "io-workarounds.h"
#define SPIDER_PCI_REG_BASE 0xd000
#define SPIDER_PCI_VCI_CNTL_STAT 0x0110
#define SPIDER_PCI_DUMMY_READ 0x0810
#define SPIDER_PCI_DUMMY_READ_BASE 0x0814
#define IOWA_MAX_BUS 8
/* Undefine that to re-enable bogus prefetch
*
* Without that workaround, the chip will do bogus prefetch past
* page boundary from system memory. This setting will disable that,
* though the documentation is unclear as to the consequences of doing
* so, either purely performances, or possible misbehaviour... It's not
* clear wether the chip can handle unaligned accesses at all without
* prefetching enabled.
*
* For now, things appear to be behaving properly with that prefetching
* disabled and IDE, possibly because IDE isn't doing any unaligned
* access.
*/
#define SPIDER_DISABLE_PREFETCH
static struct iowa_bus iowa_busses[IOWA_MAX_BUS];
static unsigned int iowa_bus_count;
#define MAX_SPIDERS 3
static struct spider_pci_bus {
void __iomem *regs;
unsigned long mmio_start;
unsigned long mmio_end;
unsigned long pio_vstart;
unsigned long pio_vend;
} spider_pci_busses[MAX_SPIDERS];
static int spider_pci_count;
static struct spider_pci_bus *spider_pci_find(unsigned long vaddr,
unsigned long paddr)
static struct iowa_bus *iowa_pci_find(unsigned long vaddr, unsigned long paddr)
{
int i;
int i, j;
struct resource *res;
unsigned long vstart, vend;
for (i = 0; i < spider_pci_count; i++) {
struct spider_pci_bus *bus = &spider_pci_busses[i];
if (paddr && paddr >= bus->mmio_start && paddr < bus->mmio_end)
return bus;
if (vaddr && vaddr >= bus->pio_vstart && vaddr < bus->pio_vend)
return bus;
for (i = 0; i < iowa_bus_count; i++) {
struct iowa_bus *bus = &iowa_busses[i];
struct pci_controller *phb = bus->phb;
if (vaddr) {
vstart = (unsigned long)phb->io_base_virt;
vend = vstart + phb->pci_io_size - 1;
if ((vaddr >= vstart) && (vaddr <= vend))
return bus;
}
if (paddr)
for (j = 0; j < 3; j++) {
res = &phb->mem_resources[j];
if (paddr >= res->start && paddr <= res->end)
return bus;
}
}
return NULL;
}
static void spider_io_flush(const volatile void __iomem *addr)
struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR addr)
{
struct spider_pci_bus *bus;
struct iowa_bus *bus;
int token;
/* Get platform token (set by ioremap) from address */
token = PCI_GET_ADDR_TOKEN(addr);
/* Fast path if we have a non-0 token, it indicates which bus we
* are on.
*
* If the token is 0, that means either that the ioremap was done
* before we initialized this layer, or it's a PIO operation. We
* fallback to a low path in this case. Hopefully, internal devices
* which are ioremap'ed early should use in_XX/out_XX functions
* instead of the PCI ones and thus not suffer from the slowdown.
*
* Also note that currently, the workaround will not work for areas
* that are not mapped with PTEs (bolted in the hash table). This
* is the case for ioremaps done very early at boot (before
* mem_init_done) and includes the mapping of the ISA IO space.
*
* Fortunately, none of the affected devices is expected to do DMA
* and thus there should be no problem in practice.
*
* In order to improve performances, we only do the PTE search for
* addresses falling in the PHB IO space area. That means it will
* not work for hotplug'ed PHBs but those don't exist with Spider.
*/
if (token && token <= spider_pci_count)
bus = &spider_pci_busses[token - 1];
if (token && token <= iowa_bus_count)
bus = &iowa_busses[token - 1];
else {
unsigned long vaddr, paddr;
pte_t *ptep;
/* Fixup physical address */
vaddr = (unsigned long)PCI_FIX_ADDR(addr);
if (vaddr < PHB_IO_BASE || vaddr >= PHB_IO_END)
return NULL;
/* Check if it's in allowed range for PIO */
if (vaddr < PHB_IO_BASE || vaddr > PHB_IO_END)
return;
/* Try to find a PTE. If not, clear the paddr, we'll do
* a vaddr only lookup (PIO only)
*/
ptep = find_linux_pte(init_mm.pgd, vaddr);
if (ptep == NULL)
paddr = 0;
else
paddr = pte_pfn(*ptep) << PAGE_SHIFT;
bus = iowa_pci_find(vaddr, paddr);
bus = spider_pci_find(vaddr, paddr);
if (bus == NULL)
return;
return NULL;
}
/* Now do the workaround
*/
(void)in_be32(bus->regs + SPIDER_PCI_DUMMY_READ);
return bus;
}
static u8 spider_readb(const volatile void __iomem *addr)
struct iowa_bus *iowa_pio_find_bus(unsigned long port)
{
u8 val = __do_readb(addr);
spider_io_flush(addr);
return val;
}
static u16 spider_readw(const volatile void __iomem *addr)
{
u16 val = __do_readw(addr);
spider_io_flush(addr);
return val;
}
static u32 spider_readl(const volatile void __iomem *addr)
{
u32 val = __do_readl(addr);
spider_io_flush(addr);
return val;
}
static u64 spider_readq(const volatile void __iomem *addr)
{
u64 val = __do_readq(addr);
spider_io_flush(addr);
return val;
}
static u16 spider_readw_be(const volatile void __iomem *addr)
{
u16 val = __do_readw_be(addr);
spider_io_flush(addr);
return val;
}
static u32 spider_readl_be(const volatile void __iomem *addr)
{
u32 val = __do_readl_be(addr);
spider_io_flush(addr);
return val;
}
static u64 spider_readq_be(const volatile void __iomem *addr)
{
u64 val = __do_readq_be(addr);
spider_io_flush(addr);
return val;
}
static void spider_readsb(const volatile void __iomem *addr, void *buf,
unsigned long count)
{
__do_readsb(addr, buf, count);
spider_io_flush(addr);
}
static void spider_readsw(const volatile void __iomem *addr, void *buf,
unsigned long count)
{
__do_readsw(addr, buf, count);
spider_io_flush(addr);
}
static void spider_readsl(const volatile void __iomem *addr, void *buf,
unsigned long count)
{
__do_readsl(addr, buf, count);
spider_io_flush(addr);
}
static void spider_memcpy_fromio(void *dest, const volatile void __iomem *src,
unsigned long n)
{
__do_memcpy_fromio(dest, src, n);
spider_io_flush(src);
unsigned long vaddr = (unsigned long)pci_io_base + port;
return iowa_pci_find(vaddr, 0);
}
static void __iomem * spider_ioremap(unsigned long addr, unsigned long size,
unsigned long flags)
#define DEF_PCI_AC_RET(name, ret, at, al, space, aa) \
static ret iowa_##name at \
{ \
struct iowa_bus *bus; \
bus = iowa_##space##_find_bus(aa); \
if (bus && bus->ops && bus->ops->name) \
return bus->ops->name al; \
return __do_##name al; \
}
#define DEF_PCI_AC_NORET(name, at, al, space, aa) \
static void iowa_##name at \
{ \
struct iowa_bus *bus; \
bus = iowa_##space##_find_bus(aa); \
if (bus && bus->ops && bus->ops->name) { \
bus->ops->name al; \
return; \
} \
__do_##name al; \
}
#include <asm/io-defs.h>
#undef DEF_PCI_AC_RET
#undef DEF_PCI_AC_NORET
static struct ppc_pci_io __initdata iowa_pci_io = {
#define DEF_PCI_AC_RET(name, ret, at, al, space, aa) .name = iowa_##name,
#define DEF_PCI_AC_NORET(name, at, al, space, aa) .name = iowa_##name,
#include <asm/io-defs.h>
#undef DEF_PCI_AC_RET
#undef DEF_PCI_AC_NORET
};
static void __iomem *iowa_ioremap(unsigned long addr, unsigned long size,
unsigned long flags)
{
struct spider_pci_bus *bus;
struct iowa_bus *bus;
void __iomem *res = __ioremap(addr, size, flags);
int busno;
pr_debug("spider_ioremap(0x%lx, 0x%lx, 0x%lx) -> 0x%p\n",
addr, size, flags, res);
bus = spider_pci_find(0, addr);
bus = iowa_pci_find(0, addr);
if (bus != NULL) {
busno = bus - spider_pci_busses;
pr_debug(" found bus %d, setting token\n", busno);
busno = bus - iowa_busses;
PCI_SET_ADDR_TOKEN(res, busno + 1);
}
pr_debug(" result=0x%p\n", res);
return res;
}
static void __init spider_pci_setup_chip(struct spider_pci_bus *bus)
/* Regist new bus to support workaround */
void __init iowa_register_bus(struct pci_controller *phb,
struct ppc_pci_io *ops,
int (*initfunc)(struct iowa_bus *, void *), void *data)
{
#ifdef SPIDER_DISABLE_PREFETCH
u32 val = in_be32(bus->regs + SPIDER_PCI_VCI_CNTL_STAT);
pr_debug(" PVCI_Control_Status was 0x%08x\n", val);
out_be32(bus->regs + SPIDER_PCI_VCI_CNTL_STAT, val | 0x8);
#endif
/* Configure the dummy address for the workaround */
out_be32(bus->regs + SPIDER_PCI_DUMMY_READ_BASE, 0x80000000);
}
static void __init spider_pci_add_one(struct pci_controller *phb)
{
struct spider_pci_bus *bus = &spider_pci_busses[spider_pci_count];
struct iowa_bus *bus;
struct device_node *np = phb->dn;
struct resource rsrc;
void __iomem *regs;
if (spider_pci_count >= MAX_SPIDERS) {
printk(KERN_ERR "Too many spider bridges, workarounds"
" disabled for %s\n", np->full_name);
if (iowa_bus_count >= IOWA_MAX_BUS) {
pr_err("IOWA:Too many pci bridges, "
"workarounds disabled for %s\n", np->full_name);
return;
}
/* Get the registers for the beast */
if (of_address_to_resource(np, 0, &rsrc)) {
printk(KERN_ERR "Failed to get registers for spider %s"
" workarounds disabled\n", np->full_name);
return;
}
bus = &iowa_busses[iowa_bus_count];
bus->phb = phb;
bus->ops = ops;
/* Mask out some useless bits in there to get to the base of the
* spider chip
*/
rsrc.start &= ~0xfffffffful;
if (initfunc)
if ((*initfunc)(bus, data))
return;
/* Map them */
regs = ioremap(rsrc.start + SPIDER_PCI_REG_BASE, 0x1000);
if (regs == NULL) {
printk(KERN_ERR "Failed to map registers for spider %s"
" workarounds disabled\n", np->full_name);
return;
}
iowa_bus_count++;
spider_pci_count++;
/* We assume spiders only have one MMIO resource */
bus->mmio_start = phb->mem_resources[0].start;
bus->mmio_end = phb->mem_resources[0].end + 1;
bus->pio_vstart = (unsigned long)phb->io_base_virt;
bus->pio_vend = bus->pio_vstart + phb->pci_io_size;
bus->regs = regs;
printk(KERN_INFO "PCI: Spider MMIO workaround for %s\n",np->full_name);
pr_debug(" mmio (P) = 0x%016lx..0x%016lx\n",
bus->mmio_start, bus->mmio_end);
pr_debug(" pio (V) = 0x%016lx..0x%016lx\n",
bus->pio_vstart, bus->pio_vend);
pr_debug(" regs (P) = 0x%016lx (V) = 0x%p\n",
rsrc.start + SPIDER_PCI_REG_BASE, bus->regs);
spider_pci_setup_chip(bus);
pr_debug("IOWA:[%d]Add bus, %s.\n", iowa_bus_count-1, np->full_name);
}
static struct ppc_pci_io __initdata spider_pci_io = {
.readb = spider_readb,
.readw = spider_readw,
.readl = spider_readl,
.readq = spider_readq,
.readw_be = spider_readw_be,
.readl_be = spider_readl_be,
.readq_be = spider_readq_be,
.readsb = spider_readsb,
.readsw = spider_readsw,
.readsl = spider_readsl,
.memcpy_fromio = spider_memcpy_fromio,
};
static int __init spider_pci_workaround_init(void)
/* enable IO workaround */
void __init io_workaround_init(void)
{
struct pci_controller *phb;
static int io_workaround_inited;
/* Find spider bridges. We assume they have been all probed
* in setup_arch(). If that was to change, we would need to
* update this code to cope with dynamically added busses
*/
list_for_each_entry(phb, &hose_list, list_node) {
struct device_node *np = phb->dn;
const char *model = of_get_property(np, "model", NULL);
/* If no model property or name isn't exactly "pci", skip */
if (model == NULL || strcmp(np->name, "pci"))
continue;
/* If model is not "Spider", skip */
if (strcmp(model, "Spider"))
continue;
spider_pci_add_one(phb);
}
/* No Spider PCI found, exit */
if (spider_pci_count == 0)
return 0;
/* Setup IO callbacks. We only setup MMIO reads. PIO reads will
* fallback to MMIO reads (though without a token, thus slower)
*/
ppc_pci_io = spider_pci_io;
/* Setup ioremap callback */
ppc_md.ioremap = spider_ioremap;
return 0;
if (io_workaround_inited)
return;
ppc_pci_io = iowa_pci_io;
ppc_md.ioremap = iowa_ioremap;
io_workaround_inited = 1;
}
machine_arch_initcall(cell, spider_pci_workaround_init);

49
arch/powerpc/platforms/cell/io-workarounds.h Normal file
View File

@ -0,0 +1,49 @@
/*
* Support PCI IO workaround
*
* (C) Copyright 2007-2008 TOSHIBA CORPORATION
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#ifndef _IO_WORKAROUNDS_H
#define _IO_WORKAROUNDS_H
#include <linux/io.h>
#include <asm/pci-bridge.h>
/* Bus info */
struct iowa_bus {
struct pci_controller *phb;
struct ppc_pci_io *ops;
void *private;
};
void __init io_workaround_init(void);
void __init iowa_register_bus(struct pci_controller *, struct ppc_pci_io *,
int (*)(struct iowa_bus *, void *), void *);
struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR);
struct iowa_bus *iowa_pio_find_bus(unsigned long);
extern struct ppc_pci_io spiderpci_ops;
extern int spiderpci_iowa_init(struct iowa_bus *, void *);
#define SPIDER_PCI_REG_BASE 0xd000
#define SPIDER_PCI_REG_SIZE 0x1000
#define SPIDER_PCI_VCI_CNTL_STAT 0x0110
#define SPIDER_PCI_DUMMY_READ 0x0810
#define SPIDER_PCI_DUMMY_READ_BASE 0x0814
#endif /* _IO_WORKAROUNDS_H */

43
arch/powerpc/platforms/cell/setup.c
View File

@ -57,6 +57,7 @@
#include "interrupt.h"
#include "pervasive.h"
#include "ras.h"
#include "io-workarounds.h"
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
@ -117,13 +118,50 @@ static void cell_fixup_pcie_rootcomplex(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, cell_fixup_pcie_rootcomplex);
static int __devinit cell_setup_phb(struct pci_controller *phb)
{
const char *model;
struct device_node *np;
int rc = rtas_setup_phb(phb);
if (rc)
return rc;
np = phb->dn;
model = of_get_property(np, "model", NULL);
if (model == NULL || strcmp(np->name, "pci"))
return 0;
/* Setup workarounds for spider */
if (strcmp(model, "Spider"))
return 0;
iowa_register_bus(phb, &spiderpci_ops, &spiderpci_iowa_init,
(void *)SPIDER_PCI_REG_BASE);
io_workaround_init();
return 0;
}
static int __init cell_publish_devices(void)
{
struct device_node *root = of_find_node_by_path("/");
struct device_node *np;
int node;
/* Publish OF platform devices for southbridge IOs */
of_platform_bus_probe(NULL, NULL, NULL);
/* On spider based blades, we need to manually create the OF
* platform devices for the PCI host bridges
*/
for_each_child_of_node(root, np) {
if (np->type == NULL || (strcmp(np->type, "pci") != 0 &&
strcmp(np->type, "pciex") != 0))
continue;
of_platform_device_create(np, NULL, NULL);
}
/* There is no device for the MIC memory controller, thus we create
* a platform device for it to attach the EDAC driver to.
*/
@ -132,6 +170,7 @@ static int __init cell_publish_devices(void)
continue;
platform_device_register_simple("cbe-mic", node, NULL, 0);
}
return 0;
}
machine_subsys_initcall(cell, cell_publish_devices);
@ -213,7 +252,7 @@ static void __init cell_setup_arch(void)
/* Find and initialize PCI host bridges */
init_pci_config_tokens();
find_and_init_phbs();
cbe_pervasive_init();
#ifdef CONFIG_DUMMY_CONSOLE
conswitchp = &dummy_con;
@ -249,7 +288,7 @@ define_machine(cell) {
.calibrate_decr = generic_calibrate_decr,
.progress = cell_progress,
.init_IRQ = cell_init_irq,
.pci_setup_phb = rtas_setup_phb,
.pci_setup_phb = cell_setup_phb,
#ifdef CONFIG_KEXEC
.machine_kexec = default_machine_kexec,
.machine_kexec_prepare = default_machine_kexec_prepare,

184
arch/powerpc/platforms/cell/spider-pci.c Normal file
View File

@ -0,0 +1,184 @@
/*
* IO workarounds for PCI on Celleb/Cell platform
*
* (C) Copyright 2006-2007 TOSHIBA CORPORATION
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#undef DEBUG
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/io.h>
#include <asm/ppc-pci.h>
#include <asm/pci-bridge.h>
#include "io-workarounds.h"
#define SPIDER_PCI_DISABLE_PREFETCH
struct spiderpci_iowa_private {
void __iomem *regs;
};
static void spiderpci_io_flush(struct iowa_bus *bus)
{
struct spiderpci_iowa_private *priv;
u32 val;
priv = bus->private;
val = in_be32(priv->regs + SPIDER_PCI_DUMMY_READ);
iosync();
}
#define SPIDER_PCI_MMIO_READ(name, ret) \
static ret spiderpci_##name(const PCI_IO_ADDR addr) \
{ \
ret val = __do_##name(addr); \
spiderpci_io_flush(iowa_mem_find_bus(addr)); \
return val; \
}
#define SPIDER_PCI_MMIO_READ_STR(name) \
static void spiderpci_##name(const PCI_IO_ADDR addr, void *buf, \
unsigned long count) \
{ \
__do_##name(addr, buf, count); \
spiderpci_io_flush(iowa_mem_find_bus(addr)); \
}
SPIDER_PCI_MMIO_READ(readb, u8)
SPIDER_PCI_MMIO_READ(readw, u16)
SPIDER_PCI_MMIO_READ(readl, u32)
SPIDER_PCI_MMIO_READ(readq, u64)
SPIDER_PCI_MMIO_READ(readw_be, u16)
SPIDER_PCI_MMIO_READ(readl_be, u32)
SPIDER_PCI_MMIO_READ(readq_be, u64)
SPIDER_PCI_MMIO_READ_STR(readsb)
SPIDER_PCI_MMIO_READ_STR(readsw)
SPIDER_PCI_MMIO_READ_STR(readsl)
static void spiderpci_memcpy_fromio(void *dest, const PCI_IO_ADDR src,
unsigned long n)
{
__do_memcpy_fromio(dest, src, n);
spiderpci_io_flush(iowa_mem_find_bus(src));
}
static int __init spiderpci_pci_setup_chip(struct pci_controller *phb,
void __iomem *regs)
{
void *dummy_page_va;
dma_addr_t dummy_page_da;
#ifdef SPIDER_PCI_DISABLE_PREFETCH
u32 val = in_be32(regs + SPIDER_PCI_VCI_CNTL_STAT);
pr_debug("SPIDER_IOWA:PVCI_Control_Status was 0x%08x\n", val);
out_be32(regs + SPIDER_PCI_VCI_CNTL_STAT, val | 0x8);
#endif /* SPIDER_PCI_DISABLE_PREFETCH */
/* setup dummy read */
/*
* On CellBlade, we can't know that which XDR memory is used by
* kmalloc() to allocate dummy_page_va.
* In order to imporve the performance, the XDR which is used to
* allocate dummy_page_va is the nearest the spider-pci.
* We have to select the CBE which is the nearest the spider-pci
* to allocate memory from the best XDR, but I don't know that
* how to do.
*
* Celleb does not have this problem, because it has only one XDR.
*/
dummy_page_va = kmalloc(PAGE_SIZE, GFP_KERNEL);
if (!dummy_page_va) {
pr_err("SPIDERPCI-IOWA:Alloc dummy_page_va failed.\n");
return -1;
}
dummy_page_da = dma_map_single(phb->parent, dummy_page_va,
PAGE_SIZE, DMA_FROM_DEVICE);
if (dma_mapping_error(dummy_page_da)) {
pr_err("SPIDER-IOWA:Map dummy page filed.\n");
kfree(dummy_page_va);
return -1;
}
out_be32(regs + SPIDER_PCI_DUMMY_READ_BASE, dummy_page_da);
return 0;
}
int __init spiderpci_iowa_init(struct iowa_bus *bus, void *data)
{
void __iomem *regs = NULL;
struct spiderpci_iowa_private *priv;
struct device_node *np = bus->phb->dn;
struct resource r;
unsigned long offset = (unsigned long)data;
pr_debug("SPIDERPCI-IOWA:Bus initialize for spider(%s)\n",
np->full_name);
priv = kzalloc(sizeof(struct spiderpci_iowa_private), GFP_KERNEL);
if (!priv) {
pr_err("SPIDERPCI-IOWA:"
"Can't allocate struct spiderpci_iowa_private");
return -1;
}
if (of_address_to_resource(np, 0, &r)) {
pr_err("SPIDERPCI-IOWA:Can't get resource.\n");
goto error;
}
regs = ioremap(r.start + offset, SPIDER_PCI_REG_SIZE);
if (!regs) {
pr_err("SPIDERPCI-IOWA:ioremap failed.\n");
goto error;
}
priv->regs = regs;
bus->private = priv;
if (spiderpci_pci_setup_chip(bus->phb, regs))
goto error;
return 0;
error:
kfree(priv);
bus->private = NULL;
if (regs)
iounmap(regs);
return -1;
}
struct ppc_pci_io spiderpci_ops = {
.readb = spiderpci_readb,
.readw = spiderpci_readw,
.readl = spiderpci_readl,
.readq = spiderpci_readq,
.readw_be = spiderpci_readw_be,
.readl_be = spiderpci_readl_be,
.readq_be = spiderpci_readq_be,
.readsb = spiderpci_readsb,
.readsw = spiderpci_readsw,
.readsl = spiderpci_readsl,
.memcpy_fromio = spiderpci_memcpy_fromio,
};

12
arch/powerpc/platforms/celleb/Kconfig
View File

@ -1,12 +0,0 @@
config PPC_CELLEB
bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
depends on PPC_MULTIPLATFORM && PPC64
select PPC_CELL
select PPC_CELL_NATIVE
select PPC_RTAS
select PPC_INDIRECT_IO
select PPC_OF_PLATFORM_PCI
select HAS_TXX9_SERIAL
select PPC_UDBG_BEAT
select USB_OHCI_BIG_ENDIAN_MMIO
select USB_EHCI_BIG_ENDIAN_MMIO

9
arch/powerpc/platforms/celleb/Makefile
View File

@ -1,9 +0,0 @@
obj-y += interrupt.o iommu.o setup.o \
htab.o beat.o hvCall.o pci.o \
scc_epci.o scc_uhc.o \
io-workarounds.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_PPC_UDBG_BEAT) += udbg_beat.o
obj-$(CONFIG_SERIAL_TXX9) += scc_sio.o
obj-$(CONFIG_SPU_BASE) += spu_priv1.o

280
arch/powerpc/platforms/celleb/io-workarounds.c
View File

@ -1,280 +0,0 @@
/*
* Support for Celleb io workarounds
*
* (C) Copyright 2006-2007 TOSHIBA CORPORATION
*
* This file is based to arch/powerpc/platform/cell/io-workarounds.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#undef DEBUG
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/ppc-pci.h>
#include "pci.h"
#define MAX_CELLEB_PCI_BUS 4
void *celleb_dummy_page_va;
static struct celleb_pci_bus {
struct pci_controller *phb;
void (*dummy_read)(struct pci_controller *);
} celleb_pci_busses[MAX_CELLEB_PCI_BUS];
static int celleb_pci_count = 0;
static struct celleb_pci_bus *celleb_pci_find(unsigned long vaddr,
unsigned long paddr)
{
int i, j;
struct resource *res;
for (i = 0; i < celleb_pci_count; i++) {
struct celleb_pci_bus *bus = &celleb_pci_busses[i];
struct pci_controller *phb = bus->phb;
if (paddr)
for (j = 0; j < 3; j++) {
res = &phb->mem_resources[j];
if (paddr >= res->start && paddr <= res->end)
return bus;
}
res = &phb->io_resource;
if (vaddr && vaddr >= res->start && vaddr <= res->end)
return bus;
}
return NULL;
}
static void celleb_io_flush(const PCI_IO_ADDR addr)
{
struct celleb_pci_bus *bus;
int token;
token = PCI_GET_ADDR_TOKEN(addr);
if (token && token <= celleb_pci_count)
bus = &celleb_pci_busses[token - 1];
else {
unsigned long vaddr, paddr;
pte_t *ptep;
vaddr = (unsigned long)PCI_FIX_ADDR(addr);
if (vaddr < PHB_IO_BASE || vaddr >= PHB_IO_END)
return;
ptep = find_linux_pte(init_mm.pgd, vaddr);
if (ptep == NULL)
paddr = 0;
else
paddr = pte_pfn(*ptep) << PAGE_SHIFT;
bus = celleb_pci_find(vaddr, paddr);
if (bus == NULL)
return;
}
if (bus->dummy_read)
bus->dummy_read(bus->phb);
}
static u8 celleb_readb(const PCI_IO_ADDR addr)
{
u8 val;
val = __do_readb(addr);
celleb_io_flush(addr);
return val;
}
static u16 celleb_readw(const PCI_IO_ADDR addr)
{
u16 val;
val = __do_readw(addr);
celleb_io_flush(addr);
return val;
}
static u32 celleb_readl(const PCI_IO_ADDR addr)
{
u32 val;
val = __do_readl(addr);
celleb_io_flush(addr);
return val;
}
static u64 celleb_readq(const PCI_IO_ADDR addr)
{
u64 val;
val = __do_readq(addr);
celleb_io_flush(addr);
return val;
}
static u16 celleb_readw_be(const PCI_IO_ADDR addr)
{
u16 val;
val = __do_readw_be(addr);
celleb_io_flush(addr);
return val;
}
static u32 celleb_readl_be(const PCI_IO_ADDR addr)
{
u32 val;
val = __do_readl_be(addr);
celleb_io_flush(addr);
return val;
}
static u64 celleb_readq_be(const PCI_IO_ADDR addr)
{
u64 val;
val = __do_readq_be(addr);
celleb_io_flush(addr);
return val;
}
static void celleb_readsb(const PCI_IO_ADDR addr,
void *buf, unsigned long count)
{
__do_readsb(addr, buf, count);
celleb_io_flush(addr);
}
static void celleb_readsw(const PCI_IO_ADDR addr,
void *buf, unsigned long count)
{
__do_readsw(addr, buf, count);
celleb_io_flush(addr);
}
static void celleb_readsl(const PCI_IO_ADDR addr,
void *buf, unsigned long count)
{
__do_readsl(addr, buf, count);
celleb_io_flush(addr);
}
static void celleb_memcpy_fromio(void *dest,
const PCI_IO_ADDR src,
unsigned long n)
{
__do_memcpy_fromio(dest, src, n);
celleb_io_flush(src);
}
static void __iomem *celleb_ioremap(unsigned long addr,
unsigned long size,
unsigned long flags)
{
struct celleb_pci_bus *bus;
void __iomem *res = __ioremap(addr, size, flags);
int busno;
bus = celleb_pci_find(0, addr);
if (bus != NULL) {
busno = bus - celleb_pci_busses;
PCI_SET_ADDR_TOKEN(res, busno + 1);
}
return res;
}
static void celleb_iounmap(volatile void __iomem *addr)
{
return __iounmap(PCI_FIX_ADDR(addr));
}
static struct ppc_pci_io celleb_pci_io __initdata = {
.readb = celleb_readb,
.readw = celleb_readw,
.readl = celleb_readl,
.readq = celleb_readq,
.readw_be = celleb_readw_be,
.readl_be = celleb_readl_be,
.readq_be = celleb_readq_be,
.readsb = celleb_readsb,
.readsw = celleb_readsw,
.readsl = celleb_readsl,
.memcpy_fromio = celleb_memcpy_fromio,
};
void __init celleb_pci_add_one(struct pci_controller *phb,
void (*dummy_read)(struct pci_controller *))
{
struct celleb_pci_bus *bus = &celleb_pci_busses[celleb_pci_count];
struct device_node *np = phb->dn;
if (celleb_pci_count >= MAX_CELLEB_PCI_BUS) {
printk(KERN_ERR "Too many pci bridges, workarounds"
" disabled for %s\n", np->full_name);
return;
}
celleb_pci_count++;
bus->phb = phb;
bus->dummy_read = dummy_read;
}
static struct of_device_id celleb_pci_workaround_match[] __initdata = {
{
.name = "pci-pseudo",
.data = fake_pci_workaround_init,
}, {
.name = "epci",
.data = epci_workaround_init,
}, {
},
};
int __init celleb_pci_workaround_init(void)
{
struct pci_controller *phb;
struct device_node *node;
const struct of_device_id *match;
void (*init_func)(struct pci_controller *);
celleb_dummy_page_va = kmalloc(PAGE_SIZE, GFP_KERNEL);
if (!celleb_dummy_page_va) {
printk(KERN_ERR "Celleb: dummy read disabled. "
"Alloc celleb_dummy_page_va failed\n");
return 1;
}
list_for_each_entry(phb, &hose_list, list_node) {
node = phb->dn;
match = of_match_node(celleb_pci_workaround_match, node);
if (match) {
init_func = match->data;
(*init_func)(phb);
}
}
ppc_pci_io = celleb_pci_io;
ppc_md.ioremap = celleb_ioremap;
ppc_md.iounmap = celleb_iounmap;
return 0;
}

27
arch/powerpc/platforms/iseries/exception.S
View File

@ -59,8 +59,33 @@ system_reset_iSeries:
andc r4,r4,r5
mtspr SPRN_CTRLT,r4
/* Spin on __secondary_hold_spinloop until it is updated by the boot cpu. */
/* In the UP case we'll yeild() later, and we will not access the paca anyway */
#ifdef CONFIG_SMP
1:
HMT_LOW
LOAD_REG_IMMEDIATE(r23, __secondary_hold_spinloop)
ld r23,0(r23)
sync
LOAD_REG_IMMEDIATE(r3,current_set)
sldi r28,r24,3 /* get current_set[cpu#] */
ldx r3,r3,r28
addi r1,r3,THREAD_SIZE
subi r1,r1,STACK_FRAME_OVERHEAD
cmpwi 0,r23,0 /* Keep poking the Hypervisor until */
bne 2f /* we're released */
/* Let the Hypervisor know we are alive */
/* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
lis r3,0x8002
rldicr r3,r3,32,15 /* r0 = (r3 << 32) & 0xffff000000000000 */
li r0,-1 /* r0=-1 indicates a Hypervisor call */
sc /* Invoke the hypervisor via a system call */
b 1b
#endif
2:
HMT_LOW
#ifdef CONFIG_SMP
lbz r23,PACAPROCSTART(r13) /* Test if this processor
* should start */
@ -91,7 +116,7 @@ iSeries_secondary_smp_loop:
li r0,-1 /* r0=-1 indicates a Hypervisor call */
sc /* Invoke the hypervisor via a system call */
mfspr r13,SPRN_SPRG3 /* Put r13 back ???? */
b 1b /* If SMP not configured, secondaries
b 2b /* If SMP not configured, secondaries
* loop forever */
/*** ISeries-LPAR interrupt handlers ***/

1
arch/powerpc/platforms/ps3/os-area.c
View File

@ -25,6 +25,7 @@
#include <linux/syscalls.h>
#include <linux/ctype.h>
#include <linux/lmb.h>
#include <linux/of.h>
#include <asm/prom.h>

5
arch/powerpc/platforms/pseries/Kconfig
View File

@ -34,3 +34,8 @@ config LPARCFG
help
Provide system capacity information via human readable
<key word>=<value> pairs through a /proc/ppc64/lparcfg interface.
config PPC_PSERIES_DEBUG
depends on PPC_PSERIES && PPC_EARLY_DEBUG
bool "Enable extra debug logging in platforms/pseries"
default y

4
arch/powerpc/platforms/pseries/Makefile
View File

@ -2,6 +2,10 @@ ifeq ($(CONFIG_PPC64),y)
EXTRA_CFLAGS += -mno-minimal-toc
endif
ifeq ($(CONFIG_PPC_PSERIES_DEBUG),y)
EXTRA_CFLAGS += -DDEBUG
endif
obj-y := lpar.o hvCall.o nvram.o reconfig.o \
setup.o iommu.o ras.o rtasd.o \
firmware.o power.o

1
arch/powerpc/platforms/pseries/eeh.c
View File

@ -39,7 +39,6 @@
#include <asm/ppc-pci.h>
#include <asm/rtas.h>
#undef DEBUG
/** Overview:
* EEH, or "Extended Error Handling" is a PCI bridge technology for

1
arch/powerpc/platforms/pseries/eeh_cache.c
View File

@ -28,7 +28,6 @@
#include <asm/pci-bridge.h>
#include <asm/ppc-pci.h>
#undef DEBUG
/**
* The pci address cache subsystem. This subsystem places

10
arch/powerpc/platforms/pseries/firmware.c
View File

@ -21,17 +21,11 @@
* 2 of the License, or (at your option) any later version.
*/
#undef DEBUG
#include <asm/firmware.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif
typedef struct {
unsigned long val;
@ -72,7 +66,7 @@ void __init fw_feature_init(const char *hypertas, unsigned long len)
const char *s;
int i;
DBG(" -> fw_feature_init()\n");
pr_debug(" -> fw_feature_init()\n");
for (s = hypertas; s < hypertas + len; s += strlen(s) + 1) {
for (i = 0; i < FIRMWARE_MAX_FEATURES; i++) {
@ -88,5 +82,5 @@ void __init fw_feature_init(const char *hypertas, unsigned long len)
}
}
DBG(" <- fw_feature_init()\n");
pr_debug(" <- fw_feature_init()\n");
}

39
arch/powerpc/platforms/pseries/iommu.c
View File

@ -47,7 +47,6 @@
#include "plpar_wrappers.h"
#define DBG(fmt...)
static void tce_build_pSeries(struct iommu_table *tbl, long index,
long npages, unsigned long uaddr,
@ -322,7 +321,7 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
dn = pci_bus_to_OF_node(bus);
DBG("pci_dma_bus_setup_pSeries: setting up bus %s\n", dn->full_name);
pr_debug("pci_dma_bus_setup_pSeries: setting up bus %s\n", dn->full_name);
if (bus->self) {
/* This is not a root bus, any setup will be done for the
@ -347,7 +346,7 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
for (children = 0, tmp = dn->child; tmp; tmp = tmp->sibling)
children++;
DBG("Children: %d\n", children);
pr_debug("Children: %d\n", children);
/* Calculate amount of DMA window per slot. Each window must be
* a power of two (due to pci_alloc_consistent requirements).
@ -361,8 +360,8 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
while (pci->phb->dma_window_size * children > 0x80000000ul)
pci->phb->dma_window_size >>= 1;
DBG("No ISA/IDE, window size is 0x%lx\n",
pci->phb->dma_window_size);
pr_debug("No ISA/IDE, window size is 0x%lx\n",
pci->phb->dma_window_size);
pci->phb->dma_window_base_cur = 0;
return;
@ -387,8 +386,7 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
while (pci->phb->dma_window_size * children > 0x70000000ul)
pci->phb->dma_window_size >>= 1;
DBG("ISA/IDE, window size is 0x%lx\n", pci->phb->dma_window_size);
pr_debug("ISA/IDE, window size is 0x%lx\n", pci->phb->dma_window_size);
}
@ -401,7 +399,8 @@ static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)
dn = pci_bus_to_OF_node(bus);
DBG("pci_dma_bus_setup_pSeriesLP: setting up bus %s\n", dn->full_name);
pr_debug("pci_dma_bus_setup_pSeriesLP: setting up bus %s\n",
dn->full_name);
/* Find nearest ibm,dma-window, walking up the device tree */
for (pdn = dn; pdn != NULL; pdn = pdn->parent) {
@ -411,14 +410,14 @@ static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)
}
if (dma_window == NULL) {
DBG(" no ibm,dma-window property !\n");
pr_debug(" no ibm,dma-window property !\n");
return;
}
ppci = PCI_DN(pdn);
DBG(" parent is %s, iommu_table: 0x%p\n",
pdn->full_name, ppci->iommu_table);
pr_debug(" parent is %s, iommu_table: 0x%p\n",
pdn->full_name, ppci->iommu_table);
if (!ppci->iommu_table) {
tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
@ -426,7 +425,7 @@ static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)
iommu_table_setparms_lpar(ppci->phb, pdn, tbl, dma_window,
bus->number);
ppci->iommu_table = iommu_init_table(tbl, ppci->phb->node);
DBG(" created table: %p\n", ppci->iommu_table);
pr_debug(" created table: %p\n", ppci->iommu_table);
}
if (pdn != dn)
@ -439,7 +438,7 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
struct device_node *dn;
struct iommu_table *tbl;
DBG("pci_dma_dev_setup_pSeries: %s\n", pci_name(dev));
pr_debug("pci_dma_dev_setup_pSeries: %s\n", pci_name(dev));
dn = dev->dev.archdata.of_node;
@ -450,7 +449,7 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
if (!dev->bus->self) {
struct pci_controller *phb = PCI_DN(dn)->phb;
DBG(" --> first child, no bridge. Allocating iommu table.\n");
pr_debug(" --> first child, no bridge. Allocating iommu table.\n");
tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
phb->node);
iommu_table_setparms(phb, dn, tbl);
@ -480,7 +479,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
const void *dma_window = NULL;
struct pci_dn *pci;
DBG("pci_dma_dev_setup_pSeriesLP: %s\n", pci_name(dev));
pr_debug("pci_dma_dev_setup_pSeriesLP: %s\n", pci_name(dev));
/* dev setup for LPAR is a little tricky, since the device tree might
* contain the dma-window properties per-device and not neccesarily
@ -489,7 +488,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
* already allocated.
*/
dn = pci_device_to_OF_node(dev);
DBG(" node is %s\n", dn->full_name);
pr_debug(" node is %s\n", dn->full_name);
for (pdn = dn; pdn && PCI_DN(pdn) && !PCI_DN(pdn)->iommu_table;
pdn = pdn->parent) {
@ -504,13 +503,13 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
pci_name(dev), dn? dn->full_name : "<null>");
return;
}
DBG(" parent is %s\n", pdn->full_name);
pr_debug(" parent is %s\n", pdn->full_name);
/* Check for parent == NULL so we don't try to setup the empty EADS
* slots on POWER4 machines.
*/
if (dma_window == NULL || pdn->parent == NULL) {
DBG(" no dma window for device, linking to parent\n");
pr_debug(" no dma window for device, linking to parent\n");
dev->dev.archdata.dma_data = PCI_DN(pdn)->iommu_table;
return;
}
@ -522,9 +521,9 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
iommu_table_setparms_lpar(pci->phb, pdn, tbl, dma_window,
pci->phb->bus->number);
pci->iommu_table = iommu_init_table(tbl, pci->phb->node);
DBG(" created table: %p\n", pci->iommu_table);
pr_debug(" created table: %p\n", pci->iommu_table);
} else {
DBG(" found DMA window, table: %p\n", pci->iommu_table);
pr_debug(" found DMA window, table: %p\n", pci->iommu_table);
}
dev->dev.archdata.dma_data = pci->iommu_table;

36
arch/powerpc/platforms/pseries/lpar.c
View File

@ -19,7 +19,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#undef DEBUG_LOW
/* Enables debugging of low-level hash table routines - careful! */
#undef DEBUG
#include <linux/kernel.h>
#include <linux/dma-mapping.h>
@ -42,11 +43,6 @@
#include "plpar_wrappers.h"
#include "pseries.h"
#ifdef DEBUG_LOW
#define DBG_LOW(fmt...) do { udbg_printf(fmt); } while(0)
#else
#define DBG_LOW(fmt...) do { } while(0)
#endif
/* in hvCall.S */
EXPORT_SYMBOL(plpar_hcall);
@ -196,6 +192,8 @@ void __init udbg_init_debug_lpar(void)
udbg_putc = udbg_putcLP;
udbg_getc = udbg_getcLP;
udbg_getc_poll = udbg_getc_pollLP;
register_early_udbg_console();
}
/* returns 0 if couldn't find or use /chosen/stdout as console */
@ -288,15 +286,15 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
unsigned long hpte_v, hpte_r;
if (!(vflags & HPTE_V_BOLTED))
DBG_LOW("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
"rflags=%lx, vflags=%lx, psize=%d)\n",
hpte_group, va, pa, rflags, vflags, psize);
pr_debug("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
"rflags=%lx, vflags=%lx, psize=%d)\n",
hpte_group, va, pa, rflags, vflags, psize);
hpte_v = hpte_encode_v(va, psize, ssize) | vflags | HPTE_V_VALID;
hpte_r = hpte_encode_r(pa, psize) | rflags;
if (!(vflags & HPTE_V_BOLTED))
DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
pr_debug(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
/* Now fill in the actual HPTE */
/* Set CEC cookie to 0 */
@ -313,7 +311,7 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot);
if (unlikely(lpar_rc == H_PTEG_FULL)) {
if (!(vflags & HPTE_V_BOLTED))
DBG_LOW(" full\n");
pr_debug(" full\n");
return -1;
}
@ -324,11 +322,11 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
*/
if (unlikely(lpar_rc != H_SUCCESS)) {
if (!(vflags & HPTE_V_BOLTED))
DBG_LOW(" lpar err %d\n", lpar_rc);
pr_debug(" lpar err %lu\n", lpar_rc);
return -2;
}
if (!(vflags & HPTE_V_BOLTED))
DBG_LOW(" -> slot: %d\n", slot & 7);
pr_debug(" -> slot: %lu\n", slot & 7);
/* Because of iSeries, we have to pass down the secondary
* bucket bit here as well
@ -420,17 +418,17 @@ static long pSeries_lpar_hpte_updatepp(unsigned long slot,
want_v = hpte_encode_avpn(va, psize, ssize);
DBG_LOW(" update: avpnv=%016lx, hash=%016lx, f=%x, psize: %d ... ",
want_v, slot, flags, psize);
pr_debug(" update: avpnv=%016lx, hash=%016lx, f=%lx, psize: %d ...",
want_v, slot, flags, psize);
lpar_rc = plpar_pte_protect(flags, slot, want_v);
if (lpar_rc == H_NOT_FOUND) {
DBG_LOW("not found !\n");
pr_debug("not found !\n");
return -1;
}
DBG_LOW("ok\n");
pr_debug("ok\n");
BUG_ON(lpar_rc != H_SUCCESS);
@ -505,8 +503,8 @@ static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
unsigned long lpar_rc;
unsigned long dummy1, dummy2;
DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d",
slot, va, psize, local);
pr_debug(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
slot, va, psize, local);
want_v = hpte_encode_avpn(va, psize, ssize);
lpar_rc = plpar_pte_remove(H_AVPN, slot, want_v, &dummy1, &dummy2);

4
arch/powerpc/platforms/pseries/ras.c
View File

@ -67,8 +67,6 @@ static int ras_check_exception_token;
static irqreturn_t ras_epow_interrupt(int irq, void *dev_id);
static irqreturn_t ras_error_interrupt(int irq, void *dev_id);
/* #define DEBUG */
static void request_ras_irqs(struct device_node *np,
irq_handler_t handler,
@ -237,7 +235,7 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
printk(KERN_EMERG "Error: Fatal hardware error <0x%lx 0x%x>\n",
*((unsigned long *)&ras_log_buf), status);
#ifndef DEBUG
#ifndef DEBUG_RTAS_POWER_OFF
/* Don't actually power off when debugging so we can test
* without actually failing while injecting errors.
* Error data will not be logged to syslog.

14
arch/powerpc/platforms/pseries/rtasd.c
View File

@ -29,11 +29,6 @@
#include <asm/atomic.h>
#include <asm/machdep.h>
#if 0
#define DEBUG(A...) printk(KERN_ERR A)
#else
#define DEBUG(A...)
#endif
static DEFINE_SPINLOCK(rtasd_log_lock);
@ -198,7 +193,7 @@ void pSeries_log_error(char *buf, unsigned int err_type, int fatal)
unsigned long s;
int len = 0;
DEBUG("logging event\n");
pr_debug("rtasd: logging event\n");
if (buf == NULL)
return;
@ -409,7 +404,8 @@ static int rtasd(void *unused)
daemonize("rtasd");
printk(KERN_DEBUG "RTAS daemon started\n");
DEBUG("will sleep for %d milliseconds\n", (30000/rtas_event_scan_rate));
pr_debug("rtasd: will sleep for %d milliseconds\n",
(30000 / rtas_event_scan_rate));
/* See if we have any error stored in NVRAM */
memset(logdata, 0, rtas_error_log_max);
@ -428,9 +424,9 @@ static int rtasd(void *unused)
do_event_scan_all_cpus(1000);
if (surveillance_timeout != -1) {
DEBUG("enabling surveillance\n");
pr_debug("rtasd: enabling surveillance\n");
enable_surveillance(surveillance_timeout);
DEBUG("surveillance enabled\n");
pr_debug("rtasd: surveillance enabled\n");
}
/* Delay should be at least one second since some

23
arch/powerpc/platforms/pseries/scanlog.c
View File

@ -38,9 +38,7 @@
#define SCANLOG_HWERROR -1
#define SCANLOG_CONTINUE 1
#define DEBUG(A...) do { if (scanlog_debug) printk(KERN_ERR "scanlog: " A); } while (0)
static int scanlog_debug;
static unsigned int ibm_scan_log_dump; /* RTAS token */
static struct proc_dir_entry *proc_ppc64_scan_log_dump; /* The proc file */
@ -86,14 +84,14 @@ static ssize_t scanlog_read(struct file *file, char __user *buf,
memcpy(data, rtas_data_buf, RTAS_DATA_BUF_SIZE);
spin_unlock(&rtas_data_buf_lock);
DEBUG("status=%d, data[0]=%x, data[1]=%x, data[2]=%x\n",
status, data[0], data[1], data[2]);
pr_debug("scanlog: status=%d, data[0]=%x, data[1]=%x, " \
"data[2]=%x\n", status, data[0], data[1], data[2]);
switch (status) {
case SCANLOG_COMPLETE:
DEBUG("hit eof\n");
pr_debug("scanlog: hit eof\n");
return 0;
case SCANLOG_HWERROR:
DEBUG("hardware error reading scan log data\n");
pr_debug("scanlog: hardware error reading data\n");
return -EIO;
case SCANLOG_CONTINUE:
/* We may or may not have data yet */
@ -110,7 +108,8 @@ static ssize_t scanlog_read(struct file *file, char __user *buf,
/* Assume extended busy */
wait_time = rtas_busy_delay_time(status);
if (!wait_time) {
printk(KERN_ERR "scanlog: unknown error from rtas: %d\n", status);
printk(KERN_ERR "scanlog: unknown error " \
"from rtas: %d\n", status);
return -EIO;
}
}
@ -134,15 +133,9 @@ static ssize_t scanlog_write(struct file * file, const char __user * buf,
if (buf) {
if (strncmp(stkbuf, "reset", 5) == 0) {
DEBUG("reset scanlog\n");
pr_debug("scanlog: reset scanlog\n");
status = rtas_call(ibm_scan_log_dump, 2, 1, NULL, 0, 0);
DEBUG("rtas returns %d\n", status);
} else if (strncmp(stkbuf, "debugon", 7) == 0) {
printk(KERN_ERR "scanlog: debug on\n");
scanlog_debug = 1;
} else if (strncmp(stkbuf, "debugoff", 8) == 0) {
printk(KERN_ERR "scanlog: debug off\n");
scanlog_debug = 0;
pr_debug("scanlog: rtas returns %d\n", status);
}
}
return count;

17
arch/powerpc/platforms/pseries/setup.c
View File

@ -16,8 +16,6 @@
* bootup setup stuff..
*/
#undef DEBUG
#include <linux/cpu.h>
#include <linux/errno.h>
#include <linux/sched.h>
@ -70,11 +68,6 @@
#include "plpar_wrappers.h"
#include "pseries.h"
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif
int fwnmi_active; /* TRUE if an FWNMI handler is present */
@ -326,7 +319,7 @@ static int pseries_set_xdabr(unsigned long dabr)
*/
static void __init pSeries_init_early(void)
{
DBG(" -> pSeries_init_early()\n");
pr_debug(" -> pSeries_init_early()\n");
if (firmware_has_feature(FW_FEATURE_LPAR))
find_udbg_vterm();
@ -338,7 +331,7 @@ static void __init pSeries_init_early(void)
iommu_init_early_pSeries();
DBG(" <- pSeries_init_early()\n");
pr_debug(" <- pSeries_init_early()\n");
}
/*
@ -383,7 +376,7 @@ static int __init pSeries_probe(void)
of_flat_dt_is_compatible(root, "IBM,CBEA"))
return 0;
DBG("pSeries detected, looking for LPAR capability...\n");
pr_debug("pSeries detected, looking for LPAR capability...\n");
/* Now try to figure out if we are running on LPAR */
of_scan_flat_dt(pSeries_probe_hypertas, NULL);
@ -393,8 +386,8 @@ static int __init pSeries_probe(void)
else
hpte_init_native();
DBG("Machine is%s LPAR !\n",
(powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
pr_debug("Machine is%s LPAR !\n",
(powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
return 1;
}

11
arch/powerpc/platforms/pseries/smp.c
View File

@ -12,7 +12,6 @@
* 2 of the License, or (at your option) any later version.
*/
#undef DEBUG
#include <linux/kernel.h>
#include <linux/module.h>
@ -51,12 +50,6 @@
#include "plpar_wrappers.h"
#include "pseries.h"
#ifdef DEBUG
#include <asm/udbg.h>
#define DBG(fmt...) udbg_printf(fmt)
#else
#define DBG(fmt...)
#endif
/*
* The primary thread of each non-boot processor is recorded here before
@ -231,7 +224,7 @@ static void __init smp_init_pseries(void)
{
int i;
DBG(" -> smp_init_pSeries()\n");
pr_debug(" -> smp_init_pSeries()\n");
/* Mark threads which are still spinning in hold loops. */
if (cpu_has_feature(CPU_FTR_SMT)) {
@ -255,7 +248,7 @@ static void __init smp_init_pseries(void)
smp_ops->take_timebase = pSeries_take_timebase;
}
DBG(" <- smp_init_pSeries()\n");
pr_debug(" <- smp_init_pSeries()\n");
}
#ifdef CONFIG_MPIC

1
arch/powerpc/platforms/pseries/xics.c
View File

@ -9,7 +9,6 @@
* 2 of the License, or (at your option) any later version.
*/
#undef DEBUG
#include <linux/types.h>
#include <linux/threads.h>

52
arch/powerpc/sysdev/mv64x60_dev.c
View File

@ -338,15 +338,13 @@ static int __init mv64x60_i2c_device_setup(struct device_node *np, int id)
pdata.freq_m = 8; /* default */
prop = of_get_property(np, "freq_m", NULL);
if (!prop)
return -ENODEV;
pdata.freq_m = *prop;
if (prop)
pdata.freq_m = *prop;
pdata.freq_m = 3; /* default */
prop = of_get_property(np, "freq_n", NULL);
if (!prop)
return -ENODEV;
pdata.freq_n = *prop;
if (prop)
pdata.freq_n = *prop;
pdata.timeout = 1000; /* default: 1 second */
@ -433,9 +431,13 @@ static int __init mv64x60_device_setup(void)
int err;
id = 0;
for_each_compatible_node(np, "serial", "marvell,mv64360-mpsc")
if ((err = mv64x60_mpsc_device_setup(np, id++)))
goto error;
for_each_compatible_node(np, "serial", "marvell,mv64360-mpsc") {
err = mv64x60_mpsc_device_setup(np, id++);
if (err)
printk(KERN_ERR "Failed to initialize MV64x60 "
"serial device %s: error %d.\n",
np->full_name, err);
}
id = 0;
id2 = 0;
@ -443,38 +445,44 @@ static int __init mv64x60_device_setup(void)
pdev = mv64x60_eth_register_shared_pdev(np, id++);
if (IS_ERR(pdev)) {
err = PTR_ERR(pdev);
goto error;
printk(KERN_ERR "Failed to initialize MV64x60 "
"network block %s: error %d.\n",
np->full_name, err);
continue;
}
for_each_child_of_node(np, np2) {
if (!of_device_is_compatible(np2,
"marvell,mv64360-eth"))
continue;
err = mv64x60_eth_device_setup(np2, id2++, pdev);
if (err) {
of_node_put(np2);
goto error;
}
if (err)
printk(KERN_ERR "Failed to initialize "
"MV64x60 network device %s: "
"error %d.\n",
np2->full_name, err);
}
}
id = 0;
for_each_compatible_node(np, "i2c", "marvell,mv64360-i2c")
if ((err = mv64x60_i2c_device_setup(np, id++)))
goto error;
for_each_compatible_node(np, "i2c", "marvell,mv64360-i2c") {
err = mv64x60_i2c_device_setup(np, id++);
if (err)
printk(KERN_ERR "Failed to initialize MV64x60 I2C "
"bus %s: error %d.\n",
np->full_name, err);
}
/* support up to one watchdog timer */
np = of_find_compatible_node(np, NULL, "marvell,mv64360-wdt");
if (np) {
if ((err = mv64x60_wdt_device_setup(np, id)))
goto error;
printk(KERN_ERR "Failed to initialize MV64x60 "
"Watchdog %s: error %d.\n",
np->full_name, err);
of_node_put(np);
}
return 0;
error:
of_node_put(np);
return err;
}
arch_initcall(mv64x60_device_setup);

2
arch/powerpc/sysdev/mv64x60_udbg.c
View File

@ -94,7 +94,7 @@ static void mv64x60_udbg_init(void)
if (!np)
return;
block_index = of_get_property(np, "block-index", NULL);
block_index = of_get_property(np, "cell-index", NULL);
if (!block_index)
goto error;

19
arch/ppc/8260_io/fcc_enet.c
View File

@ -165,9 +165,6 @@ static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
#ifdef CONFIG_SBC82xx
#define F1_RXCLK 9
#define F1_TXCLK 10
#elif defined(CONFIG_ADS8272)
#define F1_RXCLK 11
#define F1_TXCLK 10
#else
#define F1_RXCLK 12
#define F1_TXCLK 11
@ -175,13 +172,8 @@ static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
/* FCC2 Clock Source Configuration. There are board specific.
Can only choose from CLK13-16 */
#ifdef CONFIG_ADS8272
#define F2_RXCLK 15
#define F2_TXCLK 16
#else
#define F2_RXCLK 13
#define F2_TXCLK 14
#endif
/* FCC3 Clock Source Configuration. There are board specific.
Can only choose from CLK13-16 */
@ -289,10 +281,7 @@ static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
/* TQM8260 has MDIO and MDCK on PC30 and PC31 respectively */
#define PC_MDIO ((uint)0x00000002)
#define PC_MDCK ((uint)0x00000001)
#elif defined(CONFIG_ADS8272)
#define PC_MDIO ((uint)0x00002000)
#define PC_MDCK ((uint)0x00001000)
#elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260) || defined(CONFIG_PQ2FADS)
#elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260)
#define PC_MDIO ((uint)0x00400000)
#define PC_MDCK ((uint)0x00200000)
#else
@ -2118,11 +2107,6 @@ init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
printk("Can't get FCC IRQ %d\n", fip->fc_interrupt);
#ifdef PHY_INTERRUPT
#ifdef CONFIG_ADS8272
if (request_irq(PHY_INTERRUPT, mii_link_interrupt, IRQF_SHARED,
"mii", dev) < 0)
printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
#else
/* Make IRQn edge triggered. This does not work if PHY_INTERRUPT is
* on Port C.
*/
@ -2132,7 +2116,6 @@ init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0,
"mii", dev) < 0)
printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
#endif
#endif /* PHY_INTERRUPT */
/* Set GFMR to enable Ethernet operating mode.

23
arch/ppc/8xx_io/enet.c
View File

@ -946,29 +946,6 @@ static int __init scc_enet_init(void)
*((volatile uint *)BCSR1) &= ~BCSR1_ETHEN;
#endif
#ifdef CONFIG_MPC885ADS
/* Deassert PHY reset and enable the PHY.
*/
{
volatile uint __iomem *bcsr = ioremap(BCSR_ADDR, BCSR_SIZE);
uint tmp;
tmp = in_be32(bcsr + 1 /* BCSR1 */);
tmp |= BCSR1_ETHEN;
out_be32(bcsr + 1, tmp);
tmp = in_be32(bcsr + 4 /* BCSR4 */);
tmp |= BCSR4_ETH10_RST;
out_be32(bcsr + 4, tmp);
iounmap(bcsr);
}
/* On MPC885ADS SCC ethernet PHY defaults to the full duplex mode
* upon reset. SCC is set to half duplex by default. So this
* inconsistency should be better fixed by the software.
*/
#endif
dev->base_addr = (unsigned long)ep;
#if 0
dev->name = "CPM_ENET";

82
arch/ppc/Kconfig
View File

@ -372,22 +372,6 @@ config MPC8XXFADS
bool "FADS"
select FADS
config MPC86XADS
bool "MPC86XADS"
help
MPC86x Application Development System by Freescale Semiconductor.
The MPC86xADS is meant to serve as a platform for s/w and h/w
development around the MPC86X processor families.
select FADS
config MPC885ADS
bool "MPC885ADS"
help
Freescale Semiconductor MPC885 Application Development System (ADS).
Also known as DUET.
The MPC885ADS is meant to serve as a platform for s/w and h/w
development around the MPC885 processor family.
config TQM823L
bool "TQM823L"
help
@ -479,53 +463,6 @@ config WINCEPT
endchoice
menu "Freescale Ethernet driver platform-specific options"
depends on FS_ENET
config MPC8xx_SECOND_ETH
bool "Second Ethernet channel"
depends on (MPC885ADS || MPC86XADS)
default y
help
This enables support for second Ethernet on MPC885ADS and MPC86xADS boards.
The latter will use SCC1, for 885ADS you can select it below.
choice
prompt "Second Ethernet channel"
depends on MPC8xx_SECOND_ETH
default MPC8xx_SECOND_ETH_FEC2
config MPC8xx_SECOND_ETH_FEC2
bool "FEC2"
depends on MPC885ADS
help
Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2
(often 2-nd UART) will not work if this is enabled.
config MPC8xx_SECOND_ETH_SCC1
bool "SCC1"
depends on MPC86XADS
select MPC8xx_SCC_ENET_FIXED
help
Enable SCC1 to serve as 2-nd Ethernet channel. Note that SMC1
(often 1-nd UART) will not work if this is enabled.
config MPC8xx_SECOND_ETH_SCC3
bool "SCC3"
depends on MPC885ADS
help
Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1
(often 1-nd UART) will not work if this is enabled.
endchoice
config MPC8xx_SCC_ENET_FIXED
depends on MPC8xx_SECOND_ETH_SCC
default n
bool "Use fixed MII-less mode for SCC Ethernet"
endmenu
choice
prompt "Machine Type"
depends on 6xx
@ -666,9 +603,6 @@ config TQM8260
End of Life: not yet :-)
URL: <http://www.denx.de/PDF/TQM82xx_SPEC_Rev005.pdf>
config ADS8272
bool "ADS8272"
config PQ2FADS
bool "Freescale-PQ2FADS"
help
@ -698,11 +632,6 @@ config EV64360
platform.
endchoice
config PQ2ADS
bool
depends on ADS8272
default y
config TQM8xxL
bool
depends on 8xx && (TQM823L || TQM850L || FPS850L || TQM855L || TQM860L)
@ -725,15 +654,6 @@ config 8260
this option means that you wish to build a kernel for a machine with
an 8260 class CPU.
config 8272
bool
depends on 6xx
default y if ADS8272
select 8260
help
The MPC8272 CPM has a different internal dpram setup than other CPM2
devices
config CPM1
bool
depends on 8xx
@ -1069,7 +989,7 @@ config PCI_8260
config 8260_PCI9
bool "Enable workaround for MPC826x erratum PCI 9"
depends on PCI_8260 && !ADS8272
depends on PCI_8260
default y
choice

930
arch/ppc/configs/ads8272_defconfig
View File

@ -1,930 +0,0 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.21-rc5
# Wed Apr 4 20:55:16 2007
#
CONFIG_MMU=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_ARCH_HAS_ILOG2_U32=y
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_GENERIC_NVRAM=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_GENERIC_BUG=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
# CONFIG_EPOLL is not set
CONFIG_SHMEM=y
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
#
# Loadable module support
#
# CONFIG_MODULES is not set
#
# Block layer
#
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
#
# Processor
#
CONFIG_6xx=y
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_8xx is not set
# CONFIG_E200 is not set
# CONFIG_E500 is not set
CONFIG_PPC_FPU=y
# CONFIG_PPC_DCR_NATIVE is not set
# CONFIG_KEXEC is not set
# CONFIG_CPU_FREQ is not set
# CONFIG_WANT_EARLY_SERIAL is not set
CONFIG_EMBEDDEDBOOT=y
CONFIG_PPC_STD_MMU=y
#
# Platform options
#
#
# Freescale Ethernet driver platform-specific options
#
# CONFIG_PPC_PREP is not set
# CONFIG_APUS is not set
# CONFIG_KATANA is not set
# CONFIG_WILLOW is not set
# CONFIG_CPCI690 is not set
# CONFIG_POWERPMC250 is not set
# CONFIG_CHESTNUT is not set
# CONFIG_SPRUCE is not set
# CONFIG_HDPU is not set
# CONFIG_EV64260 is not set
# CONFIG_LOPEC is not set
# CONFIG_MVME5100 is not set
# CONFIG_PPLUS is not set
# CONFIG_PRPMC750 is not set
# CONFIG_PRPMC800 is not set
# CONFIG_SANDPOINT is not set
# CONFIG_RADSTONE_PPC7D is not set
# CONFIG_PAL4 is not set
# CONFIG_EST8260 is not set
# CONFIG_SBC82xx is not set
# CONFIG_SBS8260 is not set
# CONFIG_RPX8260 is not set
# CONFIG_TQM8260 is not set
CONFIG_ADS8272=y
# CONFIG_PQ2FADS is not set
# CONFIG_LITE5200 is not set
# CONFIG_MPC834x_SYS is not set
# CONFIG_EV64360 is not set
CONFIG_PQ2ADS=y
CONFIG_8260=y
CONFIG_8272=y
CONFIG_CPM2=y
# CONFIG_PC_KEYBOARD is not set
# CONFIG_SMP is not set
# CONFIG_HIGHMEM is not set
CONFIG_ARCH_POPULATES_NODE_MAP=y
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_CMDLINE_BOOL is not set
# CONFIG_PM is not set
CONFIG_SECCOMP=y
CONFIG_ISA_DMA_API=y
#
# Bus options
#
CONFIG_ZONE_DMA=y
# CONFIG_PPC_I8259 is not set
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_8260=y
#
# PCCARD (PCMCIA/CardBus) support
#
#
# Advanced setup
#
# CONFIG_ADVANCED_OPTIONS is not set
#
# Default settings for advanced configuration options are used
#
CONFIG_HIGHMEM_START=0xfe000000
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000
CONFIG_BOOT_LOAD=0x00400000
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
CONFIG_SYN_COOKIES=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=32768
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_NETLINK is not set
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
#
# CONFIG_ATA is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Macintosh device drivers
#
# CONFIG_MAC_EMUMOUSEBTN is not set
# CONFIG_WINDFARM is not set
#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
#
# PHY device support
#
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
# CONFIG_MARVELL_PHY is not set
CONFIG_DAVICOM_PHY=y
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_FIXED_PHY is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
# CONFIG_NET_PCI is not set
CONFIG_FS_ENET=y
# CONFIG_FS_ENET_HAS_SCC is not set
CONFIG_FS_ENET_HAS_FCC=y
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
# CONFIG_QLA3XXX is not set
# CONFIG_ATL1 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_CHELSIO_T1 is not set
# CONFIG_CHELSIO_T3 is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
# CONFIG_NETXEN_NIC is not set
#
# Token Ring devices
#
# CONFIG_TR is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_CPM=y
CONFIG_SERIAL_CPM_CONSOLE=y
CONFIG_SERIAL_CPM_SCC1=y
# CONFIG_SERIAL_CPM_SCC2 is not set
# CONFIG_SERIAL_CPM_SCC3 is not set
CONFIG_SERIAL_CPM_SCC4=y
# CONFIG_SERIAL_CPM_SMC1 is not set
# CONFIG_SERIAL_CPM_SMC2 is not set
# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
CONFIG_HW_RANDOM=y
# CONFIG_NVRAM is not set
CONFIG_GEN_RTC=y
# CONFIG_GEN_RTC_X is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
#
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_FB is not set
# CONFIG_FB_IBM_GXT4500 is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# HID Devices
#
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
#
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# InfiniBand support
#
# CONFIG_INFINIBAND is not set
#
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
#
#
# Real Time Clock
#
# CONFIG_RTC_CLASS is not set
#
# DMA Engine support
#
# CONFIG_DMA_ENGINE is not set
#
# DMA Clients
#
#
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
# CONFIG_EXT4DEV_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
# CONFIG_MSDOS_PARTITION is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Distributed Lock Manager
#
# CONFIG_DLM is not set
# CONFIG_SCC_ENET is not set
# CONFIG_FEC_ENET is not set
#
# CPM2 Options
#
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_KGDB_CONSOLE is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_MANAGER=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=y
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_CAMELLIA is not set
#
# Hardware crypto devices
#

633
arch/ppc/configs/mpc86x_ads_defconfig
View File

@ -1,633 +0,0 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.12-rc4
# Tue Jun 14 13:36:35 2005
#
CONFIG_MMU=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_GENERIC_NVRAM=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
# CONFIG_CLEAN_COMPILE is not set
CONFIG_BROKEN=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
# CONFIG_HOTPLUG is not set
CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
# CONFIG_BASE_FULL is not set
CONFIG_FUTEX=y
# CONFIG_EPOLL is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
# CONFIG_SHMEM is not set
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
CONFIG_TINY_SHMEM=y
CONFIG_BASE_SMALL=1
#
# Loadable module support
#
CONFIG_MODULES=y
# CONFIG_MODULE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set
#
# Processor
#
# CONFIG_6xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_E500 is not set
# CONFIG_MATH_EMULATION is not set
# CONFIG_CPU_FREQ is not set
CONFIG_EMBEDDEDBOOT=y
# CONFIG_PM is not set
CONFIG_NOT_COHERENT_CACHE=y
#
# Platform options
#
CONFIG_FADS=y
# CONFIG_RPXLITE is not set
# CONFIG_RPXCLASSIC is not set
# CONFIG_BSEIP is not set
# CONFIG_MPC8XXFADS is not set
CONFIG_MPC86XADS=y
# CONFIG_TQM823L is not set
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_SPD823TS is not set
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
# CONFIG_HERMES_PRO is not set
# CONFIG_IP860 is not set
# CONFIG_LWMON is not set
# CONFIG_PCU_E is not set
# CONFIG_CCM is not set
# CONFIG_LANTEC is not set
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_HIGHMEM is not set
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_CMDLINE_BOOL is not set
CONFIG_ISA_DMA_API=y
#
# Bus options
#
# CONFIG_PCI is not set
# CONFIG_PCI_DOMAINS is not set
# CONFIG_PCI_QSPAN is not set
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# Advanced setup
#
# CONFIG_ADVANCED_OPTIONS is not set
#
# Default settings for advanced configuration options are used
#
CONFIG_HIGHMEM_START=0xfe000000
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000
CONFIG_CONSISTENT_START=0xff100000
CONFIG_CONSISTENT_SIZE=0x00200000
CONFIG_BOOT_LOAD=0x00400000
#
# Device Drivers
#
#
# Generic Driver Options
#
# CONFIG_STANDALONE is not set
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_ATA_OVER_ETH is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
#
# Macintosh device drivers
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_IP_TCPDIAG=y
# CONFIG_IP_TCPDIAG_IPV6 is not set
CONFIG_IPV6=m
# CONFIG_IPV6_PRIVACY is not set
# CONFIG_INET6_AH is not set
# CONFIG_INET6_ESP is not set
# CONFIG_INET6_IPCOMP is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_NETFILTER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
# CONFIG_OAKNET is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
# CONFIG_INPUT is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_CPM=y
CONFIG_SERIAL_CPM_CONSOLE=y
# CONFIG_SERIAL_CPM_SCC1 is not set
# CONFIG_SERIAL_CPM_SCC2 is not set
# CONFIG_SERIAL_CPM_SCC3 is not set
# CONFIG_SERIAL_CPM_SCC4 is not set
CONFIG_SERIAL_CPM_SMC1=y
# CONFIG_SERIAL_CPM_SMC2 is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
#
# I2C support
#
# CONFIG_I2C is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Misc devices
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# InfiniBand support
#
# CONFIG_INFINIBAND is not set
#
# File systems
#
# CONFIG_EXT2_FS is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
#
# XFS support
#
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_SYSFS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
CONFIG_SCC1_ENET=y
# CONFIG_SCC2_ENET is not set
# CONFIG_SCC3_ENET is not set
# CONFIG_FEC_ENET is not set
# CONFIG_ENET_BIG_BUFFERS is not set
#
# Generic MPC8xx Options
#
# CONFIG_8xx_COPYBACK is not set
# CONFIG_8xx_CPU6 is not set
CONFIG_NO_UCODE_PATCH=y
# CONFIG_USB_SOF_UCODE_PATCH is not set
# CONFIG_I2C_SPI_UCODE_PATCH is not set
# CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
CONFIG_CRYPTO=y
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_TEST is not set
#
# Hardware crypto devices
#

622
arch/ppc/configs/mpc885ads_defconfig
View File

@ -1,622 +0,0 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.12-rc6
# Thu Jun 9 21:17:29 2005
#
CONFIG_MMU=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_GENERIC_NVRAM=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
# CONFIG_CLEAN_COMPILE is not set
CONFIG_BROKEN=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_HOTPLUG=y
CONFIG_KOBJECT_UEVENT=y
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
# CONFIG_KALLSYMS is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
# CONFIG_EPOLL is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SHMEM=y
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
#
# Loadable module support
#
# CONFIG_MODULES is not set
#
# Processor
#
# CONFIG_6xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
CONFIG_8xx=y
# CONFIG_E500 is not set
# CONFIG_MATH_EMULATION is not set
# CONFIG_CPU_FREQ is not set
CONFIG_EMBEDDEDBOOT=y
# CONFIG_PM is not set
CONFIG_NOT_COHERENT_CACHE=y
#
# Platform options
#
# CONFIG_RPXLITE is not set
# CONFIG_RPXCLASSIC is not set
# CONFIG_BSEIP is not set
# CONFIG_FADS is not set
CONFIG_MPC885ADS=y
# CONFIG_TQM823L is not set
# CONFIG_TQM850L is not set
# CONFIG_TQM855L is not set
# CONFIG_TQM860L is not set
# CONFIG_FPS850L is not set
# CONFIG_SPD823TS is not set
# CONFIG_IVMS8 is not set
# CONFIG_IVML24 is not set
# CONFIG_SM850 is not set
# CONFIG_HERMES_PRO is not set
# CONFIG_IP860 is not set
# CONFIG_LWMON is not set
# CONFIG_PCU_E is not set
# CONFIG_CCM is not set
# CONFIG_LANTEC is not set
# CONFIG_MBX is not set
# CONFIG_WINCEPT is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_HIGHMEM is not set
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_CMDLINE_BOOL is not set
CONFIG_ISA_DMA_API=y
#
# Bus options
#
# CONFIG_PCI is not set
# CONFIG_PCI_DOMAINS is not set
# CONFIG_PCI_QSPAN is not set
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# Advanced setup
#
# CONFIG_ADVANCED_OPTIONS is not set
#
# Default settings for advanced configuration options are used
#
CONFIG_HIGHMEM_START=0xfe000000
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000
CONFIG_CONSISTENT_START=0xff100000
CONFIG_CONSISTENT_SIZE=0x00200000
CONFIG_BOOT_LOAD=0x00400000
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_AS is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_ATA_OVER_ETH is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
#
# Macintosh device drivers
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_IP_TCPDIAG=y
# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_OAKNET is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
CONFIG_PPP=y
# CONFIG_PPP_MULTILINK is not set
# CONFIG_PPP_FILTER is not set
CONFIG_PPP_ASYNC=y
CONFIG_PPP_SYNC_TTY=y
CONFIG_PPP_DEFLATE=y
# CONFIG_PPP_BSDCOMP is not set
# CONFIG_PPPOE is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
# CONFIG_INPUT is not set
#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_CPM=y
CONFIG_SERIAL_CPM_CONSOLE=y
# CONFIG_SERIAL_CPM_SCC1 is not set
# CONFIG_SERIAL_CPM_SCC2 is not set
# CONFIG_SERIAL_CPM_SCC3 is not set
# CONFIG_SERIAL_CPM_SCC4 is not set
CONFIG_SERIAL_CPM_SMC1=y
CONFIG_SERIAL_CPM_SMC2=y
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
#
# I2C support
#
# CONFIG_I2C is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Misc devices
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# InfiniBand support
#
# CONFIG_INFINIBAND is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
# CONFIG_EXT2_FS_POSIX_ACL is not set
# CONFIG_EXT2_FS_SECURITY is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
#
# XFS support
#
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_PROC_KCORE is not set
CONFIG_SYSFS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVPTS_FS_XATTR is not set
# CONFIG_TMPFS is not set
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# MPC8xx CPM Options
#
CONFIG_SCC_ENET=y
# CONFIG_SCC1_ENET is not set
# CONFIG_SCC2_ENET is not set
CONFIG_SCC3_ENET=y
# CONFIG_FEC_ENET is not set
# CONFIG_ENET_BIG_BUFFERS is not set
#
# Generic MPC8xx Options
#
CONFIG_8xx_COPYBACK=y
CONFIG_8xx_CPU6=y
CONFIG_NO_UCODE_PATCH=y
# CONFIG_USB_SOF_UCODE_PATCH is not set
# CONFIG_I2C_SPI_UCODE_PATCH is not set
# CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set
#
# Library routines
#
CONFIG_CRC_CCITT=y
# CONFIG_CRC32 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Hardware crypto devices
#

1
arch/ppc/kernel/ppc_ksyms.c
View File

@ -88,6 +88,7 @@ EXPORT_SYMBOL(strncpy);
EXPORT_SYMBOL(strcat);
EXPORT_SYMBOL(strlen);
EXPORT_SYMBOL(strcmp);
EXPORT_SYMBOL(strncmp);
EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(csum_partial_copy_generic);

14
arch/ppc/lib/string.S
View File

@ -121,6 +121,20 @@ _GLOBAL(strcmp)
beq 1b
blr
_GLOBAL(strncmp)
PPC_LCMPI r5,0
beqlr
mtctr r5
addi r5,r3,-1
addi r4,r4,-1
1: lbzu r3,1(r5)
cmpwi 1,r3,0
lbzu r0,1(r4)
subf. r3,r0,r3
beqlr 1
bdnzt eq,1b
blr
_GLOBAL(strlen)
addi r4,r3,-1
1: lbzu r0,1(r4)

4
arch/ppc/platforms/Makefile
View File

@ -4,7 +4,6 @@
obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o
obj-$(CONFIG_PREP_RESIDUAL) += residual.o
obj-$(CONFIG_PQ2ADS) += pq2ads.o
obj-$(CONFIG_TQM8260) += tqm8260_setup.o
obj-$(CONFIG_CPCI690) += cpci690.o
obj-$(CONFIG_EV64260) += ev64260.o
@ -24,6 +23,3 @@ obj-$(CONFIG_SBC82xx) += sbc82xx.o
obj-$(CONFIG_SPRUCE) += spruce.o
obj-$(CONFIG_LITE5200) += lite5200.o
obj-$(CONFIG_EV64360) += ev64360.o
obj-$(CONFIG_MPC86XADS) += mpc866ads_setup.o
obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
obj-$(CONFIG_ADS8272) += mpc8272ads_setup.o

25
arch/ppc/platforms/fads.h
View File

@ -22,29 +22,6 @@
#include <asm/ppcboot.h>
#if defined(CONFIG_MPC86XADS)
#define BOARD_CHIP_NAME "MPC86X"
/* U-Boot maps BCSR to 0xff080000 */
#define BCSR_ADDR ((uint)0xff080000)
/* MPC86XADS has one more CPLD and an additional BCSR.
*/
#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)
#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300))
#define BCSR5_T1_RST 0x10
#define BCSR5_ATM155_RST 0x08
#define BCSR5_ATM25_RST 0x04
#define BCSR5_MII1_EN 0x02
#define BCSR5_MII1_RST 0x01
/* There is no PHY link change interrupt */
#define PHY_INTERRUPT (-1)
#else /* FADS */
/* Memory map is configured by the PROM startup.
* I tried to follow the FADS manual, although the startup PROM
* dictates this and we simply have to move some of the physical
@ -55,8 +32,6 @@
/* PHY link change interrupt */
#define PHY_INTERRUPT SIU_IRQ2
#endif /* CONFIG_MPC86XADS */
#define BCSR_SIZE ((uint)(64 * 1024))
#define BCSR0 ((uint)(BCSR_ADDR + 0x00))
#define BCSR1 ((uint)(BCSR_ADDR + 0x04))

367
arch/ppc/platforms/mpc8272ads_setup.c
View File

@ -1,367 +0,0 @@
/*
* arch/ppc/platforms/mpc8272ads_setup.c
*
* MPC82xx Board-specific PlatformDevice descriptions
*
* 2005 (c) MontaVista Software, Inc.
* Vitaly Bordug <vbordug@ru.mvista.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/ioport.h>
#include <linux/fs_enet_pd.h>
#include <linux/platform_device.h>
#include <linux/phy.h>
#include <asm/io.h>
#include <asm/mpc8260.h>
#include <asm/cpm2.h>
#include <asm/immap_cpm2.h>
#include <asm/irq.h>
#include <asm/ppc_sys.h>
#include <asm/ppcboot.h>
#include <linux/fs_uart_pd.h>
#include "pq2ads_pd.h"
static void init_fcc1_ioports(struct fs_platform_info*);
static void init_fcc2_ioports(struct fs_platform_info*);
static void init_scc1_uart_ioports(struct fs_uart_platform_info*);
static void init_scc4_uart_ioports(struct fs_uart_platform_info*);
static struct fs_uart_platform_info mpc8272_uart_pdata[] = {
[fsid_scc1_uart] = {
.init_ioports = init_scc1_uart_ioports,
.fs_no = fsid_scc1_uart,
.brg = 1,
.tx_num_fifo = 4,
.tx_buf_size = 32,
.rx_num_fifo = 4,
.rx_buf_size = 32,
},
[fsid_scc4_uart] = {
.init_ioports = init_scc4_uart_ioports,
.fs_no = fsid_scc4_uart,
.brg = 4,
.tx_num_fifo = 4,
.tx_buf_size = 32,
.rx_num_fifo = 4,
.rx_buf_size = 32,
},
};
static struct fs_mii_bb_platform_info m82xx_mii_bb_pdata = {
.mdio_dat.bit = 18,
.mdio_dir.bit = 18,
.mdc_dat.bit = 19,
.delay = 1,
};
static struct fs_platform_info mpc82xx_enet_pdata[] = {
[fsid_fcc1] = {
.fs_no = fsid_fcc1,
.cp_page = CPM_CR_FCC1_PAGE,
.cp_block = CPM_CR_FCC1_SBLOCK,
.clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
.clk_route = CMX1_CLK_ROUTE,
.clk_mask = CMX1_CLK_MASK,
.init_ioports = init_fcc1_ioports,
.mem_offset = FCC1_MEM_OFFSET,
.rx_ring = 32,
.tx_ring = 32,
.rx_copybreak = 240,
.use_napi = 0,
.napi_weight = 17,
.bus_id = "0:00",
},
[fsid_fcc2] = {
.fs_no = fsid_fcc2,
.cp_page = CPM_CR_FCC2_PAGE,
.cp_block = CPM_CR_FCC2_SBLOCK,
.clk_trx = (PC_F2RXCLK | PC_F2TXCLK),
.clk_route = CMX2_CLK_ROUTE,
.clk_mask = CMX2_CLK_MASK,
.init_ioports = init_fcc2_ioports,
.mem_offset = FCC2_MEM_OFFSET,
.rx_ring = 32,
.tx_ring = 32,
.rx_copybreak = 240,
.use_napi = 0,
.napi_weight = 17,
.bus_id = "0:03",
},
};
static void init_fcc1_ioports(struct fs_platform_info* pdata)
{
struct io_port *io;
u32 tempval;
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
io = &immap->im_ioport;
/* Enable the PHY */
clrbits32(bcsr, BCSR1_FETHIEN);
setbits32(bcsr, BCSR1_FETH_RST);
/* FCC1 pins are on port A/C. */
/* Configure port A and C pins for FCC1 Ethernet. */
tempval = in_be32(&io->iop_pdira);
tempval &= ~PA1_DIRA0;
tempval |= PA1_DIRA1;
out_be32(&io->iop_pdira, tempval);
tempval = in_be32(&io->iop_psora);
tempval &= ~PA1_PSORA0;
tempval |= PA1_PSORA1;
out_be32(&io->iop_psora, tempval);
setbits32(&io->iop_ppara,PA1_DIRA0 | PA1_DIRA1);
/* Alter clocks */
tempval = PC_F1TXCLK|PC_F1RXCLK;
clrbits32(&io->iop_psorc, tempval);
clrbits32(&io->iop_pdirc, tempval);
setbits32(&io->iop_pparc, tempval);
clrbits32(&immap->im_cpmux.cmx_fcr, CMX1_CLK_MASK);
setbits32(&immap->im_cpmux.cmx_fcr, CMX1_CLK_ROUTE);
iounmap(bcsr);
iounmap(immap);
}
static void init_fcc2_ioports(struct fs_platform_info* pdata)
{
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
u32 *bcsr = ioremap(BCSR_ADDR+12, sizeof(u32));
struct io_port *io;
u32 tempval;
immap = cpm2_immr;
io = &immap->im_ioport;
/* Enable the PHY */
clrbits32(bcsr, BCSR3_FETHIEN2);
setbits32(bcsr, BCSR3_FETH2_RST);
/* FCC2 are port B/C. */
/* Configure port A and C pins for FCC2 Ethernet. */
tempval = in_be32(&io->iop_pdirb);
tempval &= ~PB2_DIRB0;
tempval |= PB2_DIRB1;
out_be32(&io->iop_pdirb, tempval);
tempval = in_be32(&io->iop_psorb);
tempval &= ~PB2_PSORB0;
tempval |= PB2_PSORB1;
out_be32(&io->iop_psorb, tempval);
setbits32(&io->iop_pparb,PB2_DIRB0 | PB2_DIRB1);
tempval = PC_F2RXCLK|PC_F2TXCLK;
/* Alter clocks */
clrbits32(&io->iop_psorc,tempval);
clrbits32(&io->iop_pdirc,tempval);
setbits32(&io->iop_pparc,tempval);
clrbits32(&immap->im_cpmux.cmx_fcr, CMX2_CLK_MASK);
setbits32(&immap->im_cpmux.cmx_fcr, CMX2_CLK_ROUTE);
iounmap(bcsr);
iounmap(immap);
}
static void __init mpc8272ads_fixup_enet_pdata(struct platform_device *pdev,
int idx)
{
bd_t* bi = (void*)__res;
int fs_no = fsid_fcc1+pdev->id-1;
if(fs_no >= ARRAY_SIZE(mpc82xx_enet_pdata)) {
return;
}
mpc82xx_enet_pdata[fs_no].dpram_offset=
(u32)cpm2_immr->im_dprambase;
mpc82xx_enet_pdata[fs_no].fcc_regs_c =
(u32)cpm2_immr->im_fcc_c;
memcpy(&mpc82xx_enet_pdata[fs_no].macaddr,bi->bi_enetaddr,6);
/* prevent dup mac */
if(fs_no == fsid_fcc2)
mpc82xx_enet_pdata[fs_no].macaddr[5] ^= 1;
pdev->dev.platform_data = &mpc82xx_enet_pdata[fs_no];
}
static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev,
int idx)
{
bd_t *bd = (bd_t *) __res;
struct fs_uart_platform_info *pinfo;
int num = ARRAY_SIZE(mpc8272_uart_pdata);
int id = fs_uart_id_scc2fsid(idx);
/* no need to alter anything if console */
if ((id < num) && (!pdev->dev.platform_data)) {
pinfo = &mpc8272_uart_pdata[id];
pinfo->uart_clk = bd->bi_intfreq;
pdev->dev.platform_data = pinfo;
}
}
static void init_scc1_uart_ioports(struct fs_uart_platform_info* pdata)
{
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
/* SCC1 is only on port D */
setbits32(&immap->im_ioport.iop_ppard,0x00000003);
clrbits32(&immap->im_ioport.iop_psord,0x00000001);
setbits32(&immap->im_ioport.iop_psord,0x00000002);
clrbits32(&immap->im_ioport.iop_pdird,0x00000001);
setbits32(&immap->im_ioport.iop_pdird,0x00000002);
/* Wire BRG1 to SCC1 */
clrbits32(&immap->im_cpmux.cmx_scr,0x00ffffff);
iounmap(immap);
}
static void init_scc4_uart_ioports(struct fs_uart_platform_info* pdata)
{
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
setbits32(&immap->im_ioport.iop_ppard,0x00000600);
clrbits32(&immap->im_ioport.iop_psord,0x00000600);
clrbits32(&immap->im_ioport.iop_pdird,0x00000200);
setbits32(&immap->im_ioport.iop_pdird,0x00000400);
/* Wire BRG4 to SCC4 */
clrbits32(&immap->im_cpmux.cmx_scr,0x000000ff);
setbits32(&immap->im_cpmux.cmx_scr,0x0000001b);
iounmap(immap);
}
static void __init mpc8272ads_fixup_mdio_pdata(struct platform_device *pdev,
int idx)
{
m82xx_mii_bb_pdata.irq[0] = PHY_INTERRUPT;
m82xx_mii_bb_pdata.irq[1] = PHY_POLL;
m82xx_mii_bb_pdata.irq[2] = PHY_POLL;
m82xx_mii_bb_pdata.irq[3] = PHY_INTERRUPT;
m82xx_mii_bb_pdata.irq[31] = PHY_POLL;
m82xx_mii_bb_pdata.mdio_dat.offset =
(u32)&cpm2_immr->im_ioport.iop_pdatc;
m82xx_mii_bb_pdata.mdio_dir.offset =
(u32)&cpm2_immr->im_ioport.iop_pdirc;
m82xx_mii_bb_pdata.mdc_dat.offset =
(u32)&cpm2_immr->im_ioport.iop_pdatc;
pdev->dev.platform_data = &m82xx_mii_bb_pdata;
}
static int mpc8272ads_platform_notify(struct device *dev)
{
static const struct platform_notify_dev_map dev_map[] = {
{
.bus_id = "fsl-cpm-fcc",
.rtn = mpc8272ads_fixup_enet_pdata,
},
{
.bus_id = "fsl-cpm-scc:uart",
.rtn = mpc8272ads_fixup_uart_pdata,
},
{
.bus_id = "fsl-bb-mdio",
.rtn = mpc8272ads_fixup_mdio_pdata,
},
{
.bus_id = NULL
}
};
platform_notify_map(dev_map,dev);
return 0;
}
int __init mpc8272ads_init(void)
{
printk(KERN_NOTICE "mpc8272ads: Init\n");
platform_notify = mpc8272ads_platform_notify;
ppc_sys_device_initfunc();
ppc_sys_device_disable_all();
ppc_sys_device_enable(MPC82xx_CPM_FCC1);
ppc_sys_device_enable(MPC82xx_CPM_FCC2);
/* to be ready for console, let's attach pdata here */
#ifdef CONFIG_SERIAL_CPM_SCC1
ppc_sys_device_setfunc(MPC82xx_CPM_SCC1, PPC_SYS_FUNC_UART);
ppc_sys_device_enable(MPC82xx_CPM_SCC1);
#endif
#ifdef CONFIG_SERIAL_CPM_SCC4
ppc_sys_device_setfunc(MPC82xx_CPM_SCC4, PPC_SYS_FUNC_UART);
ppc_sys_device_enable(MPC82xx_CPM_SCC4);
#endif
ppc_sys_device_enable(MPC82xx_MDIO_BB);
return 0;
}
/*
To prevent confusion, console selection is gross:
by 0 assumed SCC1 and by 1 assumed SCC4
*/
struct platform_device* early_uart_get_pdev(int index)
{
bd_t *bd = (bd_t *) __res;
struct fs_uart_platform_info *pinfo;
struct platform_device* pdev = NULL;
if(index) { /*assume SCC4 here*/
pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
pinfo = &mpc8272_uart_pdata[fsid_scc4_uart];
} else { /*over SCC1*/
pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
pinfo = &mpc8272_uart_pdata[fsid_scc1_uart];
}
pinfo->uart_clk = bd->bi_intfreq;
pdev->dev.platform_data = pinfo;
ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
return NULL;
}
arch_initcall(mpc8272ads_init);

93
arch/ppc/platforms/mpc885ads.h
View File

@ -1,93 +0,0 @@
/*
* A collection of structures, addresses, and values associated with
* the Freescale MPC885ADS board.
* Copied from the FADS stuff.
*
* Author: MontaVista Software, Inc.
* source@mvista.com
*
* 2005 (c) MontaVista Software, Inc. This file is licensed under the
* terms of the GNU General Public License version 2. This program is licensed
* "as is" without any warranty of any kind, whether express or implied.
*/
#ifdef __KERNEL__
#ifndef __ASM_MPC885ADS_H__
#define __ASM_MPC885ADS_H__
#include <asm/ppcboot.h>
/* U-Boot maps BCSR to 0xff080000 */
#define BCSR_ADDR ((uint)0xff080000)
#define BCSR_SIZE ((uint)32)
#define BCSR0 ((uint)(BCSR_ADDR + 0x00))
#define BCSR1 ((uint)(BCSR_ADDR + 0x04))
#define BCSR2 ((uint)(BCSR_ADDR + 0x08))
#define BCSR3 ((uint)(BCSR_ADDR + 0x0c))
#define BCSR4 ((uint)(BCSR_ADDR + 0x10))
#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)
#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300))
#define IMAP_ADDR ((uint)0xff000000)
#define IMAP_SIZE ((uint)(64 * 1024))
#define PCMCIA_MEM_ADDR ((uint)0xff020000)
#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
/* Bits of interest in the BCSRs.
*/
#define BCSR1_ETHEN ((uint)0x20000000)
#define BCSR1_IRDAEN ((uint)0x10000000)
#define BCSR1_RS232EN_1 ((uint)0x01000000)
#define BCSR1_PCCEN ((uint)0x00800000)
#define BCSR1_PCCVCC0 ((uint)0x00400000)
#define BCSR1_PCCVPP0 ((uint)0x00200000)
#define BCSR1_PCCVPP1 ((uint)0x00100000)
#define BCSR1_PCCVPP_MASK (BCSR1_PCCVPP0 | BCSR1_PCCVPP1)
#define BCSR1_RS232EN_2 ((uint)0x00040000)
#define BCSR1_PCCVCC1 ((uint)0x00010000)
#define BCSR1_PCCVCC_MASK (BCSR1_PCCVCC0 | BCSR1_PCCVCC1)
#define BCSR4_ETH10_RST ((uint)0x80000000) /* 10Base-T PHY reset*/
#define BCSR4_USB_LO_SPD ((uint)0x04000000)
#define BCSR4_USB_VCC ((uint)0x02000000)
#define BCSR4_USB_FULL_SPD ((uint)0x00040000)
#define BCSR4_USB_EN ((uint)0x00020000)
#define BCSR5_MII2_EN 0x40
#define BCSR5_MII2_RST 0x20
#define BCSR5_T1_RST 0x10
#define BCSR5_ATM155_RST 0x08
#define BCSR5_ATM25_RST 0x04
#define BCSR5_MII1_EN 0x02
#define BCSR5_MII1_RST 0x01
/* Interrupt level assignments */
#define PHY_INTERRUPT SIU_IRQ7 /* PHY link change interrupt */
#define SIU_INT_FEC1 SIU_LEVEL1 /* FEC1 interrupt */
#define SIU_INT_FEC2 SIU_LEVEL3 /* FEC2 interrupt */
#define FEC_INTERRUPT SIU_INT_FEC1 /* FEC interrupt */
/* We don't use the 8259 */
#define NR_8259_INTS 0
/* CPM Ethernet through SCC3 */
#define PA_ENET_RXD ((ushort)0x0040)
#define PA_ENET_TXD ((ushort)0x0080)
#define PE_ENET_TCLK ((uint)0x00004000)
#define PE_ENET_RCLK ((uint)0x00008000)
#define PE_ENET_TENA ((uint)0x00000010)
#define PC_ENET_CLSN ((ushort)0x0400)
#define PC_ENET_RENA ((ushort)0x0800)
/* Control bits in the SICR to route TCLK (CLK5) and RCLK (CLK6) to
* SCC3. Also, make sure GR3 (bit 8) and SC3 (bit 9) are zero */
#define SICR_ENET_MASK ((uint)0x00ff0000)
#define SICR_ENET_CLKRT ((uint)0x002c0000)
#define BOARD_CHIP_NAME "MPC885"
#endif /* __ASM_MPC885ADS_H__ */
#endif /* __KERNEL__ */

476
arch/ppc/platforms/mpc885ads_setup.c
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@ -1,476 +0,0 @@
/*arch/ppc/platforms/mpc885ads_setup.c
*
* Platform setup for the Freescale mpc885ads board
*
* Vitaly Bordug <vbordug@ru.mvista.com>
*
* Copyright 2005 MontaVista Software Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/ioport.h>
#include <linux/device.h>
#include <linux/fs_enet_pd.h>
#include <linux/fs_uart_pd.h>
#include <linux/mii.h>
#include <asm/delay.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/page.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/time.h>
#include <asm/ppcboot.h>
#include <asm/8xx_immap.h>
#include <asm/cpm1.h>
#include <asm/ppc_sys.h>
extern unsigned char __res[];
static void setup_smc1_ioports(struct fs_uart_platform_info*);
static void setup_smc2_ioports(struct fs_uart_platform_info*);
static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata;
static void setup_fec1_ioports(struct fs_platform_info*);
static void setup_fec2_ioports(struct fs_platform_info*);
static void setup_scc3_ioports(struct fs_platform_info*);
static struct fs_uart_platform_info mpc885_uart_pdata[] = {
[fsid_smc1_uart] = {
.brg = 1,
.fs_no = fsid_smc1_uart,
.init_ioports = setup_smc1_ioports,
.tx_num_fifo = 4,
.tx_buf_size = 32,
.rx_num_fifo = 4,
.rx_buf_size = 32,
},
[fsid_smc2_uart] = {
.brg = 2,
.fs_no = fsid_smc2_uart,
.init_ioports = setup_smc2_ioports,
.tx_num_fifo = 4,
.tx_buf_size = 32,
.rx_num_fifo = 4,
.rx_buf_size = 32,
},
};
static struct fs_platform_info mpc8xx_enet_pdata[] = {
[fsid_fec1] = {
.rx_ring = 128,
.tx_ring = 16,
.rx_copybreak = 240,
.use_napi = 1,
.napi_weight = 17,
.init_ioports = setup_fec1_ioports,
.bus_id = "0:00",
.has_phy = 1,
},
[fsid_fec2] = {
.rx_ring = 128,
.tx_ring = 16,
.rx_copybreak = 240,
.use_napi = 1,
.napi_weight = 17,
.init_ioports = setup_fec2_ioports,
.bus_id = "0:01",
.has_phy = 1,
},
[fsid_scc3] = {
.rx_ring = 64,
.tx_ring = 8,
.rx_copybreak = 240,
.use_napi = 1,
.napi_weight = 17,
.init_ioports = setup_scc3_ioports,
#ifdef CONFIG_FIXED_MII_10_FDX
.bus_id = "fixed@100:1",
#else
.bus_id = "0:02",
#endif
},
};
void __init board_init(void)
{
cpm8xx_t *cp = cpmp;
unsigned int *bcsr_io;
#ifdef CONFIG_FS_ENET
immap_t *immap = (immap_t *) IMAP_ADDR;
#endif
bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
if (bcsr_io == NULL) {
printk(KERN_CRIT "Could not remap BCSR\n");
return;
}
#ifdef CONFIG_SERIAL_CPM_SMC1
cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
clrbits32(bcsr_io, BCSR1_RS232EN_1);
cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
#else
setbits32(bcsr_io,BCSR1_RS232EN_1);
cp->cp_smc[0].smc_smcmr = 0;
cp->cp_smc[0].smc_smce = 0;
#endif
#ifdef CONFIG_SERIAL_CPM_SMC2
cp->cp_simode &= ~(0xe0000000 >> 1);
cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
clrbits32(bcsr_io,BCSR1_RS232EN_2);
cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
#else
setbits32(bcsr_io,BCSR1_RS232EN_2);
cp->cp_smc[1].smc_smcmr = 0;
cp->cp_smc[1].smc_smce = 0;
#endif
iounmap(bcsr_io);
#ifdef CONFIG_FS_ENET
/* use MDC for MII (common) */
setbits16(&immap->im_ioport.iop_pdpar, 0x0080);
clrbits16(&immap->im_ioport.iop_pddir, 0x0080);
bcsr_io = ioremap(BCSR5, sizeof(unsigned long));
clrbits32(bcsr_io,BCSR5_MII1_EN);
clrbits32(bcsr_io,BCSR5_MII1_RST);
#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
clrbits32(bcsr_io,BCSR5_MII2_EN);
clrbits32(bcsr_io,BCSR5_MII2_RST);
#endif
iounmap(bcsr_io);
#endif
}
static void setup_fec1_ioports(struct fs_platform_info* pdata)
{
immap_t *immap = (immap_t *) IMAP_ADDR;
/* configure FEC1 pins */
setbits16(&immap->im_ioport.iop_papar, 0xf830);
setbits16(&immap->im_ioport.iop_padir, 0x0830);
clrbits16(&immap->im_ioport.iop_padir, 0xf000);
setbits32(&immap->im_cpm.cp_pbpar, 0x00001001);
clrbits32(&immap->im_cpm.cp_pbdir, 0x00001001);
setbits16(&immap->im_ioport.iop_pcpar, 0x000c);
clrbits16(&immap->im_ioport.iop_pcdir, 0x000c);
setbits32(&immap->im_cpm.cp_pepar, 0x00000003);
setbits32(&immap->im_cpm.cp_pedir, 0x00000003);
clrbits32(&immap->im_cpm.cp_peso, 0x00000003);
clrbits32(&immap->im_cpm.cp_cptr, 0x00000100);
}
static void setup_fec2_ioports(struct fs_platform_info* pdata)
{
immap_t *immap = (immap_t *) IMAP_ADDR;
/* configure FEC2 pins */
setbits32(&immap->im_cpm.cp_pepar, 0x0003fffc);
setbits32(&immap->im_cpm.cp_pedir, 0x0003fffc);
clrbits32(&immap->im_cpm.cp_peso, 0x000087fc);
setbits32(&immap->im_cpm.cp_peso, 0x00037800);
clrbits32(&immap->im_cpm.cp_cptr, 0x00000080);
}
static void setup_scc3_ioports(struct fs_platform_info* pdata)
{
immap_t *immap = (immap_t *) IMAP_ADDR;
unsigned *bcsr_io;
bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
if (bcsr_io == NULL) {
printk(KERN_CRIT "Could not remap BCSR\n");
return;
}
/* Enable the PHY.
*/
clrbits32(bcsr_io+4, BCSR4_ETH10_RST);
udelay(1000);
setbits32(bcsr_io+4, BCSR4_ETH10_RST);
/* Configure port A pins for Txd and Rxd.
*/
setbits16(&immap->im_ioport.iop_papar, PA_ENET_RXD | PA_ENET_TXD);
clrbits16(&immap->im_ioport.iop_padir, PA_ENET_RXD | PA_ENET_TXD);
/* Configure port C pins to enable CLSN and RENA.
*/
clrbits16(&immap->im_ioport.iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
clrbits16(&immap->im_ioport.iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
setbits16(&immap->im_ioport.iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
/* Configure port E for TCLK and RCLK.
*/
setbits32(&immap->im_cpm.cp_pepar, PE_ENET_TCLK | PE_ENET_RCLK);
clrbits32(&immap->im_cpm.cp_pepar, PE_ENET_TENA);
clrbits32(&immap->im_cpm.cp_pedir,
PE_ENET_TCLK | PE_ENET_RCLK | PE_ENET_TENA);
clrbits32(&immap->im_cpm.cp_peso, PE_ENET_TCLK | PE_ENET_RCLK);
setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA);
/* Configure Serial Interface clock routing.
* First, clear all SCC bits to zero, then set the ones we want.
*/
clrbits32(&immap->im_cpm.cp_sicr, SICR_ENET_MASK);
setbits32(&immap->im_cpm.cp_sicr, SICR_ENET_CLKRT);
/* Disable Rx and Tx. SMC1 sshould be stopped if SCC3 eternet are used.
*/
immap->im_cpm.cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
/* On the MPC885ADS SCC ethernet PHY is initialized in the full duplex mode
* by H/W setting after reset. SCC ethernet controller support only half duplex.
* This discrepancy of modes causes a lot of carrier lost errors.
*/
/* In the original SCC enet driver the following code is placed at
the end of the initialization */
setbits32(&immap->im_cpm.cp_pepar, PE_ENET_TENA);
clrbits32(&immap->im_cpm.cp_pedir, PE_ENET_TENA);
setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA);
setbits32(bcsr_io+4, BCSR1_ETHEN);
iounmap(bcsr_io);
}
static int mac_count = 0;
static void mpc885ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no)
{
struct fs_platform_info *fpi;
bd_t *bd = (bd_t *) __res;
char *e;
int i;
if(fs_no >= ARRAY_SIZE(mpc8xx_enet_pdata)) {
printk(KERN_ERR"No network-suitable #%d device on bus", fs_no);
return;
}
fpi = &mpc8xx_enet_pdata[fs_no];
switch (fs_no) {
case fsid_fec1:
fpi->init_ioports = &setup_fec1_ioports;
break;
case fsid_fec2:
fpi->init_ioports = &setup_fec2_ioports;
break;
case fsid_scc3:
fpi->init_ioports = &setup_scc3_ioports;
break;
default:
printk(KERN_WARNING "Device %s is not supported!\n", pdev->name);
return;
}
pdev->dev.platform_data = fpi;
fpi->fs_no = fs_no;
e = (unsigned char *)&bd->bi_enetaddr;
for (i = 0; i < 6; i++)
fpi->macaddr[i] = *e++;
fpi->macaddr[5] += mac_count++;
}
static void mpc885ads_fixup_fec_enet_pdata(struct platform_device *pdev,
int idx)
{
/* This is for FEC devices only */
if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec")))
return;
mpc885ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1);
}
static void __init mpc885ads_fixup_scc_enet_pdata(struct platform_device *pdev,
int idx)
{
/* This is for SCC devices only */
if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc")))
return;
mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
}
static void setup_smc1_ioports(struct fs_uart_platform_info* pdata)
{
immap_t *immap = (immap_t *) IMAP_ADDR;
unsigned *bcsr_io;
unsigned int iobits = 0x000000c0;
bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
if (bcsr_io == NULL) {
printk(KERN_CRIT "Could not remap BCSR1\n");
return;
}
clrbits32(bcsr_io,BCSR1_RS232EN_1);
iounmap(bcsr_io);
setbits32(&immap->im_cpm.cp_pbpar, iobits);
clrbits32(&immap->im_cpm.cp_pbdir, iobits);
clrbits16(&immap->im_cpm.cp_pbodr, iobits);
}
static void setup_smc2_ioports(struct fs_uart_platform_info* pdata)
{
immap_t *immap = (immap_t *) IMAP_ADDR;
unsigned *bcsr_io;
unsigned int iobits = 0x00000c00;
bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
if (bcsr_io == NULL) {
printk(KERN_CRIT "Could not remap BCSR1\n");
return;
}
clrbits32(bcsr_io,BCSR1_RS232EN_2);
iounmap(bcsr_io);
#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
setbits32(&immap->im_cpm.cp_pbpar, iobits);
clrbits32(&immap->im_cpm.cp_pbdir, iobits);
clrbits16(&immap->im_cpm.cp_pbodr, iobits);
#else
setbits16(&immap->im_ioport.iop_papar, iobits);
clrbits16(&immap->im_ioport.iop_padir, iobits);
clrbits16(&immap->im_ioport.iop_paodr, iobits);
#endif
}
static void __init mpc885ads_fixup_uart_pdata(struct platform_device *pdev,
int idx)
{
bd_t *bd = (bd_t *) __res;
struct fs_uart_platform_info *pinfo;
int num = ARRAY_SIZE(mpc885_uart_pdata);
int id = fs_uart_id_smc2fsid(idx);
/* no need to alter anything if console */
if ((id < num) && (!pdev->dev.platform_data)) {
pinfo = &mpc885_uart_pdata[id];
pinfo->uart_clk = bd->bi_intfreq;
pdev->dev.platform_data = pinfo;
}
}
static int mpc885ads_platform_notify(struct device *dev)
{
static const struct platform_notify_dev_map dev_map[] = {
{
.bus_id = "fsl-cpm-fec",
.rtn = mpc885ads_fixup_fec_enet_pdata,
},
{
.bus_id = "fsl-cpm-scc",
.rtn = mpc885ads_fixup_scc_enet_pdata,
},
{
.bus_id = "fsl-cpm-smc:uart",
.rtn = mpc885ads_fixup_uart_pdata
},
{
.bus_id = NULL
}
};
platform_notify_map(dev_map,dev);
return 0;
}
int __init mpc885ads_init(void)
{
struct fs_mii_fec_platform_info* fmpi;
bd_t *bd = (bd_t *) __res;
printk(KERN_NOTICE "mpc885ads: Init\n");
platform_notify = mpc885ads_platform_notify;
ppc_sys_device_initfunc();
ppc_sys_device_disable_all();
ppc_sys_device_enable(MPC8xx_CPM_FEC1);
ppc_sys_device_enable(MPC8xx_MDIO_FEC);
fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data =
&mpc8xx_mdio_fec_pdata;
fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1;
/* No PHY interrupt line here */
fmpi->irq[0xf] = SIU_IRQ7;
#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3
ppc_sys_device_enable(MPC8xx_CPM_SCC3);
#endif
#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
ppc_sys_device_enable(MPC8xx_CPM_FEC2);
#endif
#ifdef CONFIG_SERIAL_CPM_SMC1
ppc_sys_device_enable(MPC8xx_CPM_SMC1);
ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
#endif
#ifdef CONFIG_SERIAL_CPM_SMC2
ppc_sys_device_enable(MPC8xx_CPM_SMC2);
ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
#endif
return 0;
}
arch_initcall(mpc885ads_init);
/*
To prevent confusion, console selection is gross:
by 0 assumed SMC1 and by 1 assumed SMC2
*/
struct platform_device* early_uart_get_pdev(int index)
{
bd_t *bd = (bd_t *) __res;
struct fs_uart_platform_info *pinfo;
struct platform_device* pdev = NULL;
if(index) { /*assume SMC2 here*/
pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
pinfo = &mpc885_uart_pdata[1];
} else { /*over SMC1*/
pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
pinfo = &mpc885_uart_pdata[0];
}
pinfo->uart_clk = bd->bi_intfreq;
pdev->dev.platform_data = pinfo;
ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
return NULL;
}

53
arch/ppc/platforms/pq2ads.c
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@ -1,53 +0,0 @@
/*
* PQ2ADS platform support
*
* Author: Kumar Gala <galak@kernel.crashing.org>
* Derived from: est8260_setup.c by Allen Curtis
*
* Copyright 2004 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/init.h>
#include <asm/io.h>
#include <asm/mpc8260.h>
#include <asm/cpm2.h>
#include <asm/immap_cpm2.h>
void __init
m82xx_board_setup(void)
{
cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
/* Enable the 2nd UART port */
clrbits32(bcsr, BCSR1_RS232_EN2);
#ifdef CONFIG_SERIAL_CPM_SCC1
clrbits32((u32*)&immap->im_scc[0].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
clrbits32((u32*)&immap->im_scc[0].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#endif
#ifdef CONFIG_SERIAL_CPM_SCC2
clrbits32((u32*)&immap->im_scc[1].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
clrbits32((u32*)&immap->im_scc[1].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#endif
#ifdef CONFIG_SERIAL_CPM_SCC3
clrbits32((u32*)&immap->im_scc[2].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
clrbits32((u32*)&immap->im_scc[2].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#endif
#ifdef CONFIG_SERIAL_CPM_SCC4
clrbits32((u32*)&immap->im_scc[3].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
clrbits32((u32*)&immap->im_scc[3].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
#endif
iounmap(bcsr);
iounmap(immap);
}

94
arch/ppc/platforms/pq2ads.h
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@ -1,94 +0,0 @@
/*
* A collection of structures, addresses, and values associated with
* the Motorola MPC8260ADS/MPC8266ADS-PCI boards.
* Copied from the RPX-Classic and SBS8260 stuff.
*
* Copyright (c) 2001 Dan Malek (dan@mvista.com)
*/
#ifdef __KERNEL__
#ifndef __MACH_ADS8260_DEFS
#define __MACH_ADS8260_DEFS
#include <asm/ppcboot.h>
#if defined(CONFIG_ADS8272)
#define BOARD_CHIP_NAME "8272"
#endif
/* Memory map is configured by the PROM startup.
* We just map a few things we need. The CSR is actually 4 byte-wide
* registers that can be accessed as 8-, 16-, or 32-bit values.
*/
#define CPM_MAP_ADDR ((uint)0xf0000000)
#define BCSR_ADDR ((uint)0xf4500000)
#define BCSR_SIZE ((uint)(32 * 1024))
#define BOOTROM_RESTART_ADDR ((uint)0xff000104)
/* For our show_cpuinfo hooks. */
#define CPUINFO_VENDOR "Motorola"
#define CPUINFO_MACHINE "PQ2 ADS PowerPC"
/* The ADS8260 has 16, 32-bit wide control/status registers, accessed
* only on word boundaries.
* Not all are used (yet), or are interesting to us (yet).
*/
/* Things of interest in the CSR.
*/
#define BCSR0_LED0 ((uint)0x02000000) /* 0 == on */
#define BCSR0_LED1 ((uint)0x01000000) /* 0 == on */
#define BCSR1_FETHIEN ((uint)0x08000000) /* 0 == enable */
#define BCSR1_FETH_RST ((uint)0x04000000) /* 0 == reset */
#define BCSR1_RS232_EN1 ((uint)0x02000000) /* 0 == enable */
#define BCSR1_RS232_EN2 ((uint)0x01000000) /* 0 == enable */
#define BCSR3_FETHIEN2 ((uint)0x10000000) /* 0 == enable */
#define BCSR3_FETH2_RST ((uint)0x80000000) /* 0 == reset */
#define PHY_INTERRUPT SIU_INT_IRQ7
#ifdef CONFIG_PCI
/* PCI interrupt controller */
#define PCI_INT_STAT_REG 0xF8200000
#define PCI_INT_MASK_REG 0xF8200004
#define PIRQA (NR_CPM_INTS + 0)
#define PIRQB (NR_CPM_INTS + 1)
#define PIRQC (NR_CPM_INTS + 2)
#define PIRQD (NR_CPM_INTS + 3)
/*
* PCI memory map definitions for MPC8266ADS-PCI.
*
* processor view
* local address PCI address target
* 0x80000000-0x9FFFFFFF 0x80000000-0x9FFFFFFF PCI mem with prefetch
* 0xA0000000-0xBFFFFFFF 0xA0000000-0xBFFFFFFF PCI mem w/o prefetch
* 0xF4000000-0xF7FFFFFF 0x00000000-0x03FFFFFF PCI IO
*
* PCI master view
* local address PCI address target
* 0x00000000-0x1FFFFFFF 0x00000000-0x1FFFFFFF MPC8266 local memory
*/
/* All the other PCI memory map definitions reside at syslib/m82xx_pci.h
Here we should redefine what is unique for this board */
#define M82xx_PCI_SLAVE_MEM_LOCAL 0x00000000 /* Local base */
#define M82xx_PCI_SLAVE_MEM_BUS 0x00000000 /* PCI base */
#define M82xx_PCI_SLAVE_MEM_SIZE 0x10000000 /* 256 Mb */
#define M82xx_PCI_SLAVE_SEC_WND_SIZE ~(0x40000000 - 1U) /* 2 x 512Mb */
#define M82xx_PCI_SLAVE_SEC_WND_BASE 0x80000000 /* PCI Memory base */
#if defined(CONFIG_ADS8272)
#define PCI_INT_TO_SIU SIU_INT_IRQ2
#elif defined(CONFIG_PQ2FADS)
#define PCI_INT_TO_SIU SIU_INT_IRQ6
#else
#warning PCI Bridge will be without interrupts support
#endif
#endif /* CONFIG_PCI */
#endif /* __MACH_ADS8260_DEFS */
#endif /* __KERNEL__ */

32
arch/ppc/platforms/pq2ads_pd.h
View File

@ -1,32 +0,0 @@
#ifndef __PQ2ADS_PD_H
#define __PQ2ADS_PD_H
/*
* arch/ppc/platforms/82xx/pq2ads_pd.h
*
* Some defines for MPC82xx board-specific PlatformDevice descriptions
*
* 2005 (c) MontaVista Software, Inc.
* Vitaly Bordug <vbordug@ru.mvista.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/* FCC1 Clock Source Configuration. These can be redefined in the board specific file.
Can only choose from CLK9-12 */
#define F1_RXCLK 11
#define F1_TXCLK 10
/* FCC2 Clock Source Configuration. These can be redefined in the board specific file.
Can only choose from CLK13-16 */
#define F2_RXCLK 15
#define F2_TXCLK 16
/* FCC3 Clock Source Configuration. These can be redefined in the board specific file.
Can only choose from CLK13-16 */
#define F3_RXCLK 13
#define F3_TXCLK 14
#endif

6
arch/ppc/syslib/m8260_setup.c
View File

@ -175,12 +175,6 @@ m8260_init_IRQ(void)
* in case the boot rom changed something on us.
*/
cpm2_immr->im_intctl.ic_siprr = 0x05309770;
#if defined(CONFIG_PCI) && (defined(CONFIG_ADS8272) || defined(CONFIG_PQ2FADS))
/* Initialize stuff for the 82xx CPLD IC and install demux */
pq2pci_init_irq();
#endif
}
/*

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