Merge branch 'picoxcell/soc' into next/soc
This commit is contained in:
Arnd Bergmann
commit
b8df0ea26a
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@ -0,0 +1,24 @@
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Picochip picoXcell device tree bindings.
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||||
========================================
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|
||||
Required root node properties:
|
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- compatible:
|
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- "picochip,pc7302-pc3x3" : PC7302 development board with PC3X3 device.
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- "picochip,pc7302-pc3x2" : PC7302 development board with PC3X2 device.
|
||||
- "picochip,pc3x3" : picoXcell PC3X3 device based board.
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||||
- "picochip,pc3x2" : picoXcell PC3X2 device based board.
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||||
|
||||
Timers required properties:
|
||||
- compatible = "picochip,pc3x2-timer"
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||||
- interrupts : The single IRQ line for the timer.
|
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- clock-freq : The frequency in HZ of the timer.
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||||
- reg : The register bank for the timer.
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|
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Note: two timers are required - one for the scheduler clock and one for the
|
||||
event tick/NOHZ.
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||||
|
||||
VIC required properties:
|
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- compatible = "arm,pl192-vic".
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- interrupt-controller.
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- reg : The register bank for the device.
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- #interrupt-cells : Must be 1.
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@ -643,6 +643,24 @@ config ARCH_TEGRA
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This enables support for NVIDIA Tegra based systems (Tegra APX,
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Tegra 6xx and Tegra 2 series).
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config ARCH_PICOXCELL
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bool "Picochip picoXcell"
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select ARCH_REQUIRE_GPIOLIB
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select ARM_PATCH_PHYS_VIRT
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select ARM_VIC
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select CPU_V6K
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||||
select DW_APB_TIMER
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select GENERIC_CLOCKEVENTS
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select GENERIC_GPIO
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select HAVE_SCHED_CLOCK
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select HAVE_TCM
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select NO_IOPORT
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select USE_OF
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help
|
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This enables support for systems based on the Picochip picoXcell
|
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family of Femtocell devices. The picoxcell support requires device tree
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for all boards.
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config ARCH_PNX4008
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bool "Philips Nexperia PNX4008 Mobile"
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select CPU_ARM926T
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|
|
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@ -169,6 +169,7 @@ machine-$(CONFIG_ARCH_OMAP2) := omap2
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machine-$(CONFIG_ARCH_OMAP3) := omap2
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machine-$(CONFIG_ARCH_OMAP4) := omap2
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machine-$(CONFIG_ARCH_ORION5X) := orion5x
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machine-$(CONFIG_ARCH_PICOXCELL) := picoxcell
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machine-$(CONFIG_ARCH_PNX4008) := pnx4008
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machine-$(CONFIG_ARCH_PRIMA2) := prima2
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machine-$(CONFIG_ARCH_PXA) := pxa
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|
|
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@ -0,0 +1,249 @@
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/*
|
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* Copyright (C) 2011 Picochip, Jamie Iles
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*
|
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* This software is licensed under the terms of the GNU General Public
|
||||
* License version 2, as published by the Free Software Foundation, and
|
||||
* may be copied, distributed, and modified under those terms.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
/include/ "skeleton.dtsi"
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||||
/ {
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model = "Picochip picoXcell PC3X2";
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compatible = "picochip,pc3x2";
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#address-cells = <1>;
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#size-cells = <1>;
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||||
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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||||
|
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cpu@0 {
|
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compatible = "arm,1176jz-s";
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clock-frequency = <400000000>;
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reg = <0>;
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||||
d-cache-line-size = <32>;
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||||
d-cache-size = <32768>;
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i-cache-line-size = <32>;
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||||
i-cache-size = <32768>;
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||||
};
|
||||
};
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||||
|
||||
clocks {
|
||||
#address-cells = <1>;
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#size-cells = <1>;
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||||
ranges;
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||||
|
||||
pclk: clock@0 {
|
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compatible = "fixed-clock";
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clock-outputs = "bus", "pclk";
|
||||
clock-frequency = <200000000>;
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||||
ref-clock = <&ref_clk>, "ref";
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||||
};
|
||||
};
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|
||||
paxi {
|
||||
compatible = "simple-bus";
|
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#address-cells = <1>;
|
||||
#size-cells = <1>;
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||||
ranges = <0 0x80000000 0x400000>;
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|
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emac: gem@30000 {
|
||||
compatible = "cadence,gem";
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||||
reg = <0x30000 0x10000>;
|
||||
interrupts = <31>;
|
||||
};
|
||||
|
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dmac1: dmac@40000 {
|
||||
compatible = "snps,dw-dmac";
|
||||
reg = <0x40000 0x10000>;
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||||
interrupts = <25>;
|
||||
};
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||||
|
||||
dmac2: dmac@50000 {
|
||||
compatible = "snps,dw-dmac";
|
||||
reg = <0x50000 0x10000>;
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||||
interrupts = <26>;
|
||||
};
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||||
|
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vic0: interrupt-controller@60000 {
|
||||
compatible = "arm,pl192-vic";
|
||||
interrupt-controller;
|
||||
reg = <0x60000 0x1000>;
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||||
#interrupt-cells = <1>;
|
||||
};
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||||
|
||||
vic1: interrupt-controller@64000 {
|
||||
compatible = "arm,pl192-vic";
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||||
interrupt-controller;
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||||
reg = <0x64000 0x1000>;
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||||
#interrupt-cells = <1>;
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||||
};
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||||
|
||||
fuse: picoxcell-fuse@80000 {
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||||
compatible = "picoxcell,fuse-pc3x2";
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||||
reg = <0x80000 0x10000>;
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||||
};
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||||
|
||||
ssi: picoxcell-spi@90000 {
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||||
compatible = "picoxcell,spi";
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||||
reg = <0x90000 0x10000>;
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||||
interrupt-parent = <&vic0>;
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||||
interrupts = <10>;
|
||||
};
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||||
|
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ipsec: spacc@100000 {
|
||||
compatible = "picochip,spacc-ipsec";
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||||
reg = <0x100000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <24>;
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||||
ref-clock = <&pclk>, "ref";
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||||
};
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||||
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||||
srtp: spacc@140000 {
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||||
compatible = "picochip,spacc-srtp";
|
||||
reg = <0x140000 0x10000>;
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||||
interrupt-parent = <&vic0>;
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interrupts = <23>;
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||||
};
|
||||
|
||||
l2_engine: spacc@180000 {
|
||||
compatible = "picochip,spacc-l2";
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||||
reg = <0x180000 0x10000>;
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||||
interrupt-parent = <&vic0>;
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||||
interrupts = <22>;
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||||
ref-clock = <&pclk>, "ref";
|
||||
};
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
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||||
ranges = <0 0x200000 0x80000>;
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||||
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rtc0: rtc@00000 {
|
||||
compatible = "picochip,pc3x2-rtc";
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||||
clock-freq = <200000000>;
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||||
reg = <0x00000 0xf>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <8>;
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||||
};
|
||||
|
||||
timer0: timer@10000 {
|
||||
compatible = "picochip,pc3x2-timer";
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <4>;
|
||||
clock-freq = <200000000>;
|
||||
reg = <0x10000 0x14>;
|
||||
};
|
||||
|
||||
timer1: timer@10014 {
|
||||
compatible = "picochip,pc3x2-timer";
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <5>;
|
||||
clock-freq = <200000000>;
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||||
reg = <0x10014 0x14>;
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||||
};
|
||||
|
||||
timer2: timer@10028 {
|
||||
compatible = "picochip,pc3x2-timer";
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||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <6>;
|
||||
clock-freq = <200000000>;
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||||
reg = <0x10028 0x14>;
|
||||
};
|
||||
|
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timer3: timer@1003c {
|
||||
compatible = "picochip,pc3x2-timer";
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <7>;
|
||||
clock-freq = <200000000>;
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||||
reg = <0x1003c 0x14>;
|
||||
};
|
||||
|
||||
gpio: gpio@20000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0x20000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg-io-width = <4>;
|
||||
|
||||
banka: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-bank";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-generic,nr-gpio = <8>;
|
||||
|
||||
regoffset-dat = <0x50>;
|
||||
regoffset-set = <0x00>;
|
||||
regoffset-dirout = <0x04>;
|
||||
};
|
||||
|
||||
bankb: gpio-controller@1 {
|
||||
compatible = "snps,dw-apb-gpio-bank";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-generic,nr-gpio = <8>;
|
||||
|
||||
regoffset-dat = <0x54>;
|
||||
regoffset-set = <0x0c>;
|
||||
regoffset-dirout = <0x10>;
|
||||
};
|
||||
};
|
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|
||||
uart0: uart@30000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x30000 0x1000>;
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||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <10>;
|
||||
clock-frequency = <3686400>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
};
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||||
|
||||
uart1: uart@40000 {
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||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x40000 0x1000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <9>;
|
||||
clock-frequency = <3686400>;
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||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
wdog: watchdog@50000 {
|
||||
compatible = "snps,dw-apb-wdg";
|
||||
reg = <0x50000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <11>;
|
||||
bus-clock = <&pclk>, "bus";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rwid-axi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges;
|
||||
|
||||
ebi@50000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x40000000 0x08000000
|
||||
1 0 0x48000000 0x08000000
|
||||
2 0 0x50000000 0x08000000
|
||||
3 0 0x58000000 0x08000000>;
|
||||
};
|
||||
|
||||
axi2pico@c0000000 {
|
||||
compatible = "picochip,axi2pico-pc3x2";
|
||||
reg = <0xc0000000 0x10000>;
|
||||
interrupts = <13 14 15 16 17 18 19 20 21>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,365 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Picochip, Jamie Iles
|
||||
*
|
||||
* This software is licensed under the terms of the GNU General Public
|
||||
* License version 2, as published by the Free Software Foundation, and
|
||||
* may be copied, distributed, and modified under those terms.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
/include/ "skeleton.dtsi"
|
||||
/ {
|
||||
model = "Picochip picoXcell PC3X3";
|
||||
compatible = "picochip,pc3x3";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
compatible = "arm,1176jz-s";
|
||||
cpu-clock = <&arm_clk>, "cpu";
|
||||
reg = <0>;
|
||||
d-cache-line-size = <32>;
|
||||
d-cache-size = <32768>;
|
||||
i-cache-line-size = <32>;
|
||||
i-cache-size = <32768>;
|
||||
};
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
clkgate: clkgate@800a0048 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x800a0048 4>;
|
||||
compatible = "picochip,pc3x3-clk-gate";
|
||||
|
||||
tzprot_clk: clock@0 {
|
||||
compatible = "picochip,pc3x3-gated-clk";
|
||||
clock-outputs = "bus";
|
||||
picochip,clk-disable-bit = <0>;
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
|
||||
spi_clk: clock@1 {
|
||||
compatible = "picochip,pc3x3-gated-clk";
|
||||
clock-outputs = "bus";
|
||||
picochip,clk-disable-bit = <1>;
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
|
||||
dmac0_clk: clock@2 {
|
||||
compatible = "picochip,pc3x3-gated-clk";
|
||||
clock-outputs = "bus";
|
||||
picochip,clk-disable-bit = <2>;
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
|
||||
dmac1_clk: clock@3 {
|
||||
compatible = "picochip,pc3x3-gated-clk";
|
||||
clock-outputs = "bus";
|
||||
picochip,clk-disable-bit = <3>;
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
|
||||
ebi_clk: clock@4 {
|
||||
compatible = "picochip,pc3x3-gated-clk";
|
||||
clock-outputs = "bus";
|
||||
picochip,clk-disable-bit = <4>;
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
|
||||
ipsec_clk: clock@5 {
|
||||
compatible = "picochip,pc3x3-gated-clk";
|
||||
clock-outputs = "bus";
|
||||
picochip,clk-disable-bit = <5>;
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
|
||||
l2_clk: clock@6 {
|
||||
compatible = "picochip,pc3x3-gated-clk";
|
||||
clock-outputs = "bus";
|
||||
picochip,clk-disable-bit = <6>;
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
|
||||
trng_clk: clock@7 {
|
||||
compatible = "picochip,pc3x3-gated-clk";
|
||||
clock-outputs = "bus";
|
||||
picochip,clk-disable-bit = <7>;
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
|
||||
fuse_clk: clock@8 {
|
||||
compatible = "picochip,pc3x3-gated-clk";
|
||||
clock-outputs = "bus";
|
||||
picochip,clk-disable-bit = <8>;
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
|
||||
otp_clk: clock@9 {
|
||||
compatible = "picochip,pc3x3-gated-clk";
|
||||
clock-outputs = "bus";
|
||||
picochip,clk-disable-bit = <9>;
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
};
|
||||
|
||||
arm_clk: clock@11 {
|
||||
compatible = "picochip,pc3x3-pll";
|
||||
reg = <0x800a0050 0x8>;
|
||||
picochip,min-freq = <140000000>;
|
||||
picochip,max-freq = <700000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
clock-outputs = "cpu";
|
||||
};
|
||||
|
||||
pclk: clock@12 {
|
||||
compatible = "fixed-clock";
|
||||
clock-outputs = "bus", "pclk";
|
||||
clock-frequency = <200000000>;
|
||||
ref-clock = <&ref_clk>, "ref";
|
||||
};
|
||||
};
|
||||
|
||||
paxi {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x80000000 0x400000>;
|
||||
|
||||
emac: gem@30000 {
|
||||
compatible = "cadence,gem";
|
||||
reg = <0x30000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <31>;
|
||||
};
|
||||
|
||||
dmac1: dmac@40000 {
|
||||
compatible = "snps,dw-dmac";
|
||||
reg = <0x40000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <25>;
|
||||
};
|
||||
|
||||
dmac2: dmac@50000 {
|
||||
compatible = "snps,dw-dmac";
|
||||
reg = <0x50000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <26>;
|
||||
};
|
||||
|
||||
vic0: interrupt-controller@60000 {
|
||||
compatible = "arm,pl192-vic";
|
||||
interrupt-controller;
|
||||
reg = <0x60000 0x1000>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
vic1: interrupt-controller@64000 {
|
||||
compatible = "arm,pl192-vic";
|
||||
interrupt-controller;
|
||||
reg = <0x64000 0x1000>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
fuse: picoxcell-fuse@80000 {
|
||||
compatible = "picoxcell,fuse-pc3x3";
|
||||
reg = <0x80000 0x10000>;
|
||||
};
|
||||
|
||||
ssi: picoxcell-spi@90000 {
|
||||
compatible = "picoxcell,spi";
|
||||
reg = <0x90000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <10>;
|
||||
};
|
||||
|
||||
ipsec: spacc@100000 {
|
||||
compatible = "picochip,spacc-ipsec";
|
||||
reg = <0x100000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <24>;
|
||||
ref-clock = <&ipsec_clk>, "ref";
|
||||
};
|
||||
|
||||
srtp: spacc@140000 {
|
||||
compatible = "picochip,spacc-srtp";
|
||||
reg = <0x140000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <23>;
|
||||
};
|
||||
|
||||
l2_engine: spacc@180000 {
|
||||
compatible = "picochip,spacc-l2";
|
||||
reg = <0x180000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <22>;
|
||||
ref-clock = <&l2_clk>, "ref";
|
||||
};
|
||||
|
||||
apb {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x200000 0x80000>;
|
||||
|
||||
rtc0: rtc@00000 {
|
||||
compatible = "picochip,pc3x2-rtc";
|
||||
clock-freq = <200000000>;
|
||||
reg = <0x00000 0xf>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <8>;
|
||||
};
|
||||
|
||||
timer0: timer@10000 {
|
||||
compatible = "picochip,pc3x2-timer";
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <4>;
|
||||
clock-freq = <200000000>;
|
||||
reg = <0x10000 0x14>;
|
||||
};
|
||||
|
||||
timer1: timer@10014 {
|
||||
compatible = "picochip,pc3x2-timer";
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <5>;
|
||||
clock-freq = <200000000>;
|
||||
reg = <0x10014 0x14>;
|
||||
};
|
||||
|
||||
gpio: gpio@20000 {
|
||||
compatible = "snps,dw-apb-gpio";
|
||||
reg = <0x20000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg-io-width = <4>;
|
||||
|
||||
banka: gpio-controller@0 {
|
||||
compatible = "snps,dw-apb-gpio-bank";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-generic,nr-gpio = <8>;
|
||||
|
||||
regoffset-dat = <0x50>;
|
||||
regoffset-set = <0x00>;
|
||||
regoffset-dirout = <0x04>;
|
||||
};
|
||||
|
||||
bankb: gpio-controller@1 {
|
||||
compatible = "snps,dw-apb-gpio-bank";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-generic,nr-gpio = <16>;
|
||||
|
||||
regoffset-dat = <0x54>;
|
||||
regoffset-set = <0x0c>;
|
||||
regoffset-dirout = <0x10>;
|
||||
};
|
||||
|
||||
bankd: gpio-controller@2 {
|
||||
compatible = "snps,dw-apb-gpio-bank";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-generic,nr-gpio = <30>;
|
||||
|
||||
regoffset-dat = <0x5c>;
|
||||
regoffset-set = <0x24>;
|
||||
regoffset-dirout = <0x28>;
|
||||
};
|
||||
};
|
||||
|
||||
uart0: uart@30000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x30000 0x1000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <10>;
|
||||
clock-frequency = <3686400>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
uart1: uart@40000 {
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x40000 0x1000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <9>;
|
||||
clock-frequency = <3686400>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
};
|
||||
|
||||
wdog: watchdog@50000 {
|
||||
compatible = "snps,dw-apb-wdg";
|
||||
reg = <0x50000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <11>;
|
||||
bus-clock = <&pclk>, "bus";
|
||||
};
|
||||
|
||||
timer2: timer@60000 {
|
||||
compatible = "picochip,pc3x2-timer";
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <6>;
|
||||
clock-freq = <200000000>;
|
||||
reg = <0x60000 0x14>;
|
||||
};
|
||||
|
||||
timer3: timer@60014 {
|
||||
compatible = "picochip,pc3x2-timer";
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <7>;
|
||||
clock-freq = <200000000>;
|
||||
reg = <0x60014 0x14>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rwid-axi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges;
|
||||
|
||||
ebi@50000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x40000000 0x08000000
|
||||
1 0 0x48000000 0x08000000
|
||||
2 0 0x50000000 0x08000000
|
||||
3 0 0x58000000 0x08000000>;
|
||||
};
|
||||
|
||||
axi2pico@c0000000 {
|
||||
compatible = "picochip,axi2pico-pc3x3";
|
||||
reg = <0xc0000000 0x10000>;
|
||||
interrupt-parent = <&vic0>;
|
||||
interrupts = <13 14 15 16 17 18 19 20 21>;
|
||||
};
|
||||
|
||||
otp@ffff8000 {
|
||||
compatible = "picochip,otp-pc3x3";
|
||||
reg = <0xffff8000 0x8000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,86 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Picochip, Jamie Iles
|
||||
*
|
||||
* This software is licensed under the terms of the GNU General Public
|
||||
* License version 2, as published by the Free Software Foundation, and
|
||||
* may be copied, distributed, and modified under those terms.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "picoxcell-pc3x2.dtsi"
|
||||
/ {
|
||||
model = "Picochip PC7302 (PC3X2)";
|
||||
compatible = "picochip,pc7302-pc3x2", "picochip,pc3x2";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x08000000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
linux,stdout-path = &uart0;
|
||||
};
|
||||
|
||||
clocks {
|
||||
ref_clk: clock@1 {
|
||||
compatible = "fixed-clock";
|
||||
clock-outputs = "ref";
|
||||
clock-frequency = <20000000>;
|
||||
};
|
||||
};
|
||||
|
||||
rwid-axi {
|
||||
ebi@50000000 {
|
||||
nand: gpio-nand@2,0 {
|
||||
compatible = "gpio-control-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <2 0x0000 0x1000>;
|
||||
bus-clock = <&pclk>, "bus";
|
||||
gpio-control-nand,io-sync-reg =
|
||||
<0x00000000 0x80220000>;
|
||||
|
||||
gpios = <&banka 1 0 /* rdy */
|
||||
&banka 2 0 /* nce */
|
||||
&banka 3 0 /* ale */
|
||||
&banka 4 0 /* cle */
|
||||
0 /* nwp */>;
|
||||
|
||||
boot@100000 {
|
||||
label = "Boot";
|
||||
reg = <0x100000 0x80000>;
|
||||
};
|
||||
|
||||
redundant-boot@200000 {
|
||||
label = "Redundant Boot";
|
||||
reg = <0x200000 0x80000>;
|
||||
};
|
||||
|
||||
boot-env@300000 {
|
||||
label = "Boot Evironment";
|
||||
reg = <0x300000 0x20000>;
|
||||
};
|
||||
|
||||
redundant-boot-env@320000 {
|
||||
label = "Redundant Boot Environment";
|
||||
reg = <0x300000 0x20000>;
|
||||
};
|
||||
|
||||
kernel@380000 {
|
||||
label = "Kernel";
|
||||
reg = <0x380000 0x800000>;
|
||||
};
|
||||
|
||||
fs@b80000 {
|
||||
label = "File System";
|
||||
reg = <0xb80000 0xf480000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,92 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Picochip, Jamie Iles
|
||||
*
|
||||
* This software is licensed under the terms of the GNU General Public
|
||||
* License version 2, as published by the Free Software Foundation, and
|
||||
* may be copied, distributed, and modified under those terms.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "picoxcell-pc3x3.dtsi"
|
||||
/ {
|
||||
model = "Picochip PC7302 (PC3X3)";
|
||||
compatible = "picochip,pc7302-pc3x3", "picochip,pc3x3";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x08000000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
linux,stdout-path = &uart0;
|
||||
};
|
||||
|
||||
clocks {
|
||||
ref_clk: clock@10 {
|
||||
compatible = "fixed-clock";
|
||||
clock-outputs = "ref";
|
||||
clock-frequency = <20000000>;
|
||||
};
|
||||
|
||||
clkgate: clkgate@800a0048 {
|
||||
clock@4 {
|
||||
picochip,clk-no-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rwid-axi {
|
||||
ebi@50000000 {
|
||||
nand: gpio-nand@2,0 {
|
||||
compatible = "gpio-control-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <2 0x0000 0x1000>;
|
||||
bus-clock = <&ebi_clk>, "bus";
|
||||
gpio-control-nand,io-sync-reg =
|
||||
<0x00000000 0x80220000>;
|
||||
|
||||
gpios = <&banka 1 0 /* rdy */
|
||||
&banka 2 0 /* nce */
|
||||
&banka 3 0 /* ale */
|
||||
&banka 4 0 /* cle */
|
||||
0 /* nwp */>;
|
||||
|
||||
boot@100000 {
|
||||
label = "Boot";
|
||||
reg = <0x100000 0x80000>;
|
||||
};
|
||||
|
||||
redundant-boot@200000 {
|
||||
label = "Redundant Boot";
|
||||
reg = <0x200000 0x80000>;
|
||||
};
|
||||
|
||||
boot-env@300000 {
|
||||
label = "Boot Evironment";
|
||||
reg = <0x300000 0x20000>;
|
||||
};
|
||||
|
||||
redundant-boot-env@320000 {
|
||||
label = "Redundant Boot Environment";
|
||||
reg = <0x300000 0x20000>;
|
||||
};
|
||||
|
||||
kernel@380000 {
|
||||
label = "Kernel";
|
||||
reg = <0x380000 0x800000>;
|
||||
};
|
||||
|
||||
fs@b80000 {
|
||||
label = "File System";
|
||||
reg = <0xb80000 0xf480000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
obj-y := common.o
|
||||
obj-y += time.o
|
||||
obj-y += io.o
|
||||
|
|
@ -0,0 +1 @@
|
|||
zreladdr-y := 0x00008000
|
||||
|
|
@ -0,0 +1,55 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* All enquiries to support@picochip.com
|
||||
*/
|
||||
#include <linux/irq.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_platform.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/hardware/vic.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <mach/picoxcell_soc.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
static void __init picoxcell_init_machine(void)
|
||||
{
|
||||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
}
|
||||
|
||||
static const char *picoxcell_dt_match[] = {
|
||||
"picochip,pc3x2",
|
||||
"picochip,pc3x3",
|
||||
NULL
|
||||
};
|
||||
|
||||
static const struct of_device_id vic_of_match[] __initconst = {
|
||||
{ .compatible = "arm,pl192-vic" },
|
||||
{ /* Sentinel */ }
|
||||
};
|
||||
|
||||
static void __init picoxcell_init_irq(void)
|
||||
{
|
||||
vic_init(IO_ADDRESS(PICOXCELL_VIC0_BASE), 0, ~0, 0);
|
||||
vic_init(IO_ADDRESS(PICOXCELL_VIC1_BASE), 32, ~0, 0);
|
||||
irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC0_BASE, 0);
|
||||
irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC1_BASE, 32);
|
||||
}
|
||||
|
||||
DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
|
||||
.map_io = picoxcell_map_io,
|
||||
.nr_irqs = ARCH_NR_IRQS,
|
||||
.init_irq = picoxcell_init_irq,
|
||||
.timer = &picoxcell_timer,
|
||||
.init_machine = picoxcell_init_machine,
|
||||
.dt_compat = picoxcell_dt_match,
|
||||
MACHINE_END
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* All enquiries to support@picochip.com
|
||||
*/
|
||||
#ifndef __PICOXCELL_COMMON_H__
|
||||
#define __PICOXCELL_COMMON_H__
|
||||
|
||||
#include <asm/mach/time.h>
|
||||
|
||||
extern struct sys_timer picoxcell_timer;
|
||||
extern void picoxcell_map_io(void);
|
||||
|
||||
#endif /* __PICOXCELL_COMMON_H__ */
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
|
||||
* accesses to the 8250.
|
||||
*/
|
||||
#include <linux/serial_reg.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/map.h>
|
||||
|
||||
#define UART_SHIFT 2
|
||||
|
||||
.macro addruart, rp, rv
|
||||
ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)
|
||||
ldr \rp, =PICOXCELL_UART1_BASE
|
||||
.endm
|
||||
|
||||
.macro senduart,rd,rx
|
||||
str \rd, [\rx, #UART_TX << UART_SHIFT]
|
||||
.endm
|
||||
|
||||
.macro busyuart,rd,rx
|
||||
1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
|
||||
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
|
||||
teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
|
||||
bne 1002b
|
||||
.endm
|
||||
|
||||
/* The UART's don't have any flow control IO's wired up. */
|
||||
.macro waituart,rd,rx
|
||||
.endm
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
/*
|
||||
* entry-macro.S
|
||||
*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* Low-level IRQ helper macros for picoXcell platforms
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without any
|
||||
* warranty of any kind, whether express or implied.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/map.h>
|
||||
|
||||
#define VA_VIC0 IO_ADDRESS(PICOXCELL_VIC0_BASE)
|
||||
#define VA_VIC1 IO_ADDRESS(PICOXCELL_VIC1_BASE)
|
||||
|
||||
#include <asm/entry-macro-vic2.S>
|
||||
|
|
@ -0,0 +1 @@
|
|||
/* empty */
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This file contains the hardware definitions of the picoXcell SoC devices.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#ifndef __ASM_ARCH_HARDWARE_H
|
||||
#define __ASM_ARCH_HARDWARE_H
|
||||
|
||||
#include <mach/picoxcell_soc.h>
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#ifndef __ASM_ARM_ARCH_IO_H
|
||||
#define __ASM_ARM_ARCH_IO_H
|
||||
|
||||
/* No ioports, but needed for driver compatibility. */
|
||||
#define __io(a) __typesafe_io(a)
|
||||
/* No PCI possible on picoxcell. */
|
||||
#define __mem_pci(a) (a)
|
||||
|
||||
#endif /* __ASM_ARM_ARCH_IO_H */
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This file contains the hardware definitions of the picoXcell SoC devices.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#ifndef __MACH_IRQS_H
|
||||
#define __MACH_IRQS_H
|
||||
|
||||
#define ARCH_NR_IRQS 64
|
||||
#define NR_IRQS (128 + ARCH_NR_IRQS)
|
||||
|
||||
#define IRQ_VIC0_BASE 0
|
||||
#define IRQ_VIC1_BASE 32
|
||||
|
||||
#endif /* __MACH_IRQS_H */
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#ifndef __PICOXCELL_MAP_H__
|
||||
#define __PICOXCELL_MAP_H__
|
||||
|
||||
#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000)
|
||||
|
||||
#ifdef __ASSEMBLY__
|
||||
#define IO_ADDRESS(x) PHYS_TO_IO((x))
|
||||
#else
|
||||
#define IO_ADDRESS(x) (void __iomem __force *)(PHYS_TO_IO((x)))
|
||||
#endif
|
||||
|
||||
#endif /* __PICOXCELL_MAP_H__ */
|
||||
|
|
@ -0,0 +1 @@
|
|||
/* empty */
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This file contains the hardware definitions of the picoXcell SoC devices.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#ifndef __PICOXCELL_SOC_H__
|
||||
#define __PICOXCELL_SOC_H__
|
||||
|
||||
#define PICOXCELL_UART1_BASE 0x80230000
|
||||
#define PICOXCELL_PERIPH_BASE 0x80000000
|
||||
#define PICOXCELL_PERIPH_LENGTH SZ_4M
|
||||
#define PICOXCELL_VIC0_BASE 0x80060000
|
||||
#define PICOXCELL_VIC1_BASE 0x80064000
|
||||
|
||||
#endif /* __PICOXCELL_SOC_H__ */
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#ifndef __ASM_ARCH_SYSTEM_H
|
||||
#define __ASM_ARCH_SYSTEM_H
|
||||
|
||||
static inline void arch_idle(void)
|
||||
{
|
||||
/*
|
||||
* This should do all the clock switching and wait for interrupt
|
||||
* tricks.
|
||||
*/
|
||||
cpu_do_idle();
|
||||
}
|
||||
|
||||
static inline void arch_reset(int mode, const char *cmd)
|
||||
{
|
||||
/* Watchdog reset to go here. */
|
||||
}
|
||||
|
||||
#endif /* __ASM_ARCH_SYSTEM_H */
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef __TIMEX_H__
|
||||
#define __TIMEX_H__
|
||||
|
||||
/* Bogus value to allow the kernel to compile. */
|
||||
#define CLOCK_TICK_RATE 1000000
|
||||
|
||||
#endif /* __TIMEX_H__ */
|
||||
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#define putc(c)
|
||||
#define flush()
|
||||
#define arch_decomp_setup()
|
||||
#define arch_decomp_wdog()
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#define VMALLOC_END 0xfe000000UL
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* All enquiries to support@picochip.com
|
||||
*/
|
||||
#include <linux/io.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <mach/picoxcell_soc.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
void __init picoxcell_map_io(void)
|
||||
{
|
||||
struct map_desc io_map = {
|
||||
.virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE),
|
||||
.pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE),
|
||||
.length = PICOXCELL_PERIPH_LENGTH,
|
||||
.type = MT_DEVICE,
|
||||
};
|
||||
|
||||
iotable_init(&io_map, 1);
|
||||
}
|
||||
|
|
@ -0,0 +1,132 @@
|
|||
/*
|
||||
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* All enquiries to support@picochip.com
|
||||
*/
|
||||
#include <linux/dw_apb_timer.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/sched_clock.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
static void timer_get_base_and_rate(struct device_node *np,
|
||||
void __iomem **base, u32 *rate)
|
||||
{
|
||||
*base = of_iomap(np, 0);
|
||||
|
||||
if (!*base)
|
||||
panic("Unable to map regs for %s", np->name);
|
||||
|
||||
if (of_property_read_u32(np, "clock-freq", rate))
|
||||
panic("No clock-freq property for %s", np->name);
|
||||
}
|
||||
|
||||
static void picoxcell_add_clockevent(struct device_node *event_timer)
|
||||
{
|
||||
void __iomem *iobase;
|
||||
struct dw_apb_clock_event_device *ced;
|
||||
u32 irq, rate;
|
||||
|
||||
irq = irq_of_parse_and_map(event_timer, 0);
|
||||
if (irq == NO_IRQ)
|
||||
panic("No IRQ for clock event timer");
|
||||
|
||||
timer_get_base_and_rate(event_timer, &iobase, &rate);
|
||||
|
||||
ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq,
|
||||
rate);
|
||||
if (!ced)
|
||||
panic("Unable to initialise clockevent device");
|
||||
|
||||
dw_apb_clockevent_register(ced);
|
||||
}
|
||||
|
||||
static void picoxcell_add_clocksource(struct device_node *source_timer)
|
||||
{
|
||||
void __iomem *iobase;
|
||||
struct dw_apb_clocksource *cs;
|
||||
u32 rate;
|
||||
|
||||
timer_get_base_and_rate(source_timer, &iobase, &rate);
|
||||
|
||||
cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
|
||||
if (!cs)
|
||||
panic("Unable to initialise clocksource device");
|
||||
|
||||
dw_apb_clocksource_start(cs);
|
||||
dw_apb_clocksource_register(cs);
|
||||
}
|
||||
|
||||
static DEFINE_CLOCK_DATA(cd);
|
||||
static void __iomem *sched_io_base;
|
||||
|
||||
unsigned long long notrace sched_clock(void)
|
||||
{
|
||||
cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0;
|
||||
|
||||
return cyc_to_sched_clock(&cd, cyc, (u32)~0);
|
||||
}
|
||||
|
||||
static void notrace picoxcell_update_sched_clock(void)
|
||||
{
|
||||
cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0;
|
||||
|
||||
update_sched_clock(&cd, cyc, (u32)~0);
|
||||
}
|
||||
|
||||
static const struct of_device_id picoxcell_rtc_ids[] __initconst = {
|
||||
{ .compatible = "picochip,pc3x2-rtc" },
|
||||
{ /* Sentinel */ },
|
||||
};
|
||||
|
||||
static void picoxcell_init_sched_clock(void)
|
||||
{
|
||||
struct device_node *sched_timer;
|
||||
u32 rate;
|
||||
|
||||
sched_timer = of_find_matching_node(NULL, picoxcell_rtc_ids);
|
||||
if (!sched_timer)
|
||||
panic("No RTC for sched clock to use");
|
||||
|
||||
timer_get_base_and_rate(sched_timer, &sched_io_base, &rate);
|
||||
of_node_put(sched_timer);
|
||||
|
||||
init_sched_clock(&cd, picoxcell_update_sched_clock, 32, rate);
|
||||
}
|
||||
|
||||
static const struct of_device_id picoxcell_timer_ids[] __initconst = {
|
||||
{ .compatible = "picochip,pc3x2-timer" },
|
||||
{},
|
||||
};
|
||||
|
||||
static void __init picoxcell_timer_init(void)
|
||||
{
|
||||
struct device_node *event_timer, *source_timer;
|
||||
|
||||
event_timer = of_find_matching_node(NULL, picoxcell_timer_ids);
|
||||
if (!event_timer)
|
||||
panic("No timer for clockevent");
|
||||
picoxcell_add_clockevent(event_timer);
|
||||
|
||||
source_timer = of_find_matching_node(event_timer, picoxcell_timer_ids);
|
||||
if (!source_timer)
|
||||
panic("No timer for clocksource");
|
||||
picoxcell_add_clocksource(source_timer);
|
||||
|
||||
of_node_put(source_timer);
|
||||
|
||||
picoxcell_init_sched_clock();
|
||||
}
|
||||
|
||||
struct sys_timer picoxcell_timer = {
|
||||
.init = picoxcell_timer_init,
|
||||
};
|
||||
Reference in New Issue