sh: Kill off the rest of arch/sh64/kernel/.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
parent
18bc81319b
commit
b4eaa1cc7c
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@ -6,7 +6,7 @@ extra-y := head_32.o init_task.o vmlinux.lds
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obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \
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ptrace_32.o semaphore.o setup.o signal_32.o sys_sh.o sys_sh32.o \
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syscalls_32.o time.o topology.o traps.o traps_32.o
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syscalls_32.o time_32.o topology.o traps.o traps_32.o
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obj-y += cpu/ timers/
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obj-$(CONFIG_VSYSCALL) += vsyscall/
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@ -2,7 +2,7 @@ extra-y := head_64.o init_task.o vmlinux.lds
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obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \
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ptrace_64.o semaphore.o setup.o signal_64.o sys_sh.o sys_sh64.o \
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syscalls_64.o time.o topology.o traps.o traps_64.o
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syscalls_64.o time_64.o topology.o traps.o traps_64.o
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obj-y += cpu/ timers/
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obj-$(CONFIG_VSYSCALL) += vsyscall/
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@ -31,14 +31,14 @@
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#include <linux/bcd.h>
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#include <linux/timex.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <asm/registers.h> /* required by inline __asm__ stmt. */
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#include <asm/cpu/registers.h> /* required by inline __asm__ stmt. */
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#include <asm/cpu/irq.h>
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#include <asm/addrspace.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/delay.h>
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#include <asm/hardware.h>
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#define TMU_TOCR_INIT 0x00
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#define TMU0_TCR_INIT 0x0020
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@ -240,11 +240,8 @@ static inline void do_timer_interrupt(void)
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profile_tick(CPU_PROFILING);
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#ifdef CONFIG_HEARTBEAT
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{
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extern void heartbeat(void);
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heartbeat();
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}
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if (sh_mv.mv_heartbeat != NULL)
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sh_mv.mv_heartbeat();
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#endif
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/*
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@ -1,36 +0,0 @@
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#
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# This file is subject to the terms and conditions of the GNU General Public
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# License. See the file "COPYING" in the main directory of this archive
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# for more details.
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#
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# Copyright (C) 2000, 2001 Paolo Alberelli
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# Copyright (C) 2003 Paul Mundt
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#
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# Makefile for the Linux sh64 kernel.
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#
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# Note! Dependencies are done automagically by 'make dep', which also
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# removes any old dependencies. DON'T put your own dependencies here
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# unless it's something special (ie not a .c file).
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#
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extra-y := head.o init_task.o vmlinux.lds
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obj-y := process.o signal.o entry.o traps.o irq.o irq_intc.o \
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ptrace.o setup.o time.o sys_sh64.o semaphore.o sh_ksyms.o \
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switchto.o syscalls.o
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obj-$(CONFIG_HEARTBEAT) += led.o
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obj-$(CONFIG_SH_ALPHANUMERIC) += alphanum.o
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obj-$(CONFIG_SH_DMA) += dma.o
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obj-$(CONFIG_SH_FPU) += fpu.o
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obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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obj-$(CONFIG_KALLSYMS) += unwind.o
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obj-$(CONFIG_PCI) += pcibios.o
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obj-$(CONFIG_MODULES) += module.o
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ifeq ($(CONFIG_PCI),y)
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obj-$(CONFIG_CPU_SH5) += pci_sh5.o
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endif
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USE_STANDARD_AS_RULE := true
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@ -1,43 +0,0 @@
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/*
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* arch/sh64/kernel/alphanum.c
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*
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* Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
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*
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* Machine-independent functions for handling 8-digit alphanumeric display
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* (e.g. Agilent HDSP-253x)
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*/
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#include <linux/stddef.h>
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#include <linux/sched.h>
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void mach_alphanum(int pos, unsigned char val);
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void print_seg(char *file, int line)
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{
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int i;
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unsigned int nibble;
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for (i = 0; i < 5; i++) {
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mach_alphanum(i, file[i]);
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}
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for (i = 0; i < 3; i++) {
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nibble = ((line >> (i * 4)) & 0xf);
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mach_alphanum(7 - i, nibble + ((nibble > 9) ? 55 : 48));
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}
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}
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void print_seg_num(unsigned num)
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{
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int i;
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unsigned int nibble;
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for (i = 0; i < 8; i++) {
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nibble = ((num >> (i * 4)) & 0xf);
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mach_alphanum(7 - i, nibble + ((nibble > 9) ? 55 : 48));
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}
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}
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@ -1,297 +0,0 @@
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/*
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* arch/sh64/kernel/dma.c
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*
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* DMA routines for the SH-5 DMAC.
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*
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* Copyright (C) 2003 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/types.h>
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#include <linux/irq.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <asm/hardware.h>
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#include <asm/dma.h>
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#include <asm/signal.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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typedef struct {
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unsigned long dev_addr;
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unsigned long mem_addr;
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unsigned int mode;
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unsigned int count;
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} dma_info_t;
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static dma_info_t dma_info[MAX_DMA_CHANNELS];
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static DEFINE_SPINLOCK(dma_spin_lock);
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/* arch/sh64/kernel/irq_intc.c */
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extern void make_intc_irq(unsigned int irq);
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/* DMAC Interrupts */
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#define DMA_IRQ_DMTE0 18
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#define DMA_IRQ_DERR 22
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#define DMAC_COMMON_BASE (dmac_base + 0x08)
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#define DMAC_SAR_BASE (dmac_base + 0x10)
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#define DMAC_DAR_BASE (dmac_base + 0x18)
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#define DMAC_COUNT_BASE (dmac_base + 0x20)
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#define DMAC_CTRL_BASE (dmac_base + 0x28)
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#define DMAC_STATUS_BASE (dmac_base + 0x30)
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#define DMAC_SAR(n) (DMAC_SAR_BASE + ((n) * 0x28))
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#define DMAC_DAR(n) (DMAC_DAR_BASE + ((n) * 0x28))
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#define DMAC_COUNT(n) (DMAC_COUNT_BASE + ((n) * 0x28))
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#define DMAC_CTRL(n) (DMAC_CTRL_BASE + ((n) * 0x28))
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#define DMAC_STATUS(n) (DMAC_STATUS_BASE + ((n) * 0x28))
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/* DMAC.COMMON Bit Definitions */
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#define DMAC_COMMON_PR 0x00000001 /* Priority */
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/* Bits 1-2 Reserved */
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#define DMAC_COMMON_ME 0x00000008 /* Master Enable */
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#define DMAC_COMMON_NMI 0x00000010 /* NMI Flag */
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/* Bits 5-6 Reserved */
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#define DMAC_COMMON_ER 0x00000780 /* Error Response */
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#define DMAC_COMMON_AAE 0x00007800 /* Address Alignment Error */
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/* Bits 15-63 Reserved */
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/* DMAC.SAR Bit Definitions */
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#define DMAC_SAR_ADDR 0xffffffff /* Source Address */
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/* DMAC.DAR Bit Definitions */
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#define DMAC_DAR_ADDR 0xffffffff /* Destination Address */
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/* DMAC.COUNT Bit Definitions */
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#define DMAC_COUNT_CNT 0xffffffff /* Transfer Count */
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/* DMAC.CTRL Bit Definitions */
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#define DMAC_CTRL_TS 0x00000007 /* Transfer Size */
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#define DMAC_CTRL_SI 0x00000018 /* Source Increment */
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#define DMAC_CTRL_DI 0x00000060 /* Destination Increment */
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#define DMAC_CTRL_RS 0x00000780 /* Resource Select */
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#define DMAC_CTRL_IE 0x00000800 /* Interrupt Enable */
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#define DMAC_CTRL_TE 0x00001000 /* Transfer Enable */
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/* Bits 15-63 Reserved */
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/* DMAC.STATUS Bit Definitions */
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#define DMAC_STATUS_TE 0x00000001 /* Transfer End */
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#define DMAC_STATUS_AAE 0x00000002 /* Address Alignment Error */
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/* Bits 2-63 Reserved */
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static unsigned long dmac_base;
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void set_dma_count(unsigned int chan, unsigned int count);
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void set_dma_addr(unsigned int chan, unsigned int addr);
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static irqreturn_t dma_mte(int irq, void *dev_id, struct pt_regs *regs)
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{
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unsigned int chan = irq - DMA_IRQ_DMTE0;
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dma_info_t *info = dma_info + chan;
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u64 status;
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if (info->mode & DMA_MODE_WRITE) {
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sh64_out64(info->mem_addr & DMAC_SAR_ADDR, DMAC_SAR(chan));
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} else {
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sh64_out64(info->mem_addr & DMAC_DAR_ADDR, DMAC_DAR(chan));
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}
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set_dma_count(chan, info->count);
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/* Clear the TE bit */
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status = sh64_in64(DMAC_STATUS(chan));
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status &= ~DMAC_STATUS_TE;
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sh64_out64(status, DMAC_STATUS(chan));
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return IRQ_HANDLED;
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}
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static struct irqaction irq_dmte = {
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.handler = dma_mte,
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.flags = IRQF_DISABLED,
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.name = "DMA MTE",
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};
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static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs)
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{
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u64 tmp;
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u8 chan;
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printk(KERN_NOTICE "DMAC: Got a DMA Error!\n");
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tmp = sh64_in64(DMAC_COMMON_BASE);
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/* Check for the type of error */
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if ((chan = tmp & DMAC_COMMON_AAE)) {
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/* It's an address alignment error.. */
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printk(KERN_NOTICE "DMAC: Alignment error on channel %d, ", chan);
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printk(KERN_NOTICE "SAR: 0x%08llx, DAR: 0x%08llx, COUNT: %lld\n",
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(sh64_in64(DMAC_SAR(chan)) & DMAC_SAR_ADDR),
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(sh64_in64(DMAC_DAR(chan)) & DMAC_DAR_ADDR),
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(sh64_in64(DMAC_COUNT(chan)) & DMAC_COUNT_CNT));
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} else if ((chan = tmp & DMAC_COMMON_ER)) {
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/* Something else went wrong.. */
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printk(KERN_NOTICE "DMAC: Error on channel %d\n", chan);
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}
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/* Reset the ME bit to clear the interrupt */
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tmp |= DMAC_COMMON_ME;
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sh64_out64(tmp, DMAC_COMMON_BASE);
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return IRQ_HANDLED;
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}
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static struct irqaction irq_derr = {
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.handler = dma_err,
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.flags = IRQF_DISABLED,
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.name = "DMA Error",
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};
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static inline unsigned long calc_xmit_shift(unsigned int chan)
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{
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return sh64_in64(DMAC_CTRL(chan)) & 0x03;
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}
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void setup_dma(unsigned int chan, dma_info_t *info)
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{
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unsigned int irq = DMA_IRQ_DMTE0 + chan;
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dma_info_t *dma = dma_info + chan;
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make_intc_irq(irq);
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setup_irq(irq, &irq_dmte);
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dma = info;
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}
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void enable_dma(unsigned int chan)
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{
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u64 ctrl;
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ctrl = sh64_in64(DMAC_CTRL(chan));
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ctrl |= DMAC_CTRL_TE;
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sh64_out64(ctrl, DMAC_CTRL(chan));
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}
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void disable_dma(unsigned int chan)
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{
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u64 ctrl;
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ctrl = sh64_in64(DMAC_CTRL(chan));
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ctrl &= ~DMAC_CTRL_TE;
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sh64_out64(ctrl, DMAC_CTRL(chan));
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}
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void set_dma_mode(unsigned int chan, char mode)
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{
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dma_info_t *info = dma_info + chan;
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info->mode = mode;
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set_dma_addr(chan, info->mem_addr);
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set_dma_count(chan, info->count);
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}
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void set_dma_addr(unsigned int chan, unsigned int addr)
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{
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dma_info_t *info = dma_info + chan;
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unsigned long sar, dar;
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info->mem_addr = addr;
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sar = (info->mode & DMA_MODE_WRITE) ? info->mem_addr : info->dev_addr;
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dar = (info->mode & DMA_MODE_WRITE) ? info->dev_addr : info->mem_addr;
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sh64_out64(sar & DMAC_SAR_ADDR, DMAC_SAR(chan));
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sh64_out64(dar & DMAC_SAR_ADDR, DMAC_DAR(chan));
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}
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void set_dma_count(unsigned int chan, unsigned int count)
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{
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dma_info_t *info = dma_info + chan;
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u64 tmp;
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info->count = count;
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tmp = (info->count >> calc_xmit_shift(chan)) & DMAC_COUNT_CNT;
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sh64_out64(tmp, DMAC_COUNT(chan));
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}
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unsigned long claim_dma_lock(void)
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{
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unsigned long flags;
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spin_lock_irqsave(&dma_spin_lock, flags);
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return flags;
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}
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void release_dma_lock(unsigned long flags)
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{
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spin_unlock_irqrestore(&dma_spin_lock, flags);
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}
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int get_dma_residue(unsigned int chan)
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{
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return sh64_in64(DMAC_COUNT(chan) << calc_xmit_shift(chan));
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}
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int __init init_dma(void)
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{
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struct vcr_info vcr;
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u64 tmp;
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/* Remap the DMAC */
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dmac_base = onchip_remap(PHYS_DMAC_BLOCK, 1024, "DMAC");
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if (!dmac_base) {
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printk(KERN_ERR "Unable to remap DMAC\n");
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return -ENOMEM;
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}
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/* Report DMAC.VCR Info */
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vcr = sh64_get_vcr_info(dmac_base);
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printk("DMAC: Module ID: 0x%04x, Module version: 0x%04x\n",
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vcr.mod_id, vcr.mod_vers);
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/* Set the ME bit */
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tmp = sh64_in64(DMAC_COMMON_BASE);
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tmp |= DMAC_COMMON_ME;
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sh64_out64(tmp, DMAC_COMMON_BASE);
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/* Enable the DMAC Error Interrupt */
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make_intc_irq(DMA_IRQ_DERR);
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setup_irq(DMA_IRQ_DERR, &irq_derr);
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return 0;
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}
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static void __exit exit_dma(void)
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{
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onchip_unmap(dmac_base);
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free_irq(DMA_IRQ_DERR, 0);
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}
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module_init(init_dma);
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module_exit(exit_dma);
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MODULE_AUTHOR("Paul Mundt");
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MODULE_DESCRIPTION("DMA API for SH-5 DMAC");
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MODULE_LICENSE("GPL");
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EXPORT_SYMBOL(setup_dma);
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EXPORT_SYMBOL(claim_dma_lock);
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EXPORT_SYMBOL(release_dma_lock);
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EXPORT_SYMBOL(enable_dma);
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EXPORT_SYMBOL(disable_dma);
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EXPORT_SYMBOL(set_dma_mode);
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EXPORT_SYMBOL(set_dma_addr);
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EXPORT_SYMBOL(set_dma_count);
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EXPORT_SYMBOL(get_dma_residue);
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@ -1,99 +0,0 @@
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/*
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* arch/sh64/kernel/early_printk.c
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*
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* SH-5 Early SCIF console (cloned and hacked from sh implementation)
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*
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* Copyright (C) 2003, 2004 Paul Mundt <lethal@linux-sh.org>
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* Copyright (C) 2002 M. R. Brown <mrbrown@0xd6.org>
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*
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* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/console.h>
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#include <linux/tty.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#include <asm/hardware.h>
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#define SCIF_BASE_ADDR 0x01030000
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#define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR
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/*
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* Fixed virtual address where SCIF is mapped (should already be done
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* in arch/sh64/kernel/head.S!).
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*/
|
||||
#define SCIF_REG 0xfa030000
|
||||
|
||||
enum {
|
||||
SCIF_SCSMR2 = SCIF_REG + 0x00,
|
||||
SCIF_SCBRR2 = SCIF_REG + 0x04,
|
||||
SCIF_SCSCR2 = SCIF_REG + 0x08,
|
||||
SCIF_SCFTDR2 = SCIF_REG + 0x0c,
|
||||
SCIF_SCFSR2 = SCIF_REG + 0x10,
|
||||
SCIF_SCFRDR2 = SCIF_REG + 0x14,
|
||||
SCIF_SCFCR2 = SCIF_REG + 0x18,
|
||||
SCIF_SCFDR2 = SCIF_REG + 0x1c,
|
||||
SCIF_SCSPTR2 = SCIF_REG + 0x20,
|
||||
SCIF_SCLSR2 = SCIF_REG + 0x24,
|
||||
};
|
||||
|
||||
static void sh_console_putc(int c)
|
||||
{
|
||||
while (!(ctrl_inw(SCIF_SCFSR2) & 0x20))
|
||||
cpu_relax();
|
||||
|
||||
ctrl_outb(c, SCIF_SCFTDR2);
|
||||
ctrl_outw((ctrl_inw(SCIF_SCFSR2) & 0x9f), SCIF_SCFSR2);
|
||||
|
||||
if (c == '\n')
|
||||
sh_console_putc('\r');
|
||||
}
|
||||
|
||||
static void sh_console_flush(void)
|
||||
{
|
||||
ctrl_outw((ctrl_inw(SCIF_SCFSR2) & 0xbf), SCIF_SCFSR2);
|
||||
|
||||
while (!(ctrl_inw(SCIF_SCFSR2) & 0x40))
|
||||
cpu_relax();
|
||||
|
||||
ctrl_outw((ctrl_inw(SCIF_SCFSR2) & 0xbf), SCIF_SCFSR2);
|
||||
}
|
||||
|
||||
static void sh_console_write(struct console *con, const char *s, unsigned count)
|
||||
{
|
||||
while (count-- > 0)
|
||||
sh_console_putc(*s++);
|
||||
|
||||
sh_console_flush();
|
||||
}
|
||||
|
||||
static int __init sh_console_setup(struct console *con, char *options)
|
||||
{
|
||||
con->cflag = CREAD | HUPCL | CLOCAL | B19200 | CS8;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct console sh_console = {
|
||||
.name = "scifcon",
|
||||
.write = sh_console_write,
|
||||
.setup = sh_console_setup,
|
||||
.flags = CON_PRINTBUFFER | CON_BOOT,
|
||||
.index = -1,
|
||||
};
|
||||
|
||||
void __init enable_early_printk(void)
|
||||
{
|
||||
ctrl_outb(0x2a, SCIF_SCBRR2); /* 19200bps */
|
||||
|
||||
ctrl_outw(0x04, SCIF_SCFCR2); /* Reset TFRST */
|
||||
ctrl_outw(0x10, SCIF_SCFCR2); /* TTRG0=1 */
|
||||
|
||||
ctrl_outw(0, SCIF_SCSPTR2);
|
||||
ctrl_outw(0x60, SCIF_SCFSR2);
|
||||
ctrl_outw(0, SCIF_SCLSR2);
|
||||
ctrl_outw(0x30, SCIF_SCSCR2);
|
||||
|
||||
register_console(&sh_console);
|
||||
}
|
||||
|
|
@ -1,40 +0,0 @@
|
|||
/*
|
||||
* arch/sh64/kernel/led.c
|
||||
*
|
||||
* Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
|
||||
*
|
||||
* May be copied or modified under the terms of the GNU General Public
|
||||
* License. See linux/COPYING for more information.
|
||||
*
|
||||
* Flash the LEDs
|
||||
*/
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
void mach_led(int pos, int val);
|
||||
|
||||
/* acts like an actual heart beat -- ie thump-thump-pause... */
|
||||
void heartbeat(void)
|
||||
{
|
||||
static unsigned int cnt = 0, period = 0, dist = 0;
|
||||
|
||||
if (cnt == 0 || cnt == dist) {
|
||||
mach_led(-1, 1);
|
||||
} else if (cnt == 7 || cnt == dist + 7) {
|
||||
mach_led(-1, 0);
|
||||
}
|
||||
|
||||
if (++cnt > period) {
|
||||
cnt = 0;
|
||||
|
||||
/*
|
||||
* The hyperbolic function below modifies the heartbeat period
|
||||
* length in dependency of the current (5min) load. It goes
|
||||
* through the points f(0)=126, f(1)=86, f(5)=51, f(inf)->30.
|
||||
*/
|
||||
period = ((672 << FSHIFT) / (5 * avenrun[0] +
|
||||
(7 << FSHIFT))) + 30;
|
||||
dist = period / 4;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1,168 +0,0 @@
|
|||
/*
|
||||
* $Id: pcibios.c,v 1.1 2001/08/24 12:38:19 dwmw2 Exp $
|
||||
*
|
||||
* arch/sh/kernel/pcibios.c
|
||||
*
|
||||
* Copyright (C) 2002 STMicroelectronics Limited
|
||||
* Author : David J. McKay
|
||||
*
|
||||
* Copyright (C) 2004 Richard Curnow, SuperH UK Limited
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
* This is GPL'd.
|
||||
*
|
||||
* Provided here are generic versions of:
|
||||
* pcibios_update_resource()
|
||||
* pcibios_align_resource()
|
||||
* pcibios_enable_device()
|
||||
* pcibios_set_master()
|
||||
* pcibios_update_irq()
|
||||
*
|
||||
* These functions are collected here to reduce duplication of common
|
||||
* code amongst the many platform-specific PCI support code files.
|
||||
*
|
||||
* Platform-specific files are expected to provide:
|
||||
* pcibios_fixup_bus()
|
||||
* pcibios_init()
|
||||
* pcibios_setup()
|
||||
* pcibios_fixup_pbus_ranges()
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
void
|
||||
pcibios_update_resource(struct pci_dev *dev, struct resource *root,
|
||||
struct resource *res, int resource)
|
||||
{
|
||||
u32 new, check;
|
||||
int reg;
|
||||
|
||||
new = res->start | (res->flags & PCI_REGION_FLAG_MASK);
|
||||
if (resource < 6) {
|
||||
reg = PCI_BASE_ADDRESS_0 + 4*resource;
|
||||
} else if (resource == PCI_ROM_RESOURCE) {
|
||||
res->flags |= IORESOURCE_ROM_ENABLE;
|
||||
new |= PCI_ROM_ADDRESS_ENABLE;
|
||||
reg = dev->rom_base_reg;
|
||||
} else {
|
||||
/* Somebody might have asked allocation of a non-standard resource */
|
||||
return;
|
||||
}
|
||||
|
||||
pci_write_config_dword(dev, reg, new);
|
||||
pci_read_config_dword(dev, reg, &check);
|
||||
if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) {
|
||||
printk(KERN_ERR "PCI: Error while updating region "
|
||||
"%s/%d (%08x != %08x)\n", pci_name(dev), resource,
|
||||
new, check);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* We need to avoid collisions with `mirrored' VGA ports
|
||||
* and other strange ISA hardware, so we always want the
|
||||
* addresses to be allocated in the 0x000-0x0ff region
|
||||
* modulo 0x400.
|
||||
*/
|
||||
void pcibios_align_resource(void *data, struct resource *res,
|
||||
resource_size_t size, resource_size_t align)
|
||||
{
|
||||
if (res->flags & IORESOURCE_IO) {
|
||||
resource_size_t start = res->start;
|
||||
|
||||
if (start & 0x300) {
|
||||
start = (start + 0x3ff) & ~0x3ff;
|
||||
res->start = start;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void pcibios_enable_bridge(struct pci_dev *dev)
|
||||
{
|
||||
struct pci_bus *bus = dev->subordinate;
|
||||
u16 cmd, old_cmd;
|
||||
|
||||
pci_read_config_word(dev, PCI_COMMAND, &cmd);
|
||||
old_cmd = cmd;
|
||||
|
||||
if (bus->resource[0]->flags & IORESOURCE_IO) {
|
||||
cmd |= PCI_COMMAND_IO;
|
||||
}
|
||||
if ((bus->resource[1]->flags & IORESOURCE_MEM) ||
|
||||
(bus->resource[2]->flags & IORESOURCE_PREFETCH)) {
|
||||
cmd |= PCI_COMMAND_MEMORY;
|
||||
}
|
||||
|
||||
if (cmd != old_cmd) {
|
||||
pci_write_config_word(dev, PCI_COMMAND, cmd);
|
||||
}
|
||||
|
||||
printk("PCI bridge %s, command register -> %04x\n",
|
||||
pci_name(dev), cmd);
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
int pcibios_enable_device(struct pci_dev *dev, int mask)
|
||||
{
|
||||
u16 cmd, old_cmd;
|
||||
int idx;
|
||||
struct resource *r;
|
||||
|
||||
if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
|
||||
pcibios_enable_bridge(dev);
|
||||
}
|
||||
|
||||
pci_read_config_word(dev, PCI_COMMAND, &cmd);
|
||||
old_cmd = cmd;
|
||||
for(idx=0; idx<6; idx++) {
|
||||
if (!(mask & (1 << idx)))
|
||||
continue;
|
||||
r = &dev->resource[idx];
|
||||
if (!r->start && r->end) {
|
||||
printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
|
||||
return -EINVAL;
|
||||
}
|
||||
if (r->flags & IORESOURCE_IO)
|
||||
cmd |= PCI_COMMAND_IO;
|
||||
if (r->flags & IORESOURCE_MEM)
|
||||
cmd |= PCI_COMMAND_MEMORY;
|
||||
}
|
||||
if (dev->resource[PCI_ROM_RESOURCE].start)
|
||||
cmd |= PCI_COMMAND_MEMORY;
|
||||
if (cmd != old_cmd) {
|
||||
printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
|
||||
pci_write_config_word(dev, PCI_COMMAND, cmd);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* If we set up a device for bus mastering, we need to check and set
|
||||
* the latency timer as it may not be properly set.
|
||||
*/
|
||||
unsigned int pcibios_max_latency = 255;
|
||||
|
||||
void pcibios_set_master(struct pci_dev *dev)
|
||||
{
|
||||
u8 lat;
|
||||
pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
|
||||
if (lat < 16)
|
||||
lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
|
||||
else if (lat > pcibios_max_latency)
|
||||
lat = pcibios_max_latency;
|
||||
else
|
||||
return;
|
||||
printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
|
||||
pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
|
||||
}
|
||||
|
||||
void __init pcibios_update_irq(struct pci_dev *dev, int irq)
|
||||
{
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
|
||||
}
|
||||
|
|
@ -1,379 +0,0 @@
|
|||
/*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*
|
||||
* arch/sh64/kernel/setup.c
|
||||
*
|
||||
* sh64 Arch Support
|
||||
*
|
||||
* This file handles the architecture-dependent parts of initialization
|
||||
*
|
||||
* Copyright (C) 2000, 2001 Paolo Alberelli
|
||||
* Copyright (C) 2003, 2004 Paul Mundt
|
||||
*
|
||||
* benedict.gaster@superh.com: 2nd May 2002
|
||||
* Modified to use the empty_zero_page to pass command line arguments.
|
||||
*
|
||||
* benedict.gaster@superh.com: 3rd May 2002
|
||||
* Added support for ramdisk, removing statically linked romfs at the same time.
|
||||
*
|
||||
* lethal@linux-sh.org: 15th May 2003
|
||||
* Added generic procfs cpuinfo reporting. Make boards just export their name.
|
||||
*
|
||||
* lethal@linux-sh.org: 25th May 2003
|
||||
* Added generic get_cpu_subtype() for subtype reporting from cpu_data->type.
|
||||
*
|
||||
*/
|
||||
#include <linux/errno.h>
|
||||
#include <linux/rwsem.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/unistd.h>
|
||||
#include <linux/ptrace.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/user.h>
|
||||
#include <linux/a.out.h>
|
||||
#include <linux/screen_info.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/blkdev.h>
|
||||
#include <linux/bootmem.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/root_dev.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/initrd.h>
|
||||
#include <linux/pfn.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/platform.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/smp.h>
|
||||
|
||||
struct screen_info screen_info;
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_RAM
|
||||
extern int rd_doload; /* 1 = load ramdisk, 0 = don't load */
|
||||
extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */
|
||||
extern int rd_image_start; /* starting block # of image */
|
||||
#endif
|
||||
|
||||
extern int root_mountflags;
|
||||
extern char *get_system_type(void);
|
||||
extern void platform_setup(void);
|
||||
extern void platform_monitor(void);
|
||||
extern void platform_reserve(void);
|
||||
extern int sh64_cache_init(void);
|
||||
extern int sh64_tlb_init(void);
|
||||
|
||||
#define RAMDISK_IMAGE_START_MASK 0x07FF
|
||||
#define RAMDISK_PROMPT_FLAG 0x8000
|
||||
#define RAMDISK_LOAD_FLAG 0x4000
|
||||
|
||||
static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, };
|
||||
unsigned long long memory_start = CONFIG_MEMORY_START;
|
||||
unsigned long long memory_end = CONFIG_MEMORY_START + (CONFIG_MEMORY_SIZE_IN_MB * 1024 * 1024);
|
||||
|
||||
struct sh_cpuinfo boot_cpu_data;
|
||||
|
||||
static inline void parse_mem_cmdline (char ** cmdline_p)
|
||||
{
|
||||
char c = ' ', *to = command_line, *from = COMMAND_LINE;
|
||||
int len = 0;
|
||||
|
||||
/* Save unparsed command line copy for /proc/cmdline */
|
||||
memcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
|
||||
boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
|
||||
|
||||
for (;;) {
|
||||
/*
|
||||
* "mem=XXX[kKmM]" defines a size of memory.
|
||||
*/
|
||||
if (c == ' ' && !memcmp(from, "mem=", 4)) {
|
||||
if (to != command_line)
|
||||
to--;
|
||||
{
|
||||
unsigned long mem_size;
|
||||
|
||||
mem_size = memparse(from+4, &from);
|
||||
memory_end = memory_start + mem_size;
|
||||
}
|
||||
}
|
||||
c = *(from++);
|
||||
if (!c)
|
||||
break;
|
||||
if (COMMAND_LINE_SIZE <= ++len)
|
||||
break;
|
||||
*(to++) = c;
|
||||
}
|
||||
*to = '\0';
|
||||
|
||||
*cmdline_p = command_line;
|
||||
}
|
||||
|
||||
static void __init sh64_cpu_type_detect(void)
|
||||
{
|
||||
extern unsigned long long peek_real_address_q(unsigned long long addr);
|
||||
unsigned long long cir;
|
||||
/* Do peeks in real mode to avoid having to set up a mapping for the
|
||||
WPC registers. On SH5-101 cut2, such a mapping would be exposed to
|
||||
an address translation erratum which would make it hard to set up
|
||||
correctly. */
|
||||
cir = peek_real_address_q(0x0d000008);
|
||||
|
||||
if ((cir & 0xffff) == 0x5103) {
|
||||
boot_cpu_data.type = CPU_SH5_103;
|
||||
} else if (((cir >> 32) & 0xffff) == 0x51e2) {
|
||||
/* CPU.VCR aliased at CIR address on SH5-101 */
|
||||
boot_cpu_data.type = CPU_SH5_101;
|
||||
} else {
|
||||
boot_cpu_data.type = CPU_SH_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
void __init setup_arch(char **cmdline_p)
|
||||
{
|
||||
unsigned long bootmap_size, i;
|
||||
unsigned long first_pfn, start_pfn, last_pfn, pages;
|
||||
|
||||
#ifdef CONFIG_EARLY_PRINTK
|
||||
extern void enable_early_printk(void);
|
||||
|
||||
/*
|
||||
* Setup Early SCIF console
|
||||
*/
|
||||
enable_early_printk();
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Setup TLB mappings
|
||||
*/
|
||||
sh64_tlb_init();
|
||||
|
||||
/*
|
||||
* Caches are already initialized by the time we get here, so we just
|
||||
* fill in cpu_data info for the caches.
|
||||
*/
|
||||
sh64_cache_init();
|
||||
|
||||
platform_setup();
|
||||
platform_monitor();
|
||||
|
||||
sh64_cpu_type_detect();
|
||||
|
||||
ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_RAM
|
||||
rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
|
||||
rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
|
||||
rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
|
||||
#endif
|
||||
|
||||
if (!MOUNT_ROOT_RDONLY)
|
||||
root_mountflags &= ~MS_RDONLY;
|
||||
init_mm.start_code = (unsigned long) _text;
|
||||
init_mm.end_code = (unsigned long) _etext;
|
||||
init_mm.end_data = (unsigned long) _edata;
|
||||
init_mm.brk = (unsigned long) _end;
|
||||
|
||||
code_resource.start = __pa(_text);
|
||||
code_resource.end = __pa(_etext)-1;
|
||||
data_resource.start = __pa(_etext);
|
||||
data_resource.end = __pa(_edata)-1;
|
||||
|
||||
parse_mem_cmdline(cmdline_p);
|
||||
|
||||
/*
|
||||
* Find the lowest and highest page frame numbers we have available
|
||||
*/
|
||||
first_pfn = PFN_DOWN(memory_start);
|
||||
last_pfn = PFN_DOWN(memory_end);
|
||||
pages = last_pfn - first_pfn;
|
||||
|
||||
/*
|
||||
* Partially used pages are not usable - thus
|
||||
* we are rounding upwards:
|
||||
*/
|
||||
start_pfn = PFN_UP(__pa(_end));
|
||||
|
||||
/*
|
||||
* Find a proper area for the bootmem bitmap. After this
|
||||
* bootstrap step all allocations (until the page allocator
|
||||
* is intact) must be done via bootmem_alloc().
|
||||
*/
|
||||
bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
|
||||
first_pfn,
|
||||
last_pfn);
|
||||
/*
|
||||
* Round it up.
|
||||
*/
|
||||
bootmap_size = PFN_PHYS(PFN_UP(bootmap_size));
|
||||
|
||||
/*
|
||||
* Register fully available RAM pages with the bootmem allocator.
|
||||
*/
|
||||
free_bootmem_node(NODE_DATA(0), PFN_PHYS(first_pfn), PFN_PHYS(pages));
|
||||
|
||||
/*
|
||||
* Reserve all kernel sections + bootmem bitmap + a guard page.
|
||||
*/
|
||||
reserve_bootmem_node(NODE_DATA(0), PFN_PHYS(first_pfn),
|
||||
(PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE) - PFN_PHYS(first_pfn));
|
||||
|
||||
/*
|
||||
* Reserve platform dependent sections
|
||||
*/
|
||||
platform_reserve();
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
if (LOADER_TYPE && INITRD_START) {
|
||||
if (INITRD_START + INITRD_SIZE <= (PFN_PHYS(last_pfn))) {
|
||||
reserve_bootmem_node(NODE_DATA(0), INITRD_START + __MEMORY_START, INITRD_SIZE);
|
||||
|
||||
initrd_start = (long) INITRD_START + PAGE_OFFSET + __MEMORY_START;
|
||||
initrd_end = initrd_start + INITRD_SIZE;
|
||||
} else {
|
||||
printk("initrd extends beyond end of memory "
|
||||
"(0x%08lx > 0x%08lx)\ndisabling initrd\n",
|
||||
(long) INITRD_START + INITRD_SIZE,
|
||||
PFN_PHYS(last_pfn));
|
||||
initrd_start = 0;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Claim all RAM, ROM, and I/O resources.
|
||||
*/
|
||||
|
||||
/* Kernel RAM */
|
||||
request_resource(&iomem_resource, &code_resource);
|
||||
request_resource(&iomem_resource, &data_resource);
|
||||
|
||||
/* Other KRAM space */
|
||||
for (i = 0; i < STANDARD_KRAM_RESOURCES - 2; i++)
|
||||
request_resource(&iomem_resource,
|
||||
&platform_parms.kram_res_p[i]);
|
||||
|
||||
/* XRAM space */
|
||||
for (i = 0; i < STANDARD_XRAM_RESOURCES; i++)
|
||||
request_resource(&iomem_resource,
|
||||
&platform_parms.xram_res_p[i]);
|
||||
|
||||
/* ROM space */
|
||||
for (i = 0; i < STANDARD_ROM_RESOURCES; i++)
|
||||
request_resource(&iomem_resource,
|
||||
&platform_parms.rom_res_p[i]);
|
||||
|
||||
/* I/O space */
|
||||
for (i = 0; i < STANDARD_IO_RESOURCES; i++)
|
||||
request_resource(&ioport_resource,
|
||||
&platform_parms.io_res_p[i]);
|
||||
|
||||
|
||||
#ifdef CONFIG_VT
|
||||
#if defined(CONFIG_VGA_CONSOLE)
|
||||
conswitchp = &vga_con;
|
||||
#elif defined(CONFIG_DUMMY_CONSOLE)
|
||||
conswitchp = &dummy_con;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
printk("Hardware FPU: %s\n", fpu_in_use ? "enabled" : "disabled");
|
||||
|
||||
paging_init();
|
||||
}
|
||||
|
||||
void __xchg_called_with_bad_pointer(void)
|
||||
{
|
||||
printk(KERN_EMERG "xchg() called with bad pointer !\n");
|
||||
}
|
||||
|
||||
static struct cpu cpu[1];
|
||||
|
||||
static int __init topology_init(void)
|
||||
{
|
||||
return register_cpu(cpu, 0);
|
||||
}
|
||||
|
||||
subsys_initcall(topology_init);
|
||||
|
||||
/*
|
||||
* Get CPU information
|
||||
*/
|
||||
static const char *cpu_name[] = {
|
||||
[CPU_SH5_101] = "SH5-101",
|
||||
[CPU_SH5_103] = "SH5-103",
|
||||
[CPU_SH_NONE] = "Unknown",
|
||||
};
|
||||
|
||||
const char *get_cpu_subtype(void)
|
||||
{
|
||||
return cpu_name[boot_cpu_data.type];
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PROC_FS
|
||||
static int show_cpuinfo(struct seq_file *m,void *v)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
|
||||
if (!cpu)
|
||||
seq_printf(m, "machine\t\t: %s\n", get_system_type());
|
||||
|
||||
seq_printf(m, "processor\t: %d\n", cpu);
|
||||
seq_printf(m, "cpu family\t: SH-5\n");
|
||||
seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype());
|
||||
|
||||
seq_printf(m, "icache size\t: %dK-bytes\n",
|
||||
(boot_cpu_data.icache.ways *
|
||||
boot_cpu_data.icache.sets *
|
||||
boot_cpu_data.icache.linesz) >> 10);
|
||||
seq_printf(m, "dcache size\t: %dK-bytes\n",
|
||||
(boot_cpu_data.dcache.ways *
|
||||
boot_cpu_data.dcache.sets *
|
||||
boot_cpu_data.dcache.linesz) >> 10);
|
||||
seq_printf(m, "itlb entries\t: %d\n", boot_cpu_data.itlb.entries);
|
||||
seq_printf(m, "dtlb entries\t: %d\n", boot_cpu_data.dtlb.entries);
|
||||
|
||||
#define PRINT_CLOCK(name, value) \
|
||||
seq_printf(m, name " clock\t: %d.%02dMHz\n", \
|
||||
((value) / 1000000), ((value) % 1000000)/10000)
|
||||
|
||||
PRINT_CLOCK("cpu", boot_cpu_data.cpu_clock);
|
||||
PRINT_CLOCK("bus", boot_cpu_data.bus_clock);
|
||||
PRINT_CLOCK("module", boot_cpu_data.module_clock);
|
||||
|
||||
seq_printf(m, "bogomips\t: %lu.%02lu\n\n",
|
||||
(loops_per_jiffy*HZ+2500)/500000,
|
||||
((loops_per_jiffy*HZ+2500)/5000) % 100);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void *c_start(struct seq_file *m, loff_t *pos)
|
||||
{
|
||||
return (void*)(*pos == 0);
|
||||
}
|
||||
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
static void c_stop(struct seq_file *m, void *v)
|
||||
{
|
||||
}
|
||||
struct seq_operations cpuinfo_op = {
|
||||
.start = c_start,
|
||||
.next = c_next,
|
||||
.stop = c_stop,
|
||||
.show = show_cpuinfo,
|
||||
};
|
||||
#endif /* CONFIG_PROC_FS */
|
||||
Reference in New Issue