drm/nouveau: fix assumption that semaphore dmaobj is valid in x-chan sync
The DDX modifies DMA_SEMAPHORE on nv50 in order to implement sync-to-vblank, things will go very wrong for cross-channel sync after this. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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parent
f66b3d5540
commit
b16a5a18ff
1 changed files with 25 additions and 34 deletions
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@ -339,11 +339,12 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
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int ret;
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if (dev_priv->chipset < 0x84) {
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ret = RING_SPACE(chan, 3);
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ret = RING_SPACE(chan, 4);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 2);
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BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 3);
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OUT_RING (chan, NvSema);
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OUT_RING (chan, sema->mem->start);
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OUT_RING (chan, 1);
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} else
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@ -351,10 +352,12 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
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struct nouveau_vma *vma = &dev_priv->fence.bo->vma;
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u64 offset = vma->offset + sema->mem->start;
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ret = RING_SPACE(chan, 5);
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ret = RING_SPACE(chan, 7);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
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OUT_RING (chan, chan->vram_handle);
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BEGIN_RING(chan, NvSubSw, 0x0010, 4);
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OUT_RING (chan, upper_32_bits(offset));
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OUT_RING (chan, lower_32_bits(offset));
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@ -394,11 +397,12 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
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int ret;
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if (dev_priv->chipset < 0x84) {
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ret = RING_SPACE(chan, 4);
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ret = RING_SPACE(chan, 5);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 1);
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BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 2);
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OUT_RING (chan, NvSema);
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OUT_RING (chan, sema->mem->start);
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BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_RELEASE, 1);
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OUT_RING (chan, 1);
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@ -407,10 +411,12 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
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struct nouveau_vma *vma = &dev_priv->fence.bo->vma;
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u64 offset = vma->offset + sema->mem->start;
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ret = RING_SPACE(chan, 5);
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ret = RING_SPACE(chan, 7);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
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OUT_RING (chan, chan->vram_handle);
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BEGIN_RING(chan, NvSubSw, 0x0010, 4);
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OUT_RING (chan, upper_32_bits(offset));
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OUT_RING (chan, lower_32_bits(offset));
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@ -504,22 +510,22 @@ nouveau_fence_channel_init(struct nouveau_channel *chan)
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struct nouveau_gpuobj *obj = NULL;
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int ret;
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if (dev_priv->card_type >= NV_C0)
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goto out_initialised;
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if (dev_priv->card_type < NV_C0) {
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/* Create an NV_SW object for various sync purposes */
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ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
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if (ret)
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return ret;
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/* Create an NV_SW object for various sync purposes */
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ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
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if (ret)
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return ret;
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ret = RING_SPACE(chan, 2);
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if (ret)
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return ret;
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/* we leave subchannel empty for nvc0 */
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ret = RING_SPACE(chan, 2);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubSw, 0, 1);
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OUT_RING(chan, NvSw);
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BEGIN_RING(chan, NvSubSw, 0, 1);
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OUT_RING (chan, NvSw);
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FIRE_RING (chan);
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}
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/* Create a DMA object for the shared cross-channel sync area. */
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/* Setup area of memory shared between all channels for x-chan sync */
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if (USE_SEMA(dev) && dev_priv->chipset < 0x84) {
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struct ttm_mem_reg *mem = &dev_priv->fence.bo->bo.mem;
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@ -534,23 +540,8 @@ nouveau_fence_channel_init(struct nouveau_channel *chan)
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nouveau_gpuobj_ref(NULL, &obj);
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if (ret)
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return ret;
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ret = RING_SPACE(chan, 2);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
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OUT_RING(chan, NvSema);
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} else {
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ret = RING_SPACE(chan, 2);
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if (ret)
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return ret;
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BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
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OUT_RING (chan, chan->vram_handle); /* whole VM */
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}
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FIRE_RING(chan);
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out_initialised:
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INIT_LIST_HEAD(&chan->fence.pending);
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spin_lock_init(&chan->fence.lock);
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atomic_set(&chan->fence.last_sequence_irq, 0);
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