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Blackfin: update anomaly lists 

Add some recently documented anomalies (473, 474, 475, 477).  Also stick
a "do not edit" notice in here so people know these are copies of some
master version.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2009-11-15 18:18:41 -05:00
parent 7bae2c4898
commit af5d7fc7e4
7 changed files with 109 additions and 31 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
arch/blackfin/mach-bf518/include/mach/anomaly.h
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@ -1,9 +1,13 @@
/*
* File: include/asm-blackfin/mach-bf518/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
* DO NOT EDIT THIS FILE
* This file is under version control at
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
* and can be replaced with that version at any time
* DO NOT EDIT THIS FILE
*
* Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later.
* Copyright 2004-2009 Analog Devices Inc.
* Licensed under the ADI BSD license.
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
*/
/* This file should be up to date with:
@ -70,6 +74,10 @@
#define ANOMALY_05000461 (1)
/* Synchronization Problem at Startup May Cause SPORT Transmit Channels to Misalign */
#define ANOMALY_05000462 (1)
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
#define ANOMALY_05000473 (1)
/* TESTSET Instruction Cannot Be Interrupted */
#define ANOMALY_05000477 (1)
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000099 (0)
@ -133,5 +141,7 @@
#define ANOMALY_05000450 (0)
#define ANOMALY_05000465 (0)
#define ANOMALY_05000467 (0)
#define ANOMALY_05000474 (0)
#define ANOMALY_05000475 (0)
#endif

20
arch/blackfin/mach-bf527/include/mach/anomaly.h
View File

@ -1,14 +1,18 @@
/*
* File: include/asm-blackfin/mach-bf527/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
* DO NOT EDIT THIS FILE
* This file is under version control at
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
* and can be replaced with that version at any time
* DO NOT EDIT THIS FILE
*
* Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later.
* Copyright 2004-2009 Analog Devices Inc.
* Licensed under the ADI BSD license.
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
*/
/* This file should be up to date with:
* - Revision D, 08/14/2009; ADSP-BF526 Blackfin Processor Anomaly List
* - Revision F, 03/03/2009; ADSP-BF527 Blackfin Processor Anomaly List
* - Revision G, 08/25/2009; ADSP-BF527 Blackfin Processor Anomaly List
*/
#ifndef _MACH_ANOMALY_H_
@ -200,6 +204,10 @@
#define ANOMALY_05000467 (1)
/* PLL Latches Incorrect Settings During Reset */
#define ANOMALY_05000469 (1)
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
#define ANOMALY_05000473 (1)
/* TESTSET Instruction Cannot Be Interrupted */
#define ANOMALY_05000477 (1)
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000099 (0)
@ -250,5 +258,7 @@
#define ANOMALY_05000412 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#define ANOMALY_05000474 (0)
#define ANOMALY_05000475 (0)
#endif

18
arch/blackfin/mach-bf533/include/mach/anomaly.h
View File

@ -1,9 +1,13 @@
/*
* File: include/asm-blackfin/mach-bf533/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
* DO NOT EDIT THIS FILE
* This file is under version control at
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
* and can be replaced with that version at any time
* DO NOT EDIT THIS FILE
*
* Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later.
* Copyright 2004-2009 Analog Devices Inc.
* Licensed under the ADI BSD license.
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
*/
/* This file should be up to date with:
@ -202,6 +206,10 @@
#define ANOMALY_05000443 (1)
/* False Hardware Error when RETI Points to Invalid Memory */
#define ANOMALY_05000461 (1)
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
#define ANOMALY_05000473 (1)
/* TESTSET Instruction Cannot Be Interrupted */
#define ANOMALY_05000477 (1)
/* These anomalies have been "phased" out of analog.com anomaly sheets and are
* here to show running on older silicon just isn't feasible.
@ -349,5 +357,7 @@
#define ANOMALY_05000450 (0)
#define ANOMALY_05000465 (0)
#define ANOMALY_05000467 (0)
#define ANOMALY_05000474 (0)
#define ANOMALY_05000475 (0)
#endif

18
arch/blackfin/mach-bf537/include/mach/anomaly.h
View File

@ -1,9 +1,13 @@
/*
* File: include/asm-blackfin/mach-bf537/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
* DO NOT EDIT THIS FILE
* This file is under version control at
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
* and can be replaced with that version at any time
* DO NOT EDIT THIS FILE
*
* Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later.
* Copyright 2004-2009 Analog Devices Inc.
* Licensed under the ADI BSD license.
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
*/
/* This file should be up to date with:
@ -156,6 +160,10 @@
#define ANOMALY_05000443 (1)
/* False Hardware Error when RETI Points to Invalid Memory */
#define ANOMALY_05000461 (1)
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
#define ANOMALY_05000473 (1)
/* TESTSET Instruction Cannot Be Interrupted */
#define ANOMALY_05000477 (1)
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000099 (0)
@ -202,5 +210,7 @@
#define ANOMALY_05000450 (0)
#define ANOMALY_05000465 (0)
#define ANOMALY_05000467 (0)
#define ANOMALY_05000474 (0)
#define ANOMALY_05000475 (0)
#endif

18
arch/blackfin/mach-bf538/include/mach/anomaly.h
View File

@ -1,9 +1,13 @@
/*
* File: include/asm-blackfin/mach-bf538/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
* DO NOT EDIT THIS FILE
* This file is under version control at
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
* and can be replaced with that version at any time
* DO NOT EDIT THIS FILE
*
* Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later.
* Copyright 2004-2009 Analog Devices Inc.
* Licensed under the ADI BSD license.
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
*/
/* This file should be up to date with:
@ -128,6 +132,10 @@
#define ANOMALY_05000443 (1)
/* False Hardware Error when RETI Points to Invalid Memory */
#define ANOMALY_05000461 (1)
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
#define ANOMALY_05000473 (1)
/* TESTSET Instruction Cannot Be Interrupted */
#define ANOMALY_05000477 (1)
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000099 (0)
@ -176,5 +184,7 @@
#define ANOMALY_05000450 (0)
#define ANOMALY_05000465 (0)
#define ANOMALY_05000467 (0)
#define ANOMALY_05000474 (0)
#define ANOMALY_05000475 (0)
#endif

23
arch/blackfin/mach-bf548/include/mach/anomaly.h
View File

@ -1,9 +1,13 @@
/*
* File: include/asm-blackfin/mach-bf548/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
* DO NOT EDIT THIS FILE
* This file is under version control at
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
* and can be replaced with that version at any time
* DO NOT EDIT THIS FILE
*
* Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later.
* Copyright 2004-2009 Analog Devices Inc.
* Licensed under the ADI BSD license.
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
*/
/* This file should be up to date with:
@ -24,6 +28,8 @@
#define ANOMALY_05000119 (1)
/* Rx.H Cannot Be Used to Access 16-bit System MMR Registers */
#define ANOMALY_05000122 (1)
/* Data Corruption with Cached External Memory and Non-Cached On-Chip L2 Memory */
#define ANOMALY_05000220 (1)
/* False Hardware Error from an Access in the Shadow of a Conditional Branch */
#define ANOMALY_05000245 (1)
/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
@ -200,6 +206,14 @@
#define ANOMALY_05000466 (1)
/* Possible RX data corruption when control & data EP FIFOs are accessed via the core */
#define ANOMALY_05000467 (1)
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
#define ANOMALY_05000473 (1)
/* Access to DDR-SDRAM causes system hang under certain PLL/VR settings */
#define ANOMALY_05000474 (1)
/* Core Hang With L2/L3 Configured in Writeback Cache Mode */
#define ANOMALY_05000475 (1)
/* TESTSET Instruction Cannot Be Interrupted */
#define ANOMALY_05000477 (1)
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000099 (0)
@ -215,7 +229,6 @@
#define ANOMALY_05000198 (0)
#define ANOMALY_05000202 (0)
#define ANOMALY_05000215 (0)
#define ANOMALY_05000220 (0)
#define ANOMALY_05000227 (0)
#define ANOMALY_05000230 (0)
#define ANOMALY_05000231 (0)

25
arch/blackfin/mach-bf561/include/mach/anomaly.h
View File

@ -1,9 +1,13 @@
/*
* File: include/asm-blackfin/mach-bf561/anomaly.h
* Bugs: Enter bugs at http://blackfin.uclinux.org/
* DO NOT EDIT THIS FILE
* This file is under version control at
* svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/
* and can be replaced with that version at any time
* DO NOT EDIT THIS FILE
*
* Copyright (C) 2004-2009 Analog Devices Inc.
* Licensed under the GPL-2 or later.
* Copyright 2004-2009 Analog Devices Inc.
* Licensed under the ADI BSD license.
* https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd
*/
/* This file should be up to date with:
@ -213,7 +217,11 @@
/* Disabling Peripherals with DMA Running May Cause DMA System Instability */
#define ANOMALY_05000278 (__SILICON_REVISION__ < 5)
/* False Hardware Error Exception when ISR Context Is Not Restored */
#define ANOMALY_05000281 (__SILICON_REVISION__ < 5)
/* Temporarily walk around for bug 5423 till this issue is confirmed by
* official anomaly document. It looks 05000281 still exists on bf561
* v0.5.
*/
#define ANOMALY_05000281 (__SILICON_REVISION__ <= 5)
/* System MMR Write Is Stalled Indefinitely when Killed in a Particular Stage */
#define ANOMALY_05000283 (1)
/* Reads Will Receive Incorrect Data under Certain Conditions */
@ -280,6 +288,12 @@
#define ANOMALY_05000443 (1)
/* False Hardware Error when RETI Points to Invalid Memory */
#define ANOMALY_05000461 (1)
/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */
#define ANOMALY_05000473 (1)
/* Core Hang With L2/L3 Configured in Writeback Cache Mode */
#define ANOMALY_05000475 (__SILICON_REVISION__ < 4)
/* TESTSET Instruction Cannot Be Interrupted */
#define ANOMALY_05000477 (1)
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000119 (0)
@ -304,5 +318,6 @@
#define ANOMALY_05000450 (0)
#define ANOMALY_05000465 (0)
#define ANOMALY_05000467 (0)
#define ANOMALY_05000474 (0)
#endif