[POWERPC] ptrace cleanups
The powerpc ptrace code has some weirdness, like a ptrace-common.h file that is actually ppc64 only and some of the 32 bits code ifdef'ed inside ptrace.c. There are also separate implementations for things like get/set_vrregs for 32 and 64 bits which is totally unnecessary. This patch cleans that up a bit by having a ptrace-common.h which contains really common code (and makes a lot more code common), and ptrace-ppc32.h and ptrace-ppc64.h files that contain the few remaining different bits. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Benjamin Herrenschmidt
Paul Mackerras
parent
0b3d5c48a9
commit
acd8982848
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2002 Stephen Rothwell, IBM Coproration
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* Copyright (c) 2007 Benjamin Herrenschmidt, IBM Coproration
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* Extracted from ptrace.c and ptrace32.c
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*
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* This file is subject to the terms and conditions of the GNU General
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@ -7,15 +8,8 @@
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* this archive for more details.
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*/
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#ifndef _PPC64_PTRACE_COMMON_H
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#define _PPC64_PTRACE_COMMON_H
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#include <asm/system.h>
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/*
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* Set of msr bits that gdb can change on behalf of a process.
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*/
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#define MSR_DEBUGCHANGE (MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1)
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#ifndef _POWERPC_PTRACE_COMMON_H
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#define _POWERPC_PTRACE_COMMON_H
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/*
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* Get contents of register REGNO in task TASK.
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@ -24,18 +18,18 @@ static inline unsigned long get_reg(struct task_struct *task, int regno)
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{
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unsigned long tmp = 0;
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/*
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* Put the correct FP bits in, they might be wrong as a result
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* of our lazy FP restore.
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*/
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if (task->thread.regs == NULL)
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return -EIO;
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if (regno == PT_MSR) {
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tmp = ((unsigned long *)task->thread.regs)[PT_MSR];
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tmp |= task->thread.fpexc_mode;
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} else if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) {
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tmp = ((unsigned long *)task->thread.regs)[regno];
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return PT_MUNGE_MSR(tmp, task);
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}
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return tmp;
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if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
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return ((unsigned long *)task->thread.regs)[regno];
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return -EIO;
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}
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/*
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@ -44,7 +38,10 @@ static inline unsigned long get_reg(struct task_struct *task, int regno)
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static inline int put_reg(struct task_struct *task, int regno,
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unsigned long data)
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{
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if (regno < PT_SOFTE) {
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if (task->thread.regs == NULL)
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return -EIO;
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if (regno <= PT_MAX_PUT_REG) {
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if (regno == PT_MSR)
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data = (data & MSR_DEBUGCHANGE)
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| (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
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@ -54,21 +51,6 @@ static inline int put_reg(struct task_struct *task, int regno,
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return -EIO;
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}
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static inline void set_single_step(struct task_struct *task)
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{
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struct pt_regs *regs = task->thread.regs;
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if (regs != NULL)
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regs->msr |= MSR_SE;
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set_tsk_thread_flag(task, TIF_SINGLESTEP);
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}
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static inline void clear_single_step(struct task_struct *task)
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{
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struct pt_regs *regs = task->thread.regs;
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if (regs != NULL)
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regs->msr &= ~MSR_SE;
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clear_tsk_thread_flag(task, TIF_SINGLESTEP);
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}
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#ifdef CONFIG_ALTIVEC
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/*
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@ -137,25 +119,36 @@ static inline int set_vrregs(struct task_struct *task,
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return 0;
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}
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#endif
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#endif /* CONFIG_ALTIVEC */
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static inline int ptrace_set_debugreg(struct task_struct *task,
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unsigned long addr, unsigned long data)
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static inline void set_single_step(struct task_struct *task)
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{
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/* We only support one DABR and no IABRS at the moment */
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if (addr > 0)
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return -EINVAL;
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struct pt_regs *regs = task->thread.regs;
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/* The bottom 3 bits are flags */
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if ((data & ~0x7UL) >= TASK_SIZE)
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return -EIO;
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/* Ensure translation is on */
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if (data && !(data & DABR_TRANSLATION))
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return -EIO;
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task->thread.dabr = data;
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return 0;
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if (regs != NULL) {
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#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
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task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC;
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regs->msr |= MSR_DE;
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#else
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regs->msr |= MSR_SE;
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#endif
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}
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set_tsk_thread_flag(task, TIF_SINGLESTEP);
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}
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#endif /* _PPC64_PTRACE_COMMON_H */
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static inline void clear_single_step(struct task_struct *task)
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{
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struct pt_regs *regs = task->thread.regs;
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if (regs != NULL) {
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#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
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task->thread.dbcr0 = 0;
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regs->msr &= ~MSR_DE;
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#else
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regs->msr &= ~MSR_SE;
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#endif
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}
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clear_tsk_thread_flag(task, TIF_SINGLESTEP);
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}
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#endif /* _POWERPC_PTRACE_COMMON_H */
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@ -0,0 +1,100 @@
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/*
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* Copyright (c) 2007 Benjamin Herrenschmidt, IBM Coproration
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* Extracted from ptrace.c and ptrace32.c
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file README.legal in the main directory of
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* this archive for more details.
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*/
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#ifndef _POWERPC_PTRACE_PPC32_H
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#define _POWERPC_PTRACE_PPC32_H
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/*
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* Set of msr bits that gdb can change on behalf of a process.
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*/
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#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
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#define MSR_DEBUGCHANGE 0
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#else
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#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
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#endif
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/*
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* Max register writeable via put_reg
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*/
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#define PT_MAX_PUT_REG PT_MQ
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/*
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* Munging of MSR on return from get_regs
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*
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* Nothing to do on ppc32
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*/
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#define PT_MUNGE_MSR(msr, task) (msr)
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#ifdef CONFIG_SPE
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/*
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* For get_evrregs/set_evrregs functions 'data' has the following layout:
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*
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* struct {
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* u32 evr[32];
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* u64 acc;
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* u32 spefscr;
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* }
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*/
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/*
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* Get contents of SPE register state in task TASK.
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*/
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static inline int get_evrregs(unsigned long *data, struct task_struct *task)
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{
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int i;
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if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(unsigned long)))
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return -EFAULT;
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/* copy SPEFSCR */
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if (__put_user(task->thread.spefscr, &data[34]))
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return -EFAULT;
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/* copy SPE registers EVR[0] .. EVR[31] */
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for (i = 0; i < 32; i++, data++)
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if (__put_user(task->thread.evr[i], data))
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return -EFAULT;
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/* copy ACC */
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if (__put_user64(task->thread.acc, (unsigned long long *)data))
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return -EFAULT;
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return 0;
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}
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/*
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* Write contents of SPE register state into task TASK.
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*/
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static inline int set_evrregs(struct task_struct *task, unsigned long *data)
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{
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int i;
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if (!access_ok(VERIFY_READ, data, 35 * sizeof(unsigned long)))
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return -EFAULT;
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/* copy SPEFSCR */
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if (__get_user(task->thread.spefscr, &data[34]))
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return -EFAULT;
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/* copy SPE registers EVR[0] .. EVR[31] */
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for (i = 0; i < 32; i++, data++)
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if (__get_user(task->thread.evr[i], data))
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return -EFAULT;
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/* copy ACC */
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if (__get_user64(task->thread.acc, (unsigned long long*)data))
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return -EFAULT;
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return 0;
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}
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#endif /* CONFIG_SPE */
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#endif /* _POWERPC_PTRACE_PPC32_H */
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@ -0,0 +1,51 @@
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/*
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* Copyright (c) 2002 Stephen Rothwell, IBM Coproration
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* Extracted from ptrace.c and ptrace32.c
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file README.legal in the main directory of
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* this archive for more details.
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*/
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#ifndef _POWERPC_PTRACE_PPC64_H
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#define _POWERPC_PTRACE_PPC64_H
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/*
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* Set of msr bits that gdb can change on behalf of a process.
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*/
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#define MSR_DEBUGCHANGE (MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1)
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/*
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* Max register writeable via put_reg
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*/
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#define PT_MAX_PUT_REG PT_CCR
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/*
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* Munging of MSR on return from get_regs
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*
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* Put the correct FP bits in, they might be wrong as a result
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* of our lazy FP restore.
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*/
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#define PT_MUNGE_MSR(msr, task) ({ (msr) | (task)->thread.fpexc_mode; })
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static inline int ptrace_set_debugreg(struct task_struct *task,
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unsigned long addr, unsigned long data)
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{
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/* We only support one DABR and no IABRS at the moment */
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if (addr > 0)
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return -EINVAL;
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/* The bottom 3 bits are flags */
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if ((data & ~0x7UL) >= TASK_SIZE)
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return -EIO;
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/* Ensure translation is on */
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if (data && !(data & DABR_TRANSLATION))
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return -EIO;
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task->thread.dabr = data;
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return 0;
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}
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#endif /* _POWERPC_PTRACE_PPC64_H */
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@ -36,208 +36,18 @@
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#include <asm/system.h>
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#ifdef CONFIG_PPC64
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#include "ptrace-common.h"
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#include "ptrace-ppc64.h"
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#else
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#include "ptrace-ppc32.h"
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#endif
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#ifdef CONFIG_PPC32
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/*
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* Set of msr bits that gdb can change on behalf of a process.
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*/
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#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
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#define MSR_DEBUGCHANGE 0
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#else
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#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
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#endif
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#endif /* CONFIG_PPC32 */
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#include "ptrace-common.h"
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/*
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* does not yet catch signals sent when the child dies.
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* in exit.c or in signal.c.
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*/
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#ifdef CONFIG_PPC32
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/*
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* Get contents of register REGNO in task TASK.
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*/
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static inline unsigned long get_reg(struct task_struct *task, int regno)
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{
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if (regno < sizeof(struct pt_regs) / sizeof(unsigned long)
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&& task->thread.regs != NULL)
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return ((unsigned long *)task->thread.regs)[regno];
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return (0);
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}
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/*
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* Write contents of register REGNO in task TASK.
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*/
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static inline int put_reg(struct task_struct *task, int regno,
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unsigned long data)
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{
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if (regno <= PT_MQ && task->thread.regs != NULL) {
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if (regno == PT_MSR)
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data = (data & MSR_DEBUGCHANGE)
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| (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
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((unsigned long *)task->thread.regs)[regno] = data;
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return 0;
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}
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return -EIO;
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}
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#ifdef CONFIG_ALTIVEC
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/*
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* Get contents of AltiVec register state in task TASK
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*/
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static inline int get_vrregs(unsigned long __user *data, struct task_struct *task)
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{
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int i, j;
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if (!access_ok(VERIFY_WRITE, data, 133 * sizeof(unsigned long)))
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return -EFAULT;
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/* copy AltiVec registers VR[0] .. VR[31] */
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for (i = 0; i < 32; i++)
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for (j = 0; j < 4; j++, data++)
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if (__put_user(task->thread.vr[i].u[j], data))
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return -EFAULT;
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/* copy VSCR */
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for (i = 0; i < 4; i++, data++)
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if (__put_user(task->thread.vscr.u[i], data))
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return -EFAULT;
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/* copy VRSAVE */
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if (__put_user(task->thread.vrsave, data))
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return -EFAULT;
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return 0;
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}
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/*
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* Write contents of AltiVec register state into task TASK.
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*/
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static inline int set_vrregs(struct task_struct *task, unsigned long __user *data)
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{
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int i, j;
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if (!access_ok(VERIFY_READ, data, 133 * sizeof(unsigned long)))
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return -EFAULT;
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/* copy AltiVec registers VR[0] .. VR[31] */
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for (i = 0; i < 32; i++)
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for (j = 0; j < 4; j++, data++)
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if (__get_user(task->thread.vr[i].u[j], data))
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return -EFAULT;
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/* copy VSCR */
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for (i = 0; i < 4; i++, data++)
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if (__get_user(task->thread.vscr.u[i], data))
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return -EFAULT;
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/* copy VRSAVE */
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if (__get_user(task->thread.vrsave, data))
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return -EFAULT;
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return 0;
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}
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#endif
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#ifdef CONFIG_SPE
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/*
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* For get_evrregs/set_evrregs functions 'data' has the following layout:
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*
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* struct {
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* u32 evr[32];
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* u64 acc;
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* u32 spefscr;
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* }
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*/
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/*
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* Get contents of SPE register state in task TASK.
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*/
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static inline int get_evrregs(unsigned long *data, struct task_struct *task)
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{
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int i;
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if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(unsigned long)))
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return -EFAULT;
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/* copy SPEFSCR */
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if (__put_user(task->thread.spefscr, &data[34]))
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return -EFAULT;
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/* copy SPE registers EVR[0] .. EVR[31] */
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for (i = 0; i < 32; i++, data++)
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if (__put_user(task->thread.evr[i], data))
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return -EFAULT;
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/* copy ACC */
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if (__put_user64(task->thread.acc, (unsigned long long *)data))
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return -EFAULT;
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return 0;
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}
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/*
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* Write contents of SPE register state into task TASK.
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*/
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static inline int set_evrregs(struct task_struct *task, unsigned long *data)
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{
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int i;
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if (!access_ok(VERIFY_READ, data, 35 * sizeof(unsigned long)))
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return -EFAULT;
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/* copy SPEFSCR */
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if (__get_user(task->thread.spefscr, &data[34]))
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return -EFAULT;
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/* copy SPE registers EVR[0] .. EVR[31] */
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for (i = 0; i < 32; i++, data++)
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if (__get_user(task->thread.evr[i], data))
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return -EFAULT;
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/* copy ACC */
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if (__get_user64(task->thread.acc, (unsigned long long*)data))
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return -EFAULT;
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return 0;
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}
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#endif /* CONFIG_SPE */
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static inline void
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set_single_step(struct task_struct *task)
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{
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struct pt_regs *regs = task->thread.regs;
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|
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if (regs != NULL) {
|
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#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
|
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task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC;
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regs->msr |= MSR_DE;
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#else
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regs->msr |= MSR_SE;
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#endif
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}
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set_tsk_thread_flag(task, TIF_SINGLESTEP);
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}
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static inline void
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clear_single_step(struct task_struct *task)
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{
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struct pt_regs *regs = task->thread.regs;
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|
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if (regs != NULL) {
|
||||
#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
|
||||
task->thread.dbcr0 = 0;
|
||||
regs->msr &= ~MSR_DE;
|
||||
#else
|
||||
regs->msr &= ~MSR_SE;
|
||||
#endif
|
||||
}
|
||||
clear_tsk_thread_flag(task, TIF_SINGLESTEP);
|
||||
}
|
||||
#endif /* CONFIG_PPC32 */
|
||||
|
||||
/*
|
||||
* Called by kernel/ptrace.c when detaching..
|
||||
*
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@
|
|||
#include <asm/pgtable.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
#include "ptrace-ppc64.h"
|
||||
#include "ptrace-common.h"
|
||||
|
||||
/*
|
||||
|
|
|
|||
Reference in New Issue