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drm/radeon/kms: Fix irq handling on AVIVO hw 

Avivo hw have vblank interrupt in different place, fixes
irq handling (especialy irq disabling while suspending or
shuting down the module).

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Jerome Glisse 2009-09-30 22:18:43 +02:00 committed by Dave Airlie
parent e7d40b9a0a
commit ac447df4f2
5 changed files with 19 additions and 6 deletions
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2
drivers/gpu/drm/radeon/r520.c
View File

@ -186,7 +186,7 @@ static int r520_startup(struct radeon_device *rdev)
}
/* Enable IRQ */
rdev->irq.sw_int = true;
r100_irq_set(rdev);
rs600_irq_set(rdev);
/* 1M ring buffer */
r = r100_cp_init(rdev, 1024 * 1024);
if (r) {

2
drivers/gpu/drm/radeon/radeon.h
View File

@ -1064,6 +1064,8 @@ extern void rs400_gart_fini(struct radeon_device *rdev);
/* rs600 */
extern void rs600_set_safe_registers(struct radeon_device *rdev);
extern int rs600_irq_set(struct radeon_device *rdev);
extern void rs600_irq_disable(struct radeon_device *rdev);
/* rs690, rs740 */
extern void rs690_line_buffer_adjust(struct radeon_device *rdev,

13
drivers/gpu/drm/radeon/rs600.c
View File

@ -229,6 +229,17 @@ static inline uint32_t rs600_irq_ack(struct radeon_device *rdev, u32 *r500_disp_
return irqs & irq_mask;
}
void rs600_irq_disable(struct radeon_device *rdev)
{
u32 tmp;
WREG32(R_000040_GEN_INT_CNTL, 0);
WREG32(R_006540_DxMODE_INT_MASK, 0);
/* Wait and acknowledge irq */
mdelay(1);
rs600_irq_ack(rdev, &tmp);
}
int rs600_irq_process(struct radeon_device *rdev)
{
uint32_t status;
@ -403,7 +414,7 @@ int rs600_suspend(struct radeon_device *rdev)
{
r100_cp_disable(rdev);
r100_wb_disable(rdev);
r100_irq_disable(rdev);
rs600_irq_disable(rdev);
rs600_gart_disable(rdev);
return 0;
}

4
drivers/gpu/drm/radeon/rs690.c
View File

@ -606,7 +606,7 @@ static int rs690_startup(struct radeon_device *rdev)
return r;
/* Enable IRQ */
rdev->irq.sw_int = true;
r100_irq_set(rdev);
rs600_irq_set(rdev);
/* 1M ring buffer */
r = r100_cp_init(rdev, 1024 * 1024);
if (r) {
@ -647,7 +647,7 @@ int rs690_suspend(struct radeon_device *rdev)
{
r100_cp_disable(rdev);
r100_wb_disable(rdev);
r100_irq_disable(rdev);
rs600_irq_disable(rdev);
rs400_gart_disable(rdev);
return 0;
}

4
drivers/gpu/drm/radeon/rv515.c
View File

@ -478,7 +478,7 @@ static int rv515_startup(struct radeon_device *rdev)
}
/* Enable IRQ */
rdev->irq.sw_int = true;
r100_irq_set(rdev);
rs600_irq_set(rdev);
/* 1M ring buffer */
r = r100_cp_init(rdev, 1024 * 1024);
if (r) {
@ -520,7 +520,7 @@ int rv515_suspend(struct radeon_device *rdev)
{
r100_cp_disable(rdev);
r100_wb_disable(rdev);
r100_irq_disable(rdev);
rs600_irq_disable(rdev);
if (rdev->flags & RADEON_IS_PCIE)
rv370_pcie_gart_disable(rdev);
return 0;