x86: prevent C-states hang on AMD C1E enabled machines
Impact: System hang when AMD C1E machines switch into C2/C3 AMD C1E enabled systems do not work with normal ACPI C-states even if the BIOS is advertising them. Limit the C-states to C1 for the ACPI processor idle code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -272,6 +272,7 @@ static void c1e_idle(void)
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c1e_detected = 1;
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c1e_detected = 1;
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mark_tsc_unstable("TSC halt in C1E");
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mark_tsc_unstable("TSC halt in C1E");
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printk(KERN_INFO "System has C1E enabled\n");
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printk(KERN_INFO "System has C1E enabled\n");
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set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
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}
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}
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}
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}
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@ -140,6 +140,8 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
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boot_cpu_data.x86_model <= 0x05 &&
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boot_cpu_data.x86_model <= 0x05 &&
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boot_cpu_data.x86_mask < 0x0A)
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boot_cpu_data.x86_mask < 0x0A)
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return 1;
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return 1;
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else if (boot_cpu_has(X86_FEATURE_AMDC1E))
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return 1;
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else
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else
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return max_cstate;
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return max_cstate;
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}
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}
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@ -81,6 +81,7 @@
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#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */
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#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */
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#define X86_FEATURE_11AP (3*32+19) /* Bad local APIC aka 11AP */
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#define X86_FEATURE_11AP (3*32+19) /* Bad local APIC aka 11AP */
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#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */
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#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */
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#define X86_FEATURE_AMDC1E (3*32+21) /* AMD C1E detected */
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/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
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/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
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#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
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#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
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