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dect: coa: fix firmware for PCMCIA devices

Reduce the size by merging the Receive- and ReceiveSync paths and
re-enable a few instructions necessary for the PCMCIA device.

Signed-off-by: Patrick McHardy <kaber@trash.net>
This commit is contained in:
Patrick McHardy 2011-10-05 17:10:27 +02:00
parent 84962a1aa0
commit a6f3c814f9
3 changed files with 65 additions and 67 deletions

View File

@ -227,18 +227,23 @@ WriteBMC2: B_WRS SD_BASE_OFF ; write status
label_58: B_RST
P_LDL PB_RX_ON | PB_TX_ON
RTN
;-------------------------------------------------------------------------------
; Enable the receiver, receive the S-field and the first 61 bits of the D-field
; (93 bits total)
;
Receive: B_RST
ReceiveInit: B_RST
B_RC BMC_CTRL
WT BMC_CTRL_SIZE + 1
P_LDH PB_RX_ON
P_LDL PB_RSSI ; enable RSSI measurement
WT 25
WNT 1 ; Wait until beginning of slot |
WT 8 ; | p: -33--26
WT 7 ; | p: -33--26
RTN
;-------------------------------------------------------------------------------
; Enable the receiver, receive the S-field and the first 61 bits of the D-field
; (93 bits total)
;
Receive: JMP ReceiveInit
B_XON ; | p: -25
ClockSyncOn: P_SC PSC_S_SYNC_ON ; | p: -24
P_LDH PB_DCTHRESHOLD ; | p: -23
@ -253,14 +258,7 @@ ClockSyncOff: P_SC 0x00 ; | p: 30 S: 46
WT 62 ; Receive first 61 bits of A-field | p: 32-92 A: 0-60
RTN ; Return | p: 93 A: 61
ReceiveSync: B_RST
B_RC BMC_CTRL
WT BMC_CTRL_SIZE + 1
P_LDH PB_RX_ON
P_LDL PB_RSSI ; enable RSSI measurement
WT 25
WNT 1 ; Wait until beginning of slot |
WT 8 ; | p: -33--26
ReceiveSync: JMP ReceiveInit
B_XON ; | p: -25
P_SC PSC_S_SYNC_ON ; | p: -24
P_LDH PB_DCTHRESHOLD ; | p: -23
@ -400,12 +398,12 @@ InitDIP: ;B_RST
WT 10
;B_RC BMC_CTRL
;WT BMC_CTRL_SIZE + 1
B_RST
;C_ON
;B_RST
C_ON
WT 10
P_EN
P_LD 0x04
;RCK_INT
RCK_INT
RFEN
RFStart: BR SyncInit
;-------------------------------------------------------------

View File

@ -7,7 +7,7 @@
#include "sc1442x_firmware.h"
const unsigned char sc1442x_firmware[] = {
0x01, 0x01, 0x01, 0xf4, 0x0d, 0x00, 0x09, 0x01,
0x01, 0x01, 0x01, 0xf3, 0x0d, 0x00, 0x09, 0x01,
0x08, 0x01, 0x09, 0x01, 0x08, 0x01, 0x09, 0x01,
0x08, 0x01, 0x09, 0x01, 0x08, 0x01, 0x09, 0x01,
0x08, 0x01, 0x09, 0x01, 0x08, 0x01, 0x61, 0x00,
@ -21,16 +21,16 @@ const unsigned char sc1442x_firmware[] = {
0x09, 0x01, 0x08, 0x01, 0x09, 0x01, 0x08, 0x01,
0x09, 0x01, 0x08, 0x01, 0x09, 0x01, 0x08, 0x01,
0x09, 0x01, 0x08, 0x01, 0x6f, 0x00, 0x01, 0x02,
0x02, 0x7b, 0x2d, 0x0e, 0x02, 0xa7, 0x01, 0x6f,
0x02, 0x90, 0x01, 0x39, 0x02, 0xcc, 0x02, 0x7b,
0x2d, 0x0e, 0x02, 0xa5, 0x01, 0x76, 0x02, 0xcc,
0x02, 0x7b, 0x3c, 0x0e, 0x02, 0x63, 0x09, 0x0e,
0x2b, 0x00, 0x02, 0xa7, 0x01, 0x76, 0x02, 0xaa,
0x02, 0xb9, 0x01, 0x71, 0x02, 0xcc, 0x02, 0xaa,
0x25, 0x0e, 0x02, 0xb6, 0x01, 0x72, 0x02, 0xcc,
0x02, 0xaa, 0x34, 0x0e, 0x09, 0x03, 0x02, 0x63,
0x02, 0x84, 0x2d, 0x0e, 0x02, 0xa2, 0x01, 0x6f,
0x02, 0x92, 0x01, 0x39, 0x02, 0xcb, 0x02, 0x84,
0x2d, 0x0e, 0x02, 0xa0, 0x01, 0x76, 0x02, 0xcb,
0x02, 0x84, 0x3c, 0x0e, 0x02, 0x63, 0x09, 0x0e,
0x2b, 0x00, 0x02, 0xa2, 0x01, 0x76, 0x02, 0xa5,
0x02, 0xb4, 0x01, 0x71, 0x02, 0xcb, 0x02, 0xa5,
0x25, 0x0e, 0x02, 0xb1, 0x01, 0x72, 0x02, 0xcb,
0x02, 0xa5, 0x34, 0x0e, 0x09, 0x03, 0x02, 0x63,
0x09, 0x0b, 0x24, 0x00, 0x09, 0x0d, 0x20, 0x00,
0x02, 0xb9, 0x01, 0x78, 0x09, 0x2d, 0x27, 0x00,
0x02, 0xb4, 0x01, 0x78, 0x09, 0x2d, 0x27, 0x00,
0x09, 0x0f, 0x26, 0x00, 0x04, 0x00, 0x02, 0x5e,
0x02, 0x5e, 0x02, 0x5e, 0x02, 0x5e, 0x02, 0x5e,
0x02, 0x5e, 0x02, 0x5e, 0x02, 0x5e, 0x02, 0x5e,
@ -39,35 +39,35 @@ const unsigned char sc1442x_firmware[] = {
0x08, 0x01, 0x04, 0x00, 0x39, 0x00, 0x09, 0x06,
0x20, 0x00, 0xec, 0x50, 0x04, 0x00, 0x20, 0x00,
0x33, 0x69, 0x09, 0x08, 0xed, 0x40, 0xec, 0x01,
0x09, 0x19, 0x08, 0x01, 0x09, 0x08, 0x27, 0x00,
0x09, 0x19, 0x08, 0x01, 0x09, 0x07, 0x04, 0x00,
0x02, 0x7b, 0x27, 0x00, 0xea, 0x20, 0xed, 0x02,
0x09, 0x05, 0x29, 0x00, 0x2c, 0x00, 0x09, 0x0c,
0xec, 0x02, 0x09, 0x20, 0xea, 0x00, 0x3f, 0x06,
0x09, 0x3e, 0x04, 0x00, 0x02, 0x7b, 0x27, 0x00,
0xea, 0x20, 0xed, 0x02, 0x09, 0x05, 0x29, 0x00,
0x2c, 0x00, 0x09, 0x0c, 0xec, 0x02, 0x09, 0x20,
0xea, 0x00, 0x3f, 0x06, 0x09, 0x3e, 0x04, 0x00,
0x20, 0x00, 0x33, 0x69, 0x09, 0x08, 0xed, 0x40,
0xec, 0x01, 0x09, 0x19, 0x08, 0x01, 0x09, 0x08,
0x27, 0x00, 0xea, 0x20, 0xed, 0x02, 0x09, 0x05,
0x29, 0x00, 0x2c, 0x00, 0x09, 0x0c, 0xec, 0x02,
0x09, 0x20, 0xea, 0x00, 0x3f, 0x06, 0x09, 0x3d,
0x04, 0x00, 0x09, 0xf9, 0x09, 0x4f, 0xed, 0x01,
0xec, 0x40, 0x01, 0xd4, 0xed, 0x00, 0x09, 0x28,
0x20, 0x00, 0x33, 0x69, 0x08, 0x01, 0x31, 0x00,
0x09, 0x01, 0xed, 0x10, 0x09, 0x25, 0x37, 0x06,
0x09, 0x3e, 0x04, 0x00, 0x09, 0xf9, 0x09, 0x54,
0x20, 0x00, 0xec, 0x10, 0x09, 0x08, 0xec, 0x00,
0x01, 0xd4, 0x0b, 0x00, 0x09, 0x02, 0xa4, 0x00,
0xb9, 0x65, 0x09, 0x19, 0xa9, 0x00, 0xa5, 0x00,
0xa4, 0x00, 0xb9, 0x68, 0x09, 0x0a, 0xa9, 0x00,
0xa5, 0x00, 0xec, 0x20, 0x09, 0x0a, 0x04, 0x00,
0x40, 0x00, 0x50, 0x70, 0x09, 0x10, 0x50, 0x00,
0x44, 0x00, 0x09, 0x27, 0x44, 0x00, 0x04, 0x00,
0x5f, 0x70, 0x09, 0x0b, 0x5f, 0x00, 0x40, 0x00,
0x04, 0x00, 0x40, 0x00, 0x57, 0x70, 0x09, 0x0b,
0x57, 0x00, 0x04, 0x00, 0x0f, 0x20, 0x02, 0xbd,
0x09, 0xfa, 0xea, 0x20, 0xed, 0x42, 0x28, 0x00,
0x09, 0x40, 0x26, 0x00, 0x29, 0x00, 0x08, 0x14,
0x03, 0xed, 0x20, 0x00, 0x6b, 0x00, 0x08, 0x17,
0x01, 0xdf, 0x08, 0x17, 0xea, 0x00, 0x02, 0xbd,
0x02, 0x38, 0x61, 0x00, 0x08, 0x16, 0x01, 0xdf,
0x0f, 0x00, 0xfa, 0x10, 0x09, 0x0a, 0x20, 0x00,
0x09, 0x0a, 0xe9, 0x00, 0xe8, 0x04, 0x0b, 0x00,
0x01, 0xde, 0xff, 0xff, 0xff, 0xff};
0xea, 0x00, 0x3f, 0x06, 0x09, 0x3d, 0x04, 0x00,
0x09, 0xf9, 0x09, 0x4f, 0xed, 0x01, 0xec, 0x40,
0x01, 0xd3, 0xed, 0x00, 0x09, 0x28, 0x20, 0x00,
0x33, 0x69, 0x08, 0x01, 0x31, 0x00, 0x09, 0x01,
0xed, 0x10, 0x09, 0x25, 0x37, 0x06, 0x09, 0x3e,
0x04, 0x00, 0x09, 0xf9, 0x09, 0x54, 0x20, 0x00,
0xec, 0x10, 0x09, 0x08, 0xec, 0x00, 0x01, 0xd3,
0x0b, 0x00, 0x09, 0x02, 0xa4, 0x00, 0xb9, 0x65,
0x09, 0x19, 0xa9, 0x00, 0xa5, 0x00, 0xa4, 0x00,
0xb9, 0x68, 0x09, 0x0a, 0xa9, 0x00, 0xa5, 0x00,
0xec, 0x20, 0x09, 0x0a, 0xa7, 0x00, 0x09, 0xb6,
0xa6, 0x00, 0x09, 0x10, 0x04, 0x00, 0x40, 0x00,
0x50, 0x70, 0x09, 0x10, 0x50, 0x00, 0x44, 0x00,
0x09, 0x27, 0x44, 0x00, 0x04, 0x00, 0x5f, 0x70,
0x09, 0x0b, 0x5f, 0x00, 0x40, 0x00, 0x04, 0x00,
0x40, 0x00, 0x57, 0x70, 0x09, 0x0b, 0x57, 0x00,
0x04, 0x00, 0x0f, 0x20, 0x02, 0xb8, 0x09, 0xfa,
0xea, 0x20, 0xed, 0x42, 0x28, 0x00, 0x09, 0x40,
0x26, 0x00, 0x29, 0x00, 0x08, 0x14, 0x03, 0xec,
0x20, 0x00, 0x6b, 0x00, 0x08, 0x17, 0x01, 0xde,
0x08, 0x17, 0xea, 0x00, 0x02, 0xb8, 0x02, 0x38,
0x61, 0x00, 0x08, 0x16, 0x01, 0xde, 0x0f, 0x00,
0xfa, 0x10, 0x09, 0x0a, 0xee, 0x00, 0x09, 0x0a,
0xe9, 0x00, 0xe8, 0x04, 0x62, 0x00, 0x0b, 0x00,
0x01, 0xdd, 0xff, 0xff, 0xff, 0xff};

View File

@ -37,14 +37,14 @@ extern const unsigned char sc1442x_firmware[510];
#define Slot22 0x32
#define Slot23 0x34
#define RFStart 0xFC
#define RFInit 0xBD
#define SyncInit 0xDE
#define Sync 0xDF
#define SyncLock 0xEF
#define SyncLoop 0xF3
#define ClockSyncOn 0x84
#define ClockSyncOff 0x8C
#define ClockAdjust 0x88
#define RFInit 0xB8
#define SyncInit 0xDD
#define Sync 0xDE
#define SyncLock 0xEE
#define SyncLoop 0xF2
#define ClockSyncOn 0x86
#define ClockSyncOff 0x8E
#define ClockAdjust 0x8A
#define PSC_ARPD1 0x80
#define PSC_S_SYNC 0x40
#define PSC_S_SYNC_ON 0x20
@ -64,7 +64,7 @@ extern const unsigned char sc1442x_firmware[510];
#define DCS_CK 0x78
#define DCS_STATE 0x70
#define DCS_STATE_SIZE 0xB
#define LoadEncKey 0xCC
#define LoadEncState 0xD9
#define LoadEncKey 0xCB
#define LoadEncState 0xD8
#endif /* SC1442X_FIRMWARE */