OMAP2xxx: clock: fix clockdomains on gpt7_ick, 2430 mmchs2_fck clocks
Add a clockdomain to the GPTIMER7 interface and 2430 HSMMC2 functional clocks - both were previously missing them. Also, the 2430 mmchs1_fck is in core_l3_clkdm, but should be in core_l4_clkdm; fix this. Signed-off-by: Paul Walmsley <paul@pwsan.com>
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691abf525d
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2 changed files with 4 additions and 1 deletions
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@ -987,6 +987,7 @@ static struct clk gpt7_ick = {
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.name = "gpt7_ick",
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.ops = &clkops_omap2_iclk_dflt_wait,
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.parent = &l4_ck,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
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.enable_bit = OMAP24XX_EN_GPT7_SHIFT,
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.recalc = &followparent_recalc,
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@ -975,6 +975,7 @@ static struct clk gpt7_ick = {
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.name = "gpt7_ick",
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.ops = &clkops_omap2_iclk_dflt_wait,
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.parent = &l4_ck,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
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.enable_bit = OMAP24XX_EN_GPT7_SHIFT,
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.recalc = &followparent_recalc,
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@ -1747,7 +1748,7 @@ static struct clk mmchs1_fck = {
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.name = "mmchs1_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &func_96m_ck,
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.clkdm_name = "core_l3_clkdm",
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
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.enable_bit = OMAP2430_EN_MMCHS1_SHIFT,
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.recalc = &followparent_recalc,
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@ -1767,6 +1768,7 @@ static struct clk mmchs2_fck = {
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.name = "mmchs2_fck",
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.ops = &clkops_omap2_dflt_wait,
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.parent = &func_96m_ck,
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.clkdm_name = "core_l4_clkdm",
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.enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2),
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.enable_bit = OMAP2430_EN_MMCHS2_SHIFT,
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.recalc = &followparent_recalc,
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