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USB: io_edgeport: checkpatch cleanups

Minor whitespace cleanups to make checkpatch happy.

Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Greg Kroah-Hartman 2010-05-17 10:33:41 -07:00
parent 3bb36aa266
commit a320471147
4 changed files with 141 additions and 145 deletions

View File

@ -196,7 +196,8 @@ struct int_status_pkt {
#define MAKE_CMD_WRITE_REG(ppBuf, pLen, Port, Reg, Val) \ #define MAKE_CMD_WRITE_REG(ppBuf, pLen, Port, Reg, Val) \
do { \ do { \
(*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1( (Port), IOSP_WRITE_UART_REG(Reg) ); \ (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), \
IOSP_WRITE_UART_REG(Reg)); \
(*(ppBuf))[1] = (Val); \ (*(ppBuf))[1] = (Val); \
\ \
*ppBuf += 2; \ *ppBuf += 2; \

View File

@ -22,7 +22,7 @@
#define DTK_ADDR_SPACE_I2C_TYPE_II 0x82 /* Addr is placed in I2C area */ #define DTK_ADDR_SPACE_I2C_TYPE_II 0x82 /* Addr is placed in I2C area */
#define DTK_ADDR_SPACE_I2C_TYPE_III 0x83 /* Addr is placed in I2C area */ #define DTK_ADDR_SPACE_I2C_TYPE_III 0x83 /* Addr is placed in I2C area */
// UART Defines /* UART Defines */
#define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */ #define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */
#define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */ #define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */
#define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */ #define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */
@ -79,10 +79,10 @@
#define UMP_PORT_DIR_OUT 0x01 #define UMP_PORT_DIR_OUT 0x01
#define UMP_PORT_DIR_IN 0x02 #define UMP_PORT_DIR_IN 0x02
// Address of Port 0 /* Address of Port 0 */
#define UMPM_UART1_PORT 0x03 #define UMPM_UART1_PORT 0x03
// Commands /* Commands */
#define UMPC_SET_CONFIG 0x05 #define UMPC_SET_CONFIG 0x05
#define UMPC_OPEN_PORT 0x06 #define UMPC_OPEN_PORT 0x06
#define UMPC_CLOSE_PORT 0x07 #define UMPC_CLOSE_PORT 0x07
@ -91,32 +91,39 @@
#define UMPC_TEST_PORT 0x0A #define UMPC_TEST_PORT 0x0A
#define UMPC_PURGE_PORT 0x0B #define UMPC_PURGE_PORT 0x0B
#define UMPC_COMPLETE_READ 0x80 // Force the Firmware to complete the current Read /* Force the Firmware to complete the current Read */
#define UMPC_HARDWARE_RESET 0x81 // Force UMP back into BOOT Mode #define UMPC_COMPLETE_READ 0x80
#define UMPC_COPY_DNLD_TO_I2C 0x82 // Copy current download image to type 0xf2 record in 16k I2C /* Force UMP back into BOOT Mode */
// firmware will change 0xff record to type 2 record when complete #define UMPC_HARDWARE_RESET 0x81
/*
* Copy current download image to type 0xf2 record in 16k I2C
* firmware will change 0xff record to type 2 record when complete
*/
#define UMPC_COPY_DNLD_TO_I2C 0x82
// Special function register commands /*
// wIndex is register address * Special function register commands
// wValue is MSB/LSB mask/data * wIndex is register address
#define UMPC_WRITE_SFR 0x83 // Write SFR Register * wValue is MSB/LSB mask/data
*/
#define UMPC_WRITE_SFR 0x83 /* Write SFR Register */
// wIndex is register address /* wIndex is register address */
#define UMPC_READ_SFR 0x84 // Read SRF Register #define UMPC_READ_SFR 0x84 /* Read SRF Register */
// Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port) /* Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
#define UMPC_SET_CLR_DTR 0x85 #define UMPC_SET_CLR_DTR 0x85
// Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port) /* Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
#define UMPC_SET_CLR_RTS 0x86 #define UMPC_SET_CLR_RTS 0x86
// Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) /* Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
#define UMPC_SET_CLR_LOOPBACK 0x87 #define UMPC_SET_CLR_LOOPBACK 0x87
// Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port) /* Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */
#define UMPC_SET_CLR_BREAK 0x88 #define UMPC_SET_CLR_BREAK 0x88
// Read MSR wIndex ModuleID (port) /* Read MSR wIndex ModuleID (port) */
#define UMPC_READ_MSR 0x89 #define UMPC_READ_MSR 0x89
/* Toolkit commands */ /* Toolkit commands */
@ -130,8 +137,7 @@
#define UMPD_OEDB1_ADDRESS 0xFF08 #define UMPD_OEDB1_ADDRESS 0xFF08
#define UMPD_OEDB2_ADDRESS 0xFF10 #define UMPD_OEDB2_ADDRESS 0xFF10
struct out_endpoint_desc_block struct out_endpoint_desc_block {
{
__u8 Configuration; __u8 Configuration;
__u8 XBufAddr; __u8 XBufAddr;
__u8 XByteCount; __u8 XByteCount;
@ -147,8 +153,8 @@ struct out_endpoint_desc_block
* TYPE DEFINITIONS * TYPE DEFINITIONS
* Structures for Firmware commands * Structures for Firmware commands
*/ */
struct ump_uart_config /* UART settings */ /* UART settings */
{ struct ump_uart_config {
__u16 wBaudRate; /* Baud rate */ __u16 wBaudRate; /* Baud rate */
__u16 wFlags; /* Bitmap mask of flags */ __u16 wFlags; /* Bitmap mask of flags */
__u8 bDataBits; /* 5..8 - data bits per character */ __u8 bDataBits; /* 5..8 - data bits per character */
@ -165,8 +171,8 @@ struct ump_uart_config /* UART settings */
* TYPE DEFINITIONS * TYPE DEFINITIONS
* Structures for USB interrupts * Structures for USB interrupts
*/ */
struct ump_interrupt /* Interrupt packet structure */ /* Interrupt packet structure */
{ struct ump_interrupt {
__u8 bICode; /* Interrupt code (interrupt num) */ __u8 bICode; /* Interrupt code (interrupt num) */
__u8 bIInfo; /* Interrupt information */ __u8 bIInfo; /* Interrupt information */
} __attribute__((packed)); } __attribute__((packed));

View File

@ -301,8 +301,7 @@
// this is a "real" Edgeport. // this is a "real" Edgeport.
// //
struct edge_compatibility_bits struct edge_compatibility_bits {
{
// This __u32 defines which Vendor-specific commands/functionality // This __u32 defines which Vendor-specific commands/functionality
// the device supports on the default EP0 pipe. // the device supports on the default EP0 pipe.
@ -334,15 +333,13 @@ struct edge_compatibility_bits
__u32 TrueEdgeport : 1; // 0001 Set if device is a 'real' Edgeport __u32 TrueEdgeport : 1; // 0001 Set if device is a 'real' Edgeport
// (Used only by driver, NEVER set by an EPiC device) // (Used only by driver, NEVER set by an EPiC device)
__u32 GenUnused : 31; // Available for future expansion, must be 0 __u32 GenUnused : 31; // Available for future expansion, must be 0
}; };
#define EDGE_COMPATIBILITY_MASK0 0x0001 #define EDGE_COMPATIBILITY_MASK0 0x0001
#define EDGE_COMPATIBILITY_MASK1 0x3FFF #define EDGE_COMPATIBILITY_MASK1 0x3FFF
#define EDGE_COMPATIBILITY_MASK2 0x0001 #define EDGE_COMPATIBILITY_MASK2 0x0001
struct edge_compatibility_descriptor struct edge_compatibility_descriptor {
{
__u8 Length; // Descriptor Length (per USB spec) __u8 Length; // Descriptor Length (per USB spec)
__u8 DescType; // Descriptor Type (per USB spec, =DEVICE type) __u8 DescType; // Descriptor Type (per USB spec, =DEVICE type)
__u8 EpicVer; // Version of EPiC spec supported __u8 EpicVer; // Version of EPiC spec supported
@ -359,9 +356,7 @@ struct edge_compatibility_descriptor
// The following structure contains __u32s, with each bit // The following structure contains __u32s, with each bit
// specifying whether the EPiC device supports the given // specifying whether the EPiC device supports the given
// command or functionality. // command or functionality.
struct edge_compatibility_bits Supports; struct edge_compatibility_bits Supports;
}; };
// Values for iDownloadFile // Values for iDownloadFile
@ -597,8 +592,7 @@ struct edge_boot_descriptor {
#define I2C_DESC_TYPE_ION 0 // Not defined by TI #define I2C_DESC_TYPE_ION 0 // Not defined by TI
struct ti_i2c_desc struct ti_i2c_desc {
{
__u8 Type; // Type of descriptor __u8 Type; // Type of descriptor
__u16 Size; // Size of data only not including header __u16 Size; // Size of data only not including header
__u8 CheckSum; // Checksum (8 bit sum of data only) __u8 CheckSum; // Checksum (8 bit sum of data only)
@ -607,16 +601,14 @@ struct ti_i2c_desc
// for 5152 devices only (type 2 record) // for 5152 devices only (type 2 record)
// for 3410 the version is stored in the WATCHPORT_FIRMWARE_VERSION descriptor // for 3410 the version is stored in the WATCHPORT_FIRMWARE_VERSION descriptor
struct ti_i2c_firmware_rec struct ti_i2c_firmware_rec {
{
__u8 Ver_Major; // Firmware Major version number __u8 Ver_Major; // Firmware Major version number
__u8 Ver_Minor; // Firmware Minor version number __u8 Ver_Minor; // Firmware Minor version number
__u8 Data[0]; // Download starts here __u8 Data[0]; // Download starts here
} __attribute__((packed)); } __attribute__((packed));
struct watchport_firmware_version struct watchport_firmware_version {
{
// Added 2 bytes for version number // Added 2 bytes for version number
__u8 Version_Major; // Download Version (for Watchport) __u8 Version_Major; // Download Version (for Watchport)
__u8 Version_Minor; __u8 Version_Minor;
@ -624,14 +616,12 @@ struct watchport_firmware_version
// Structure of header of download image in fw_down.h // Structure of header of download image in fw_down.h
struct ti_i2c_image_header struct ti_i2c_image_header {
{
__le16 Length; __le16 Length;
__u8 CheckSum; __u8 CheckSum;
} __attribute__((packed)); } __attribute__((packed));
struct ti_basic_descriptor struct ti_basic_descriptor {
{
__u8 Power; // Self powered __u8 Power; // Self powered
// bit 7: 1 - power switching supported // bit 7: 1 - power switching supported
// 0 - power switching not supported // 0 - power switching not supported
@ -676,8 +666,7 @@ struct ti_basic_descriptor
#define TI_CONFIG2_WATCHPORT 0x10 #define TI_CONFIG2_WATCHPORT 0x10
struct edge_ti_manuf_descriptor struct edge_ti_manuf_descriptor {
{
__u8 IonConfig; // Config byte for ION manufacturing use __u8 IonConfig; // Config byte for ION manufacturing use
__u8 IonConfig2; // Expansion __u8 IonConfig2; // Expansion
__u8 Version; // Version __u8 Version; // Version