Merge branch 'kvm-updates/2.6.27' of git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm
* 'kvm-updates/2.6.27' of git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm: KVM: VMX: Always return old for clear_flush_young() when using EPT KVM: SVM: fix guest global tlb flushes with NPT KVM: SVM: fix random segfaults with NPT enabled
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commit
a0a4a2cb0d
4 changed files with 17 additions and 4 deletions
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@ -711,6 +711,10 @@ static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
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u64 *spte;
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int young = 0;
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/* always return old for EPT */
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if (!shadow_accessed_mask)
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return 0;
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spte = rmap_next(kvm, rmapp, NULL);
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while (spte) {
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int _young;
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@ -62,6 +62,7 @@ static int npt = 1;
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module_param(npt, int, S_IRUGO);
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static void kvm_reput_irq(struct vcpu_svm *svm);
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static void svm_flush_tlb(struct kvm_vcpu *vcpu);
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static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
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{
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@ -878,6 +879,10 @@ set:
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static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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{
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unsigned long host_cr4_mce = read_cr4() & X86_CR4_MCE;
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unsigned long old_cr4 = to_svm(vcpu)->vmcb->save.cr4;
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if (npt_enabled && ((old_cr4 ^ cr4) & X86_CR4_PGE))
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force_new_asid(vcpu);
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vcpu->arch.cr4 = cr4;
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if (!npt_enabled)
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@ -1027,6 +1032,13 @@ static int pf_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
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KVMTRACE_3D(TDP_FAULT, &svm->vcpu, error_code,
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(u32)fault_address, (u32)(fault_address >> 32),
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handler);
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/*
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* FIXME: Tis shouldn't be necessary here, but there is a flush
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* missing in the MMU code. Until we find this bug, flush the
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* complete TLB here on an NPF
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*/
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if (npt_enabled)
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svm_flush_tlb(&svm->vcpu);
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if (event_injection)
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kvm_mmu_unprotect_page_virt(&svm->vcpu, fault_address);
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@ -3301,8 +3301,7 @@ static int __init vmx_init(void)
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kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK |
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VMX_EPT_WRITABLE_MASK |
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VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT);
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kvm_mmu_set_mask_ptes(0ull, VMX_EPT_FAKE_ACCESSED_MASK,
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VMX_EPT_FAKE_DIRTY_MASK, 0ull,
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kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull,
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VMX_EPT_EXECUTABLE_MASK);
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kvm_enable_tdp();
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} else
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@ -370,8 +370,6 @@ enum vmcs_field {
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#define VMX_EPT_READABLE_MASK 0x1ull
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#define VMX_EPT_WRITABLE_MASK 0x2ull
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#define VMX_EPT_EXECUTABLE_MASK 0x4ull
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#define VMX_EPT_FAKE_ACCESSED_MASK (1ull << 62)
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#define VMX_EPT_FAKE_DIRTY_MASK (1ull << 63)
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#define VMX_EPT_IDENTITY_PAGETABLE_ADDR 0xfffbc000ul
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