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Merge branch 'sh/pm-runtime' into sh-latest 

Conflicts:
	arch/sh/kernel/cpu/sh4a/clock-sh7723.c

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2012-01-12 12:57:32 +09:00
parent a4d5247310 d3442b2bb7
commit 9f06cf38ec
13 changed files with 196 additions and 857 deletions
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9
arch/sh/include/asm/device.h
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@ -14,15 +14,6 @@ int platform_resource_setup_memory(struct platform_device *pdev,
void plat_early_device_setup(void);
#define PDEV_ARCHDATA_FLAG_INIT 0
#define PDEV_ARCHDATA_FLAG_IDLE 1
#define PDEV_ARCHDATA_FLAG_SUSP 2
struct pdev_archdata {
int hwblk_id;
#ifdef CONFIG_PM_RUNTIME
unsigned long flags;
struct list_head entry;
struct mutex mutex;
#endif
};

7
arch/sh/include/asm/hwblk.h
View File

@ -44,6 +44,9 @@ struct hwblk_info {
int nr_hwblks;
};
#if !defined(CONFIG_CPU_SUBTYPE_SH7722) && \
!defined(CONFIG_CPU_SUBTYPE_SH7723) && \
!defined(CONFIG_CPU_SUBTYPE_SH7724)
/* Should be defined by processor-specific code */
int arch_hwblk_init(void);
int arch_hwblk_sleep_mode(void);
@ -66,5 +69,7 @@ void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt);
}
int sh_hwblk_clk_register(struct clk *clks, int nr);
#else
#define hwblk_init() 0
#endif
#endif /* __ASM_SH_HWBLK_H */

5
arch/sh/kernel/cpu/Makefile
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@ -18,4 +18,7 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
obj-$(CONFIG_SH_ADC) += adc.o
obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
obj-y += irq/ init.o clock.o fpu.o hwblk.o proc.o
obj-y += irq/ init.o clock.o fpu.o proc.o
ifneq ($(CONFIG_CPU_SUBTYPE_SH7722)$(CONFIG_CPU_SUBTYPE_SH7723)$(CONFIG_CPU_SUBTYPE_SH7724),y)
obj-y += hwblk.o
endif

6
arch/sh/kernel/cpu/sh4a/Makefile
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@ -27,9 +27,9 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o
clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o hwblk-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o hwblk-sh7723.o
clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o hwblk-sh7724.o
clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o
clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o
clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o
clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o

73
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
View File

@ -22,8 +22,8 @@
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/sh_clk.h>
#include <asm/clock.h>
#include <asm/hwblk.h>
#include <cpu/sh7722.h>
/* SH7722 registers */
@ -33,6 +33,9 @@
#define SCLKBCR 0xa415000c
#define IRDACLKCR 0xa4150018
#define PLLCR 0xa4150024
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
#define DLLFRQ 0xa4150050
/* Fixed 32 KHz root clock for RTC and Power Management purposes */
@ -148,31 +151,31 @@ struct clk div6_clks[DIV6_NR] = {
};
static struct clk mstp_clks[HWBLK_NR] = {
SH_HWBLK_CLK(HWBLK_URAM, &div4_clks[DIV4_U], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_XYMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_TMU, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
[HWBLK_URAM] = SH_CLK_MSTP32(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
[HWBLK_XYMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
[HWBLK_TMU] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
[HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
[HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
[HWBLK_FLCTL] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0),
[HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0),
[HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 6, 0),
[HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 5, 0),
SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
[HWBLK_IIC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
[HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0),
SH_HWBLK_CLK(HWBLK_SDHI, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
SH_HWBLK_CLK(HWBLK_USBF, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VEU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_P], 0),
[HWBLK_SDHI] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 18, 0),
[HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0),
[HWBLK_USBF] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 11, 0),
[HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 9, 0),
[HWBLK_SIU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 8, 0),
[HWBLK_JPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0),
[HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0),
[HWBLK_BEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0),
[HWBLK_CEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0),
[HWBLK_VEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0),
[HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0),
[HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 0, 0),
};
static struct clk_lookup lookups[] = {
@ -205,27 +208,27 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU]),
CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]),
CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI]),
CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI]),
CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]),
CLKDEV_CON_ID("usbf0", &mstp_clks[HWBLK_USBF]),
CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]),
CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
CLKDEV_DEV_ID("siu-pcm-audio", &mstp_clks[HWBLK_SIU]),
CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]),
CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]),
CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]),
CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU]),
CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU]),
CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]),
};
int __init arch_clk_init(void)
@ -258,7 +261,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR);
return ret;
}

129
arch/sh/kernel/cpu/sh4a/clock-sh7723.c
View File

@ -23,8 +23,8 @@
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/sh_clk.h>
#include <asm/clock.h>
#include <asm/hwblk.h>
#include <cpu/sh7723.h>
/* SH7723 registers */
@ -34,6 +34,9 @@
#define SCLKBCR 0xa415000c
#define IRDACLKCR 0xa4150018
#define PLLCR 0xa4150024
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
#define DLLFRQ 0xa4150050
/* Fixed 32 KHz root clock for RTC and Power Management purposes */
@ -149,55 +152,55 @@ struct clk div6_clks[DIV6_NR] = {
static struct clk mstp_clks[] = {
/* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0),
SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_MERAM, &div4_clks[DIV4_SH], 0),
[HWBLK_TLB] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
[HWBLK_IC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
[HWBLK_OC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
[HWBLK_L2C] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
[HWBLK_ILMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 27, CLK_ENABLE_ON_INIT),
[HWBLK_FPU] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 24, CLK_ENABLE_ON_INIT),
[HWBLK_INTC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 22, CLK_ENABLE_ON_INIT),
[HWBLK_DMAC0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 21, 0),
[HWBLK_SHYWAY] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 20, CLK_ENABLE_ON_INIT),
[HWBLK_HUDI] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 19, 0),
[HWBLK_UBC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 17, 0),
[HWBLK_TMU0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
[HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
[HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
[HWBLK_DMAC1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 12, 0),
[HWBLK_TMU1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 11, 0),
[HWBLK_FLCTL] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0),
[HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0),
[HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0),
[HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0),
[HWBLK_SCIF3] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 6, 0),
[HWBLK_SCIF4] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 5, 0),
[HWBLK_SCIF5] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 4, 0),
[HWBLK_MSIOF0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 2, 0),
[HWBLK_MSIOF1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 1, 0),
[HWBLK_MERAM] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 0, 0),
SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
[HWBLK_IIC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
[HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0),
SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_SH], 0),
SH_HWBLK_CLK(HWBLK_ADC, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_ICB, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
SH_HWBLK_CLK(HWBLK_USB, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VEU2H1, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VEU2H0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
[HWBLK_ATAPI] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR2, 28, 0),
[HWBLK_ADC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 27, 0),
[HWBLK_TPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 25, 0),
[HWBLK_IRDA] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 24, 0),
[HWBLK_TSIF] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 22, 0),
[HWBLK_ICB] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 21, CLK_ENABLE_ON_INIT),
[HWBLK_SDHI0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 18, 0),
[HWBLK_SDHI1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 17, 0),
[HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0),
[HWBLK_USB] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 11, 0),
[HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 10, 0),
[HWBLK_SIU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 8, 0),
[HWBLK_VEU2H1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0),
[HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0),
[HWBLK_BEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0),
[HWBLK_CEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0),
[HWBLK_VEU2H0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0),
[HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0),
[HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 0, 0),
};
static struct clk_lookup lookups[] = {
@ -229,17 +232,17 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]),
CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[HWBLK_DMAC0]),
CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]),
CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
CLKDEV_CON_ID("meram0", &mstp_clks[HWBLK_MERAM]),
CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[HWBLK_MSIOF0]),
CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[HWBLK_MSIOF1]),
CLKDEV_DEV_ID("sh_mobile_meram.0", &mstp_clks[HWBLK_MERAM]),
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]),
CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
@ -248,19 +251,18 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
CLKDEV_CON_ID("icb0", &mstp_clks[HWBLK_ICB]),
CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI0]),
CLKDEV_CON_ID("sdhi1", &mstp_clks[HWBLK_SDHI1]),
CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]),
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]),
CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]),
CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB]),
CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]),
CLKDEV_DEV_ID("siu-pcm-audio", &mstp_clks[HWBLK_SIU]),
CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU2H1]),
CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]),
CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]),
CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]),
CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU]),
CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU2H0]),
CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]),
@ -268,12 +270,15 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]),
};
int __init arch_clk_init(void)
@ -306,7 +311,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR);
return ret;
}

151
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
View File

@ -23,8 +23,8 @@
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/sh_clk.h>
#include <asm/clock.h>
#include <asm/hwblk.h>
#include <cpu/sh7724.h>
/* SH7724 registers */
@ -35,6 +35,9 @@
#define FCLKBCR 0xa415000c
#define IRDACLKCR 0xa4150018
#define PLLCR 0xa4150024
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
#define SPUCLKCR 0xa415003c
#define FLLFRQ 0xa4150050
#define LSTATS 0xa4150060
@ -209,60 +212,60 @@ static struct clk div6_clks[DIV6_NR] = {
};
static struct clk mstp_clks[HWBLK_NR] = {
SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_OC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_RSMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_ILMEM, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_L2C, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_FPU, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_INTC, &div4_clks[DIV4_P], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_DMAC0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SHYWAY, &div4_clks[DIV4_SH], CLK_ENABLE_ON_INIT),
SH_HWBLK_CLK(HWBLK_HUDI, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_UBC, &div4_clks[DIV4_I], 0),
SH_HWBLK_CLK(HWBLK_TMU0, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0),
SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0),
SH_HWBLK_CLK(HWBLK_DMAC1, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_TMU1, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_SCIF3, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SCIF4, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SCIF5, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_MSIOF0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_MSIOF1, &div4_clks[DIV4_B], 0),
[HWBLK_TLB] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
[HWBLK_IC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
[HWBLK_OC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
[HWBLK_RSMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
[HWBLK_ILMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 27, CLK_ENABLE_ON_INIT),
[HWBLK_L2C] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
[HWBLK_FPU] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 24, CLK_ENABLE_ON_INIT),
[HWBLK_INTC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 22, CLK_ENABLE_ON_INIT),
[HWBLK_DMAC0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 21, 0),
[HWBLK_SHYWAY] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR0, 20, CLK_ENABLE_ON_INIT),
[HWBLK_HUDI] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 19, 0),
[HWBLK_UBC] = SH_CLK_MSTP32(&div4_clks[DIV4_I], MSTPCR0, 17, 0),
[HWBLK_TMU0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0),
[HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0),
[HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0),
[HWBLK_DMAC1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 12, 0),
[HWBLK_TMU1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0),
[HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 9, 0),
[HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 8, 0),
[HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0),
[HWBLK_SCIF3] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 6, 0),
[HWBLK_SCIF4] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 5, 0),
[HWBLK_SCIF5] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 4, 0),
[HWBLK_MSIOF0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 2, 0),
[HWBLK_MSIOF1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 1, 0),
SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0),
SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0),
SH_HWBLK_CLK(HWBLK_IIC0, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_IIC1, &div4_clks[DIV4_P], 0),
[HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 12, 0),
[HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 11, 0),
[HWBLK_IIC0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0),
[HWBLK_IIC1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 8, 0),
SH_HWBLK_CLK(HWBLK_MMC, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_ETHER, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_ATAPI, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_TPU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_IRDA, &div4_clks[DIV4_P], 0),
SH_HWBLK_CLK(HWBLK_TSIF, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_USB1, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_USB0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SDHI0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_SDHI1, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VEU1, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_CEU1, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_BEU1, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_2DDMAC, &div4_clks[DIV4_SH], 0),
SH_HWBLK_CLK(HWBLK_SPU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_BEU0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_CEU0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VEU0, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0),
SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_B], 0),
[HWBLK_MMC] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 29, 0),
[HWBLK_ETHER] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 28, 0),
[HWBLK_ATAPI] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 26, 0),
[HWBLK_TPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 25, 0),
[HWBLK_IRDA] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 24, 0),
[HWBLK_TSIF] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 22, 0),
[HWBLK_USB1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 21, 0),
[HWBLK_USB0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 20, 0),
[HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 19, 0),
[HWBLK_SDHI0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 18, 0),
[HWBLK_SDHI1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 17, 0),
[HWBLK_VEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 15, 0),
[HWBLK_CEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 13, 0),
[HWBLK_BEU1] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 12, 0),
[HWBLK_2DDMAC] = SH_CLK_MSTP32(&div4_clks[DIV4_SH], MSTPCR2, 10, 0),
[HWBLK_SPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 9, 0),
[HWBLK_JPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0),
[HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0),
[HWBLK_BEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0),
[HWBLK_CEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0),
[HWBLK_VEU0] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0),
[HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0),
[HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 0, 0),
};
static struct clk_lookup lookups[] = {
@ -296,7 +299,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]),
CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[HWBLK_DMAC0]),
CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
@ -307,26 +310,26 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]),
CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[HWBLK_MSIOF0]),
CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[HWBLK_MSIOF1]),
CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]),
CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]),
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC0]),
CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[HWBLK_IIC1]),
CLKDEV_CON_ID("mmc0", &mstp_clks[HWBLK_MMC]),
CLKDEV_CON_ID("eth0", &mstp_clks[HWBLK_ETHER]),
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[HWBLK_MMC]),
CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[HWBLK_ETHER]),
CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
@ -334,20 +337,20 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("usb1", &mstp_clks[HWBLK_USB1]),
CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB0]),
CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI0]),
CLKDEV_CON_ID("sdhi1", &mstp_clks[HWBLK_SDHI1]),
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]),
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]),
CLKDEV_CON_ID("veu1", &mstp_clks[HWBLK_VEU1]),
CLKDEV_CON_ID("ceu1", &mstp_clks[HWBLK_CEU1]),
CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[HWBLK_CEU1]),
CLKDEV_CON_ID("beu1", &mstp_clks[HWBLK_BEU1]),
CLKDEV_CON_ID("2ddmac0", &mstp_clks[HWBLK_2DDMAC]),
CLKDEV_CON_ID("spu0", &mstp_clks[HWBLK_SPU]),
CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]),
CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]),
CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU0]),
CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU0]),
CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU0]),
CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU0]),
CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]),
};
int __init arch_clk_init(void)
@ -372,7 +375,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR);
return ret;
}

106
arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
View File

@ -1,106 +0,0 @@
/*
* arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
*
* SH7722 hardware block support
*
* Copyright (C) 2009 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/suspend.h>
#include <asm/hwblk.h>
#include <cpu/sh7722.h>
/* SH7722 registers */
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
/* SH7722 Power Domains */
enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
static struct hwblk_area sh7722_hwblk_area[] = {
[CORE_AREA] = HWBLK_AREA(0, 0),
[CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
[SUB_AREA] = HWBLK_AREA(0, 0),
};
/* Table mapping HWBLK to Module Stop Bit and Power Domain */
static struct hwblk sh7722_hwblk[HWBLK_NR] = {
[HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
[HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
[HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
[HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA),
[HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA),
[HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
[HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
[HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
[HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
[HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
[HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA),
[HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
[HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
[HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
[HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA),
[HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA),
[HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA),
[HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA),
[HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
[HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
[HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
[HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
[HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
[HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
[HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA),
[HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA),
[HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
[HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA),
[HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA),
[HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
[HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
[HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
[HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
[HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
[HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
[HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
[HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
[HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
};
static struct hwblk_info sh7722_hwblk_info = {
.areas = sh7722_hwblk_area,
.nr_areas = ARRAY_SIZE(sh7722_hwblk_area),
.hwblks = sh7722_hwblk,
.nr_hwblks = ARRAY_SIZE(sh7722_hwblk),
};
int arch_hwblk_sleep_mode(void)
{
if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_STANDBY | SUSP_SH_SF;
if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_SLEEP | SUSP_SH_SF;
return SUSP_SH_SLEEP;
}
int __init arch_hwblk_init(void)
{
return hwblk_register(&sh7722_hwblk_info);
}

117
arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
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@ -1,117 +0,0 @@
/*
* arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
*
* SH7723 hardware block support
*
* Copyright (C) 2009 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/suspend.h>
#include <asm/hwblk.h>
#include <cpu/sh7723.h>
/* SH7723 registers */
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
/* SH7723 Power Domains */
enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
static struct hwblk_area sh7723_hwblk_area[] = {
[CORE_AREA] = HWBLK_AREA(0, 0),
[CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
[SUB_AREA] = HWBLK_AREA(0, 0),
};
/* Table mapping HWBLK to Module Stop Bit and Power Domain */
static struct hwblk sh7723_hwblk[HWBLK_NR] = {
[HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
[HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
[HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
[HWBLK_L2C] = HWBLK(MSTPCR0, 28, CORE_AREA),
[HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA),
[HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA),
[HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
[HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
[HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
[HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
[HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA),
[HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
[HWBLK_SUBC] = HWBLK(MSTPCR0, 16, CORE_AREA),
[HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA),
[HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
[HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
[HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM),
[HWBLK_TMU1] = HWBLK(MSTPCR0, 11, CORE_AREA),
[HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
[HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA),
[HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA),
[HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA),
[HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA),
[HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA),
[HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA),
[HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
[HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
[HWBLK_MERAM] = HWBLK(MSTPCR0, 0, CORE_AREA),
[HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
[HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
[HWBLK_ATAPI] = HWBLK(MSTPCR2, 28, CORE_AREA_BM),
[HWBLK_ADC] = HWBLK(MSTPCR2, 27, CORE_AREA),
[HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
[HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
[HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA),
[HWBLK_ICB] = HWBLK(MSTPCR2, 21, CORE_AREA_BM),
[HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA),
[HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA),
[HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
[HWBLK_USB] = HWBLK(MSTPCR2, 11, CORE_AREA),
[HWBLK_2DG] = HWBLK(MSTPCR2, 10, CORE_AREA_BM),
[HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
[HWBLK_VEU2H1] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
[HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
[HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
[HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
[HWBLK_VEU2H0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
[HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
[HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
};
static struct hwblk_info sh7723_hwblk_info = {
.areas = sh7723_hwblk_area,
.nr_areas = ARRAY_SIZE(sh7723_hwblk_area),
.hwblks = sh7723_hwblk,
.nr_hwblks = ARRAY_SIZE(sh7723_hwblk),
};
int arch_hwblk_sleep_mode(void)
{
if (!sh7723_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_STANDBY | SUSP_SH_SF;
if (!sh7723_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_SLEEP | SUSP_SH_SF;
return SUSP_SH_SLEEP;
}
int __init arch_hwblk_init(void)
{
return hwblk_register(&sh7723_hwblk_info);
}

121
arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
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@ -1,121 +0,0 @@
/*
* arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
*
* SH7724 hardware block support
*
* Copyright (C) 2009 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/suspend.h>
#include <asm/hwblk.h>
#include <cpu/sh7724.h>
/* SH7724 registers */
#define MSTPCR0 0xa4150030
#define MSTPCR1 0xa4150034
#define MSTPCR2 0xa4150038
/* SH7724 Power Domains */
enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
static struct hwblk_area sh7724_hwblk_area[] = {
[CORE_AREA] = HWBLK_AREA(0, 0),
[CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
[SUB_AREA] = HWBLK_AREA(0, 0),
};
/* Table mapping HWBLK to Module Stop Bit and Power Domain */
static struct hwblk sh7724_hwblk[HWBLK_NR] = {
[HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
[HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
[HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
[HWBLK_RSMEM] = HWBLK(MSTPCR0, 28, CORE_AREA),
[HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA),
[HWBLK_L2C] = HWBLK(MSTPCR0, 26, CORE_AREA),
[HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA),
[HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
[HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
[HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
[HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
[HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA),
[HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
[HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA),
[HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
[HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
[HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM),
[HWBLK_TMU1] = HWBLK(MSTPCR0, 10, CORE_AREA),
[HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA),
[HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA),
[HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA),
[HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA),
[HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA),
[HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA),
[HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
[HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
[HWBLK_KEYSC] = HWBLK(MSTPCR1, 12, SUB_AREA),
[HWBLK_RTC] = HWBLK(MSTPCR1, 11, SUB_AREA),
[HWBLK_IIC0] = HWBLK(MSTPCR1, 9, CORE_AREA),
[HWBLK_IIC1] = HWBLK(MSTPCR1, 8, CORE_AREA),
[HWBLK_MMC] = HWBLK(MSTPCR2, 29, CORE_AREA),
[HWBLK_ETHER] = HWBLK(MSTPCR2, 28, CORE_AREA_BM),
[HWBLK_ATAPI] = HWBLK(MSTPCR2, 26, CORE_AREA_BM),
[HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
[HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
[HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA),
[HWBLK_USB1] = HWBLK(MSTPCR2, 21, CORE_AREA),
[HWBLK_USB0] = HWBLK(MSTPCR2, 20, CORE_AREA),
[HWBLK_2DG] = HWBLK(MSTPCR2, 19, CORE_AREA_BM),
[HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA),
[HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA),
[HWBLK_VEU1] = HWBLK(MSTPCR2, 15, CORE_AREA_BM),
[HWBLK_CEU1] = HWBLK(MSTPCR2, 13, CORE_AREA_BM),
[HWBLK_BEU1] = HWBLK(MSTPCR2, 12, CORE_AREA_BM),
[HWBLK_2DDMAC] = HWBLK(MSTPCR2, 10, CORE_AREA_BM),
[HWBLK_SPU] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
[HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
[HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
[HWBLK_BEU0] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
[HWBLK_CEU0] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
[HWBLK_VEU0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
[HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
[HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
};
static struct hwblk_info sh7724_hwblk_info = {
.areas = sh7724_hwblk_area,
.nr_areas = ARRAY_SIZE(sh7724_hwblk_area),
.hwblks = sh7724_hwblk,
.nr_hwblks = ARRAY_SIZE(sh7724_hwblk),
};
int arch_hwblk_sleep_mode(void)
{
if (!sh7724_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_STANDBY | SUSP_SH_SF;
if (!sh7724_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
return SUSP_SH_SLEEP | SUSP_SH_SF;
return SUSP_SH_SLEEP;
}
int __init arch_hwblk_init(void)
{
return hwblk_register(&sh7724_hwblk_info);
}

1
arch/sh/kernel/cpu/shmobile/Makefile
View File

@ -5,4 +5,3 @@
# Power Management & Sleep mode
obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
obj-$(CONFIG_PM_RUNTIME) += pm_runtime.o

319
arch/sh/kernel/cpu/shmobile/pm_runtime.c
View File

@ -1,319 +0,0 @@
/*
* arch/sh/kernel/cpu/shmobile/pm_runtime.c
*
* Runtime PM support code for SuperH Mobile
*
* Copyright (C) 2009 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/pm_runtime.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
#include <asm/hwblk.h>
static DEFINE_SPINLOCK(hwblk_lock);
static LIST_HEAD(hwblk_idle_list);
static struct work_struct hwblk_work;
extern struct hwblk_info *hwblk_info;
static void platform_pm_runtime_not_idle(struct platform_device *pdev)
{
unsigned long flags;
/* remove device from idle list */
spin_lock_irqsave(&hwblk_lock, flags);
if (test_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags)) {
list_del(&pdev->archdata.entry);
__clear_bit(PDEV_ARCHDATA_FLAG_IDLE, &pdev->archdata.flags);
}
spin_unlock_irqrestore(&hwblk_lock, flags);
}
static int __platform_pm_runtime_resume(struct platform_device *pdev)
{
struct device *d = &pdev->dev;
struct pdev_archdata *ad = &pdev->archdata;
int hwblk = ad->hwblk_id;
int ret = -ENOSYS;
dev_dbg(d, "__platform_pm_runtime_resume() [%d]\n", hwblk);
if (d->driver) {
hwblk_enable(hwblk_info, hwblk);
ret = 0;
if (test_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags)) {
if (d->driver->pm && d->driver->pm->runtime_resume)
ret = d->driver->pm->runtime_resume(d);
if (!ret)
clear_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
else
hwblk_disable(hwblk_info, hwblk);
}
}
dev_dbg(d, "__platform_pm_runtime_resume() [%d] - returns %d\n",
hwblk, ret);
return ret;
}
static int __platform_pm_runtime_suspend(struct platform_device *pdev)
{
struct device *d = &pdev->dev;
struct pdev_archdata *ad = &pdev->archdata;
int hwblk = ad->hwblk_id;
int ret = -ENOSYS;
dev_dbg(d, "__platform_pm_runtime_suspend() [%d]\n", hwblk);
if (d->driver) {
BUG_ON(!test_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags));
ret = 0;
if (d->driver->pm && d->driver->pm->runtime_suspend) {
hwblk_enable(hwblk_info, hwblk);
ret = d->driver->pm->runtime_suspend(d);
hwblk_disable(hwblk_info, hwblk);
}
if (!ret) {
set_bit(PDEV_ARCHDATA_FLAG_SUSP, &ad->flags);
platform_pm_runtime_not_idle(pdev);
hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_IDLE);
}
}
dev_dbg(d, "__platform_pm_runtime_suspend() [%d] - returns %d\n",
hwblk, ret);
return ret;
}
static void platform_pm_runtime_work(struct work_struct *work)
{
struct platform_device *pdev;
unsigned long flags;
int ret;
/* go through the idle list and suspend one device at a time */
do {
spin_lock_irqsave(&hwblk_lock, flags);
if (list_empty(&hwblk_idle_list))
pdev = NULL;
else
pdev = list_first_entry(&hwblk_idle_list,
struct platform_device,
archdata.entry);
spin_unlock_irqrestore(&hwblk_lock, flags);
if (pdev) {
mutex_lock(&pdev->archdata.mutex);
ret = __platform_pm_runtime_suspend(pdev);
/* at this point the platform device may be:
* suspended: ret = 0, FLAG_SUSP set, clock stopped
* failed: ret < 0, FLAG_IDLE set, clock stopped
*/
mutex_unlock(&pdev->archdata.mutex);
} else {
ret = -ENODEV;
}
} while (!ret);
}
/* this function gets called from cpuidle context when all devices in the
* main power domain are unused but some are counted as idle, ie the hwblk
* counter values are (HWBLK_CNT_USAGE == 0) && (HWBLK_CNT_IDLE != 0)
*/
void platform_pm_runtime_suspend_idle(void)
{
queue_work(pm_wq, &hwblk_work);
}
static int default_platform_runtime_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct pdev_archdata *ad = &pdev->archdata;
unsigned long flags;
int hwblk = ad->hwblk_id;
int ret = 0;
dev_dbg(dev, "%s() [%d]\n", __func__, hwblk);
/* ignore off-chip platform devices */
if (!hwblk)
goto out;
/* interrupt context not allowed */
might_sleep();
/* catch misconfigured drivers not starting with resume */
if (test_bit(PDEV_ARCHDATA_FLAG_INIT, &ad->flags)) {
ret = -EINVAL;
goto out;
}
/* serialize */
mutex_lock(&ad->mutex);
/* disable clock */
hwblk_disable(hwblk_info, hwblk);
/* put device on idle list */
spin_lock_irqsave(&hwblk_lock, flags);
list_add_tail(&ad->entry, &hwblk_idle_list);
__set_bit(PDEV_ARCHDATA_FLAG_IDLE, &ad->flags);
spin_unlock_irqrestore(&hwblk_lock, flags);
/* increase idle count */
hwblk_cnt_inc(hwblk_info, hwblk, HWBLK_CNT_IDLE);
/* at this point the platform device is:
* idle: ret = 0, FLAG_IDLE set, clock stopped
*/
mutex_unlock(&ad->mutex);
out:
dev_dbg(dev, "%s() [%d] returns %d\n",
__func__, hwblk, ret);
return ret;
}
static int default_platform_runtime_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct pdev_archdata *ad = &pdev->archdata;
int hwblk = ad->hwblk_id;
int ret = 0;
dev_dbg(dev, "%s() [%d]\n", __func__, hwblk);
/* ignore off-chip platform devices */
if (!hwblk)
goto out;
/* interrupt context not allowed */
might_sleep();
/* serialize */
mutex_lock(&ad->mutex);
/* make sure device is removed from idle list */
platform_pm_runtime_not_idle(pdev);
/* decrease idle count */
if (!test_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags) &&
!test_bit(PDEV_ARCHDATA_FLAG_SUSP, &pdev->archdata.flags))
hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_IDLE);
/* resume the device if needed */
ret = __platform_pm_runtime_resume(pdev);
/* the driver has been initialized now, so clear the init flag */
clear_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
/* at this point the platform device may be:
* resumed: ret = 0, flags = 0, clock started
* failed: ret < 0, FLAG_SUSP set, clock stopped
*/
mutex_unlock(&ad->mutex);
out:
dev_dbg(dev, "%s() [%d] returns %d\n",
__func__, hwblk, ret);
return ret;
}
static int default_platform_runtime_idle(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
int hwblk = pdev->archdata.hwblk_id;
int ret = 0;
dev_dbg(dev, "%s() [%d]\n", __func__, hwblk);
/* ignore off-chip platform devices */
if (!hwblk)
goto out;
/* interrupt context not allowed, use pm_runtime_put()! */
might_sleep();
/* suspend synchronously to disable clocks immediately */
ret = pm_runtime_suspend(dev);
out:
dev_dbg(dev, "%s() [%d] done!\n", __func__, hwblk);
return ret;
}
static struct dev_pm_domain default_pm_domain = {
.ops = {
.runtime_suspend = default_platform_runtime_suspend,
.runtime_resume = default_platform_runtime_resume,
.runtime_idle = default_platform_runtime_idle,
USE_PLATFORM_PM_SLEEP_OPS
},
};
static int platform_bus_notify(struct notifier_block *nb,
unsigned long action, void *data)
{
struct device *dev = data;
struct platform_device *pdev = to_platform_device(dev);
int hwblk = pdev->archdata.hwblk_id;
/* ignore off-chip platform devices */
if (!hwblk)
return 0;
switch (action) {
case BUS_NOTIFY_ADD_DEVICE:
INIT_LIST_HEAD(&pdev->archdata.entry);
mutex_init(&pdev->archdata.mutex);
/* platform devices without drivers should be disabled */
hwblk_enable(hwblk_info, hwblk);
hwblk_disable(hwblk_info, hwblk);
/* make sure driver re-inits itself once */
__set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
dev->pm_domain = &default_pm_domain;
break;
/* TODO: add BUS_NOTIFY_BIND_DRIVER and increase idle count */
case BUS_NOTIFY_BOUND_DRIVER:
/* keep track of number of devices in use per hwblk */
hwblk_cnt_inc(hwblk_info, hwblk, HWBLK_CNT_DEVICES);
break;
case BUS_NOTIFY_UNBOUND_DRIVER:
/* keep track of number of devices in use per hwblk */
hwblk_cnt_dec(hwblk_info, hwblk, HWBLK_CNT_DEVICES);
/* make sure driver re-inits itself once */
__set_bit(PDEV_ARCHDATA_FLAG_INIT, &pdev->archdata.flags);
break;
case BUS_NOTIFY_DEL_DEVICE:
dev->pm_domain = NULL;
break;
}
return 0;
}
static struct notifier_block platform_bus_notifier = {
.notifier_call = platform_bus_notify
};
static int __init sh_pm_runtime_init(void)
{
INIT_WORK(&hwblk_work, platform_pm_runtime_work);
bus_register_notifier(&platform_bus_type, &platform_bus_notifier);
return 0;
}
core_initcall(sh_pm_runtime_init);

9
drivers/sh/Makefile
View File

@ -7,11 +7,4 @@ obj-$(CONFIG_HAVE_CLK) += clk/
obj-$(CONFIG_MAPLE) += maple/
obj-$(CONFIG_SUPERHYWAY) += superhyway/
obj-$(CONFIG_GENERIC_GPIO) += pfc.o
#
# For the moment we only use this framework for ARM-based SH/R-Mobile
# platforms and generic SH. SH-based SH-Mobile platforms are still using
# an older framework that is pending up-porting, at which point this
# special casing can go away.
#
obj-$(CONFIG_SUPERH)$(CONFIG_ARCH_SHMOBILE) += pm_runtime.o
obj-y += pm_runtime.o