[ARM] 3367/1: CLCD mode no longer supported on the RealView boards
Patch from Catalin Marinas Chosing of the CLCD RGB mode is no longer possible via the SYS_CLCD register on the RealView boards. Instead, this configuration is done in the CLCD primecell control register directly. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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243f196d57
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9e7714d080
1 changed files with 3 additions and 27 deletions
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@ -202,11 +202,6 @@ struct clk realview_clcd_clk = {
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/*
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* CLCD support.
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*/
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#define SYS_CLCD_MODE_MASK (3 << 0)
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#define SYS_CLCD_MODE_888 (0 << 0)
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#define SYS_CLCD_MODE_5551 (1 << 0)
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#define SYS_CLCD_MODE_565_RLSB (2 << 0)
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#define SYS_CLCD_MODE_565_BLSB (3 << 0)
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#define SYS_CLCD_NLCDIOON (1 << 2)
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#define SYS_CLCD_VDDPOSSWITCH (1 << 3)
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#define SYS_CLCD_PWR3V5SWITCH (1 << 4)
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@ -360,29 +355,10 @@ static void realview_clcd_enable(struct clcd_fb *fb)
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void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
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u32 val;
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/*
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* Enable the PSUs
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*/
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val = readl(sys_clcd);
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val &= ~SYS_CLCD_MODE_MASK;
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switch (fb->fb.var.green.length) {
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case 5:
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val |= SYS_CLCD_MODE_5551;
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break;
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case 6:
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val |= SYS_CLCD_MODE_565_RLSB;
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break;
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case 8:
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val |= SYS_CLCD_MODE_888;
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break;
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}
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/*
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* Set the MUX
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*/
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writel(val, sys_clcd);
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/*
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* And now enable the PSUs
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*/
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val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
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writel(val, sys_clcd);
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}
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