[PATCH] ahci: preserve PORTS_IMPL over host resets
Instead of writing 0xf blindly, preserve the content of write-once PORTS_IMPL register over host resets. This patch is taken from Jeff Garzik's AHCI init update patch. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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1 changed files with 20 additions and 3 deletions
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@ -421,6 +421,11 @@ static struct pci_driver ahci_pci_driver = {
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};
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};
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static inline int ahci_nr_ports(u32 cap)
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{
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return (cap & 0x1f) + 1;
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}
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static inline unsigned long ahci_port_base_ul (unsigned long base, unsigned int port)
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static inline unsigned long ahci_port_base_ul (unsigned long base, unsigned int port)
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{
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{
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return base + 0x100 + (port * 0x80);
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return base + 0x100 + (port * 0x80);
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@ -630,11 +635,12 @@ static int ahci_deinit_port(void __iomem *port_mmio, u32 cap, const char **emsg)
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static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev)
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static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev)
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{
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{
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u32 cap_save, tmp;
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u32 cap_save, impl_save, tmp;
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cap_save = readl(mmio + HOST_CAP);
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cap_save = readl(mmio + HOST_CAP);
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cap_save &= ( (1<<28) | (1<<17) );
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cap_save &= ( (1<<28) | (1<<17) );
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cap_save |= (1 << 27);
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cap_save |= (1 << 27);
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impl_save = readl(mmio + HOST_PORTS_IMPL);
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/* global controller reset */
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/* global controller reset */
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tmp = readl(mmio + HOST_CTL);
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tmp = readl(mmio + HOST_CTL);
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@ -655,10 +661,21 @@ static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev)
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return -EIO;
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return -EIO;
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}
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}
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/* turn on AHCI mode */
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writel(HOST_AHCI_EN, mmio + HOST_CTL);
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writel(HOST_AHCI_EN, mmio + HOST_CTL);
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(void) readl(mmio + HOST_CTL); /* flush */
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(void) readl(mmio + HOST_CTL); /* flush */
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/* These write-once registers are normally cleared on reset.
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* Restore BIOS values... which we HOPE were present before
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* reset.
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*/
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if (!impl_save) {
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impl_save = (1 << ahci_nr_ports(cap_save)) - 1;
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dev_printk(KERN_WARNING, &pdev->dev,
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"PORTS_IMPL is zero, forcing 0x%x\n", impl_save);
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}
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writel(cap_save, mmio + HOST_CAP);
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writel(cap_save, mmio + HOST_CAP);
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writel(0xf, mmio + HOST_PORTS_IMPL);
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writel(impl_save, mmio + HOST_PORTS_IMPL);
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(void) readl(mmio + HOST_PORTS_IMPL); /* flush */
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(void) readl(mmio + HOST_PORTS_IMPL); /* flush */
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if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
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if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
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@ -1467,7 +1484,7 @@ static int ahci_host_init(struct ata_probe_ent *probe_ent)
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hpriv->cap = readl(mmio + HOST_CAP);
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hpriv->cap = readl(mmio + HOST_CAP);
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hpriv->port_map = readl(mmio + HOST_PORTS_IMPL);
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hpriv->port_map = readl(mmio + HOST_PORTS_IMPL);
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probe_ent->n_ports = (hpriv->cap & 0x1f) + 1;
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probe_ent->n_ports = ahci_nr_ports(hpriv->cap);
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VPRINTK("cap 0x%x port_map 0x%x n_ports %d\n",
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VPRINTK("cap 0x%x port_map 0x%x n_ports %d\n",
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hpriv->cap, hpriv->port_map, probe_ent->n_ports);
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hpriv->cap, hpriv->port_map, probe_ent->n_ports);
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