sata_promise: ATAPI support
This patch adds ATAPI support to the sata_promise driver. This has been tested on both first- and second-generation chips (20378 and 20575), and with both SATAPI and PATAPI devices. CD-writing works. SATAPI DMA works on second-generation chips, but on first-generation chips SATAPI is limited to PIO due to what appears to be HW limitations. PATAPI DMA works on both first- and second-generation chips, but requires the separate PATA support patch before it can be used on TX2plus chips. The functional changes to the driver are: - remove ATA_FLAG_NO_ATAPI from PDC_COMMON_FLAGS - add ->check_atapi_dma() operation to enable DMA for bulk data transfers but force PIO for other ATAPI commands; this filter is from Promise's driver and largely matches pata_pdc207x.c - use a more restrictive ->check_atapi_dma() on first-generation chips to force SATAPI to always use PIO - add handling of ATAPI protocols to pdc_qc_prep(), pdc_host_intr(), and pdc_qc_issue_prot(): ATAPI_DMA is handled by the driver while non-DMA protocols are handed over to libata generic code - add pdc_issue_atapi_pkt_cmd() to handle the initial steps in issuing ATAPI DMA commands before sending the actual CDB; this procedure was ported from Promise's driver Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Mikael Pettersson
Jeff Garzik
parent
870ae337d5
commit
95006188cb
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@ -39,6 +39,7 @@
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <linux/device.h>
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#include <scsi/scsi.h>
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#include <scsi/scsi_host.h>
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#include <scsi/scsi_cmnd.h>
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#include <linux/libata.h>
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@ -50,6 +51,14 @@
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enum {
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/* register offsets */
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PDC_FEATURE = 0x04, /* Feature/Error reg (per port) */
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PDC_SECTOR_COUNT = 0x08, /* Sector count reg (per port) */
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PDC_SECTOR_NUMBER = 0x0C, /* Sector number reg (per port) */
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PDC_CYLINDER_LOW = 0x10, /* Cylinder low reg (per port) */
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PDC_CYLINDER_HIGH = 0x14, /* Cylinder high reg (per port) */
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PDC_DEVICE = 0x18, /* Device/Head reg (per port) */
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PDC_COMMAND = 0x1C, /* Command/status reg (per port) */
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PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */
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PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */
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PDC_FLASH_CTL = 0x44, /* Flash control register */
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@ -71,13 +80,23 @@ enum {
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PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */
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/* Sequence counter control registers bit definitions */
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PDC_SEQCNTRL_INT_MASK = (1 << 5), /* Sequence Interrupt Mask */
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/* Feature register values */
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PDC_FEATURE_ATAPI_PIO = 0x00, /* ATAPI data xfer by PIO */
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PDC_FEATURE_ATAPI_DMA = 0x01, /* ATAPI data xfer by DMA */
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/* Device/Head register values */
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PDC_DEVICE_SATA = 0xE0, /* Device/Head value for SATA devices */
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/* PDC_CTLSTAT bit definitions */
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PDC_DMA_ENABLE = (1 << 7),
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PDC_IRQ_DISABLE = (1 << 10),
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PDC_RESET = (1 << 11), /* HDMA reset */
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PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY |
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ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI |
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ATA_FLAG_MMIO |
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ATA_FLAG_PIO_POLLING,
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/* hp->flags bits */
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@ -106,6 +125,8 @@ static void pdc_pata_phy_reset(struct ata_port *ap);
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static void pdc_qc_prep(struct ata_queued_cmd *qc);
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static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
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static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
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static int pdc_check_atapi_dma(struct ata_queued_cmd *qc);
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static int pdc_old_check_atapi_dma(struct ata_queued_cmd *qc);
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static void pdc_irq_clear(struct ata_port *ap);
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static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc);
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static void pdc_host_stop(struct ata_host *host);
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@ -140,6 +161,34 @@ static const struct ata_port_operations pdc_sata_ops = {
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.check_status = ata_check_status,
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.exec_command = pdc_exec_command_mmio,
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.dev_select = ata_std_dev_select,
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.check_atapi_dma = pdc_check_atapi_dma,
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.qc_prep = pdc_qc_prep,
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.qc_issue = pdc_qc_issue_prot,
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.freeze = pdc_freeze,
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.thaw = pdc_thaw,
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.error_handler = pdc_error_handler,
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.post_internal_cmd = pdc_post_internal_cmd,
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.data_xfer = ata_mmio_data_xfer,
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.irq_handler = pdc_interrupt,
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.irq_clear = pdc_irq_clear,
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.scr_read = pdc_sata_scr_read,
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.scr_write = pdc_sata_scr_write,
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.port_start = pdc_port_start,
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.port_stop = pdc_port_stop,
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.host_stop = pdc_host_stop,
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};
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/* First-generation chips need a more restrictive ->check_atapi_dma op */
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static const struct ata_port_operations pdc_old_sata_ops = {
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.port_disable = ata_port_disable,
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.tf_load = pdc_tf_load_mmio,
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.tf_read = ata_tf_read,
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.check_status = ata_check_status,
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.exec_command = pdc_exec_command_mmio,
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.dev_select = ata_std_dev_select,
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.check_atapi_dma = pdc_old_check_atapi_dma,
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.qc_prep = pdc_qc_prep,
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.qc_issue = pdc_qc_issue_prot,
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@ -165,6 +214,7 @@ static const struct ata_port_operations pdc_pata_ops = {
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.check_status = ata_check_status,
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.exec_command = pdc_exec_command_mmio,
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.dev_select = ata_std_dev_select,
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.check_atapi_dma = pdc_check_atapi_dma,
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.phy_reset = pdc_pata_phy_reset,
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@ -188,7 +238,7 @@ static const struct ata_port_info pdc_port_info[] = {
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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.udma_mask = 0x7f, /* udma0-6 ; FIXME */
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.port_ops = &pdc_sata_ops,
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.port_ops = &pdc_old_sata_ops,
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},
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/* board_20319 */
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@ -198,7 +248,7 @@ static const struct ata_port_info pdc_port_info[] = {
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.pio_mask = 0x1f, /* pio0-4 */
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.mwdma_mask = 0x07, /* mwdma0-2 */
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.udma_mask = 0x7f, /* udma0-6 ; FIXME */
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.port_ops = &pdc_sata_ops,
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.port_ops = &pdc_old_sata_ops,
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},
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/* board_20619 */
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@ -397,6 +447,30 @@ static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
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writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
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}
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static void pdc_atapi_dma_pkt(struct ata_taskfile *tf,
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dma_addr_t sg_table,
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unsigned int cdb_len, u8 *cdb,
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u8 *buf)
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{
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u32 *buf32 = (u32 *) buf;
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/* set control bits (byte 0), zero delay seq id (byte 3),
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* and seq id (byte 2)
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*/
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if (!(tf->flags & ATA_TFLAG_WRITE))
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buf32[0] = cpu_to_le32(PDC_PKT_READ);
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else
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buf32[0] = 0;
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buf32[1] = cpu_to_le32(sg_table); /* S/G table addr */
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buf32[2] = 0; /* no next-packet */
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/* we can represent cdb lengths 2/4/6/8/10/12/14/16 */
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BUG_ON(cdb_len & ~0x1E);
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buf[12] = (((cdb_len >> 1) & 7) << 5) | ATA_REG_DATA | PDC_LAST_REG;
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memcpy(buf+13, cdb, cdb_len);
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}
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static void pdc_qc_prep(struct ata_queued_cmd *qc)
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{
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struct pdc_port_priv *pp = qc->ap->private_data;
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@ -421,6 +495,16 @@ static void pdc_qc_prep(struct ata_queued_cmd *qc)
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pdc_pkt_footer(&qc->tf, pp->pkt, i);
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break;
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case ATA_PROT_ATAPI:
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case ATA_PROT_ATAPI_NODATA:
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ata_qc_prep(qc);
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break;
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case ATA_PROT_ATAPI_DMA:
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ata_qc_prep(qc);
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pdc_atapi_dma_pkt(&qc->tf, qc->ap->prd_dma, qc->dev->cdb_len, qc->cdb, pp->pkt);
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break;
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default:
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break;
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}
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@ -534,6 +618,7 @@ static inline unsigned int pdc_host_intr( struct ata_port *ap,
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switch (qc->tf.protocol) {
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case ATA_PROT_DMA:
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case ATA_PROT_NODATA:
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case ATA_PROT_ATAPI_DMA:
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qc->err_mask |= ac_err_mask(ata_wait_idle(ap));
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ata_qc_complete(qc);
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handled = 1;
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@ -630,18 +715,105 @@ static inline void pdc_packet_start(struct ata_queued_cmd *qc)
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readl((void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */
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}
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static unsigned int pdc_wait_for_drq(struct ata_port *ap)
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{
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void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
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unsigned int i;
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unsigned int status;
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/* Following pdc-ultra's WaitForDrq() we loop here until BSY
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* is clear and DRQ is set in altstatus. We could possibly call
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* ata_busy_wait() and loop until DRQ is set, but since we don't
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* know how much time a call to ata_busy_wait() took, we don't
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* know when to time out the outer loop.
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*/
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for(i = 0; i < 1000; ++i) {
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status = readb(port_mmio + 0x38); /* altstatus */
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if (status == 0xFF)
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break;
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if (status & ATA_BUSY)
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;
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else if (status & (ATA_DRQ | ATA_ERR))
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break;
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mdelay(1);
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}
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if (i >= 1000)
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ata_port_printk(ap, KERN_WARNING, "%s timed out", __FUNCTION__);
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return status;
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}
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static void pdc_issue_atapi_pkt_cmd(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
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void __iomem *host_mmio = ap->host->mmio_base;
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unsigned int nbytes;
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unsigned int tmp;
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writeb(0x00, port_mmio + PDC_CTLSTAT); /* route drive INT to SEQ 0 */
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writeb(PDC_SEQCNTRL_INT_MASK, host_mmio + 0); /* but mask SEQ 0 INT */
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/* select drive */
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if (sata_scr_valid(ap)) {
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tmp = PDC_DEVICE_SATA;
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} else {
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tmp = ATA_DEVICE_OBS;
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if (qc->dev->devno != 0)
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tmp |= ATA_DEV1;
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}
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writeb(tmp, port_mmio + PDC_DEVICE);
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ata_busy_wait(ap, ATA_BUSY, 1000);
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writeb(0x00, port_mmio + PDC_SECTOR_COUNT);
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writeb(0x00, port_mmio + PDC_SECTOR_NUMBER);
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/* set feature and byte counter registers */
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if (qc->tf.protocol != ATA_PROT_ATAPI_DMA) {
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tmp = PDC_FEATURE_ATAPI_PIO;
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/* set byte counter register to real transfer byte count */
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nbytes = qc->nbytes;
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if (!nbytes)
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nbytes = qc->nsect << 9;
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if (nbytes > 0xffff)
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nbytes = 0xffff;
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} else {
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tmp = PDC_FEATURE_ATAPI_DMA;
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/* set byte counter register to 0 */
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nbytes = 0;
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}
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writeb(tmp, port_mmio + PDC_FEATURE);
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writeb(nbytes & 0xFF, port_mmio + PDC_CYLINDER_LOW);
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writeb((nbytes >> 8) & 0xFF, port_mmio + PDC_CYLINDER_HIGH);
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/* send ATAPI packet command 0xA0 */
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writeb(ATA_CMD_PACKET, port_mmio + PDC_COMMAND);
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/*
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* At this point in the issuing of a packet command, the Promise
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* driver busy-waits for INT (CTLSTAT bit 27) if it detected
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* (at port init time) that the device interrupts with assertion
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* of DRQ after receiving a packet command.
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*
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* XXX: Do we need to handle this case as well? Does libata detect
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* this case for us, or do we have to do our own per-port init?
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*/
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pdc_wait_for_drq(ap);
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/* now the device only waits for the CDB */
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}
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static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc)
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{
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switch (qc->tf.protocol) {
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case ATA_PROT_ATAPI_DMA:
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pdc_issue_atapi_pkt_cmd(qc);
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/*FALLTHROUGH*/
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case ATA_PROT_DMA:
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case ATA_PROT_NODATA:
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pdc_packet_start(qc);
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return 0;
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case ATA_PROT_ATAPI_DMA:
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BUG();
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break;
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default:
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break;
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}
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@ -664,6 +836,42 @@ static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile
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ata_exec_command(ap, tf);
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}
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static int pdc_check_atapi_dma(struct ata_queued_cmd *qc)
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{
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u8 *scsicmd = qc->scsicmd->cmnd;
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int pio = 1; /* atapi dma off by default */
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/* Whitelist commands that may use DMA. */
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switch (scsicmd[0]) {
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case WRITE_12:
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case WRITE_10:
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case WRITE_6:
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case READ_12:
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case READ_10:
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case READ_6:
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case 0xad: /* READ_DVD_STRUCTURE */
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case 0xbe: /* READ_CD */
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pio = 0;
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}
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/* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */
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if (scsicmd[0] == WRITE_10) {
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unsigned int lba;
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lba = (scsicmd[2] << 24) | (scsicmd[3] << 16) | (scsicmd[4] << 8) | scsicmd[5];
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if (lba >= 0xFFFF4FA2)
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pio = 1;
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}
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return pio;
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}
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static int pdc_old_check_atapi_dma(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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/* First generation chips cannot use ATAPI DMA on SATA ports */
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if (sata_scr_valid(ap))
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return 1;
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return pdc_check_atapi_dma(qc);
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}
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static void pdc_ata_setup_port(struct ata_ioports *port, unsigned long base)
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{
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