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staging iio: lis3l02dq cleanup 

fixes some typos, whitespace, comments

Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Peter Meerwald 2012-08-22 20:42:00 +01:00 committed by Jonathan Cameron
parent 7c388ec1d4
commit 91b4171f4e
3 changed files with 22 additions and 22 deletions
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12
drivers/staging/iio/accel/lis3l02dq.h
View File

@ -28,7 +28,7 @@
/* Control Register (1 of 2) */
#define LIS3L02DQ_REG_CTRL_1_ADDR 0x20
/* Power ctrl - either bit set corresponds to on*/
#define LIS3L02DQ_REG_CTRL_1_PD_ON 0xC0
#define LIS3L02DQ_REG_CTRL_1_PD_ON 0xC0
/* Decimation Factor */
#define LIS3L02DQ_DEC_MASK 0x30
@ -73,14 +73,14 @@
/* Interrupt related stuff */
#define LIS3L02DQ_REG_WAKE_UP_CFG_ADDR 0x23
/* Switch from or combination fo conditions to and */
/* Switch from or combination of conditions to and */
#define LIS3L02DQ_REG_WAKE_UP_CFG_BOOLEAN_AND 0x80
/* Latch interrupt request,
* if on ack must be given by reading the ack register */
#define LIS3L02DQ_REG_WAKE_UP_CFG_LATCH_SRC 0x40
/* Z Interrupt on High (above threshold)*/
/* Z Interrupt on High (above threshold) */
#define LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Z_HIGH 0x20
/* Z Interrupt on Low */
#define LIS3L02DQ_REG_WAKE_UP_CFG_INTERRUPT_Z_LOW 0x10
@ -117,13 +117,13 @@
#define LIS3L02DQ_REG_STATUS_Y_OVERRUN 0x20
#define LIS3L02DQ_REG_STATUS_X_OVERRUN 0x10
/* XYZ new data available - first is all 3 available? */
#define LIS3L02DQ_REG_STATUS_XYZ_NEW_DATA 0x08
#define LIS3L02DQ_REG_STATUS_XYZ_NEW_DATA 0x08
#define LIS3L02DQ_REG_STATUS_Z_NEW_DATA 0x04
#define LIS3L02DQ_REG_STATUS_Y_NEW_DATA 0x02
#define LIS3L02DQ_REG_STATUS_X_NEW_DATA 0x01
/* The accelerometer readings - low and high bytes.
Form of high byte dependent on justification set in ctrl reg */
* Form of high byte dependent on justification set in ctrl reg */
#define LIS3L02DQ_REG_OUT_X_L_ADDR 0x28
#define LIS3L02DQ_REG_OUT_X_H_ADDR 0x29
#define LIS3L02DQ_REG_OUT_Y_L_ADDR 0x2A
@ -150,9 +150,9 @@ Form of high byte dependent on justification set in ctrl reg */
* struct lis3l02dq_state - device instance specific data
* @us: actual spi_device
* @trig: data ready trigger registered with iio
* @buf_lock: mutex to protect tx and rx
* @tx: transmit buffer
* @rx: receive buffer
* @buf_lock: mutex to protect tx and rx
**/
struct lis3l02dq_state {
struct spi_device *us;

4
drivers/staging/iio/accel/lis3l02dq_core.c
View File

@ -392,7 +392,7 @@ static int lis3l02dq_initial_setup(struct iio_dev *indio_dev)
dev_err(&st->us->dev, "problem with setup control register 1");
goto err_ret;
}
/* Repeat as sometimes doesn't work first time?*/
/* Repeat as sometimes doesn't work first time? */
ret = lis3l02dq_spi_write_reg_8(indio_dev,
LIS3L02DQ_REG_CTRL_1_ADDR,
val);
@ -686,7 +686,7 @@ static int __devinit lis3l02dq_probe(struct spi_device *spi)
goto error_ret;
}
st = iio_priv(indio_dev);
/* this is only used tor removal purposes */
/* this is only used for removal purposes */
spi_set_drvdata(spi, indio_dev);
st->us = spi;

28
drivers/staging/iio/accel/lis3l02dq_ring.c
View File

@ -14,7 +14,7 @@
#include "lis3l02dq.h"
/**
* combine_8_to_16() utility function to munge to u8s into u16
* combine_8_to_16() utility function to munge two u8s into u16
**/
static inline u16 combine_8_to_16(u8 lower, u8 upper)
{
@ -49,7 +49,7 @@ static const u8 read_all_tx_array[] = {
/**
* lis3l02dq_read_all() Reads all channels currently selected
* @st: device specific state
* @indio_dev: IIO device state
* @rx_array: (dma capable) receive array, must be at least
* 4*number of channels
**/
@ -170,22 +170,22 @@ __lis3l02dq_write_data_ready_config(struct iio_dev *indio_dev, bool state)
bool currentlyset;
struct lis3l02dq_state *st = iio_priv(indio_dev);
/* Get the current event mask register */
/* Get the current event mask register */
ret = lis3l02dq_spi_read_reg_8(indio_dev,
LIS3L02DQ_REG_CTRL_2_ADDR,
&valold);
if (ret)
goto error_ret;
/* Find out if data ready is already on */
/* Find out if data ready is already on */
currentlyset
= valold & LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
/* Disable requested */
/* Disable requested */
if (!state && currentlyset) {
/* disable the data ready signal */
/* Disable the data ready signal */
valold &= ~LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
/* The double write is to overcome a hardware bug?*/
/* The double write is to overcome a hardware bug? */
ret = lis3l02dq_spi_write_reg_8(indio_dev,
LIS3L02DQ_REG_CTRL_2_ADDR,
valold);
@ -197,10 +197,10 @@ __lis3l02dq_write_data_ready_config(struct iio_dev *indio_dev, bool state)
if (ret)
goto error_ret;
st->trigger_on = false;
/* Enable requested */
/* Enable requested */
} else if (state && !currentlyset) {
/* if not set, enable requested */
/* first disable all events */
/* If not set, enable requested
* first disable all events */
ret = lis3l02dq_disable_all_events(indio_dev);
if (ret < 0)
goto error_ret;
@ -239,7 +239,7 @@ static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
if (state == false) {
/*
* A possible quirk with the handler is currently worked around
* by ensuring outstanding read events are cleared.
* by ensuring outstanding read events are cleared.
*/
ret = lis3l02dq_read_all(indio_dev, NULL);
}
@ -250,7 +250,7 @@ static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
}
/**
* lis3l02dq_trig_try_reen() try renabling irq for data rdy trigger
* lis3l02dq_trig_try_reen() try reenabling irq for data rdy trigger
* @trig: the datardy trigger
*/
static int lis3l02dq_trig_try_reen(struct iio_trigger *trig)
@ -259,8 +259,8 @@ static int lis3l02dq_trig_try_reen(struct iio_trigger *trig)
struct lis3l02dq_state *st = iio_priv(indio_dev);
int i;
/* If gpio still high (or high again) */
/* In theory possible we will need to do this several times */
/* If gpio still high (or high again)
* In theory possible we will need to do this several times */
for (i = 0; i < 5; i++)
if (gpio_get_value(irq_to_gpio(st->us->irq)))
lis3l02dq_read_all(indio_dev, NULL);