e1000: Whitespace cleanup, cosmetic changes
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
This commit is contained in:
parent
699a712388
commit
8fc897b00a
5 changed files with 554 additions and 554 deletions
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@ -709,7 +709,6 @@ e1000_set_ringparam(struct net_device *netdev,
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}
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clear_bit(__E1000_RESETTING, &adapter->flags);
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return 0;
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err_setup_tx:
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e1000_free_all_rx_resources(adapter);
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@ -894,16 +893,17 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
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*data = 0;
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/* NOTE: we don't test MSI interrupts here, yet */
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/* Hook up test interrupt handler just for this test */
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if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED,
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netdev->name, netdev)) {
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netdev->name, netdev))
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shared_int = FALSE;
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} else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
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else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
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netdev->name, netdev)) {
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*data = 1;
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return -1;
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}
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DPRINTK(PROBE,INFO, "testing %s interrupt\n",
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DPRINTK(HW, INFO, "testing %s interrupt\n",
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(shared_int ? "shared" : "unshared"));
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/* Disable all the interrupts */
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@ -1269,11 +1269,10 @@ e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
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e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
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/* autoneg off */
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e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
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} else if (adapter->hw.phy_type == e1000_phy_gg82563) {
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} else if (adapter->hw.phy_type == e1000_phy_gg82563)
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e1000_write_phy_reg(&adapter->hw,
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GG82563_PHY_KMRN_MODE_CTRL,
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0x1CC);
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}
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ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
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@ -1301,9 +1300,9 @@ e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
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}
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if (adapter->hw.media_type == e1000_media_type_copper &&
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adapter->hw.phy_type == e1000_phy_m88) {
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adapter->hw.phy_type == e1000_phy_m88)
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ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
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} else {
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else {
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/* Set the ILOS bit on the fiber Nic is half
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* duplex link is detected. */
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stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
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@ -1439,11 +1438,10 @@ e1000_loopback_cleanup(struct e1000_adapter *adapter)
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case e1000_82546_rev_3:
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default:
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hw->autoneg = TRUE;
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if (hw->phy_type == e1000_phy_gg82563) {
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if (hw->phy_type == e1000_phy_gg82563)
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e1000_write_phy_reg(hw,
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GG82563_PHY_KMRN_MODE_CTRL,
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0x180);
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}
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e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
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if (phy_reg & MII_CR_LOOPBACK) {
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phy_reg &= ~MII_CR_LOOPBACK;
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@ -31,6 +31,7 @@
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* Shared functions for accessing and configuring the MAC
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*/
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#include "e1000_hw.h"
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static int32_t e1000_set_phy_type(struct e1000_hw *hw);
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@ -207,6 +208,7 @@ e1000_set_phy_type(struct e1000_hw *hw)
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return E1000_SUCCESS;
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}
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/******************************************************************************
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* IGP phy init script - initializes the GbE PHY
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*
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@ -912,7 +914,6 @@ e1000_init_hw(struct e1000_hw *hw)
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}
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if (hw->mac_type == e1000_82573) {
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uint32_t gcr = E1000_READ_REG(hw, GCR);
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gcr |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
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@ -1352,7 +1353,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
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return ret_val;
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}
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/* Wait 10ms for MAC to configure PHY from eeprom settings */
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/* Wait 15ms for MAC to configure PHY from eeprom settings */
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msec_delay(15);
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if (hw->mac_type != e1000_ich8lan) {
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/* Configure activity LED after PHY reset */
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@ -1425,12 +1426,12 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
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* resolution as hardware default. */
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if (hw->autoneg_advertised == ADVERTISE_1000_FULL) {
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/* Disable SmartSpeed */
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ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, &phy_data);
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ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
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&phy_data);
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if (ret_val)
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return ret_val;
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phy_data &= ~IGP01E1000_PSCFR_SMART_SPEED;
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ret_val = e1000_write_phy_reg(hw,
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IGP01E1000_PHY_PORT_CONFIG,
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ret_val = e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
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phy_data);
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if (ret_val)
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return ret_val;
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@ -1600,9 +1601,9 @@ e1000_copper_link_ggp_setup(struct e1000_hw *hw)
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return ret_val;
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phy_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
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ret_val = e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,
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phy_data);
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if (ret_val)
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return ret_val;
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}
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@ -1792,7 +1793,6 @@ e1000_copper_link_autoneg(struct e1000_hw *hw)
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return E1000_SUCCESS;
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}
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/******************************************************************************
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* Config the MAC and the PHY after link is up.
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* 1) Set up the MAC to the current PHY speed/duplex
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@ -2389,8 +2389,7 @@ e1000_phy_force_speed_duplex(struct e1000_hw *hw)
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return ret_val;
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if ((hw->mac_type == e1000_82544 || hw->mac_type == e1000_82543) &&
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(!hw->autoneg) &&
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(hw->forced_speed_duplex == e1000_10_full ||
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(!hw->autoneg) && (hw->forced_speed_duplex == e1000_10_full ||
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hw->forced_speed_duplex == e1000_10_half)) {
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ret_val = e1000_polarity_reversal_workaround(hw);
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if (ret_val)
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@ -2602,7 +2601,8 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
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* configuration of the MAC to match the "fc" parameter.
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*/
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if (((hw->media_type == e1000_media_type_fiber) && (hw->autoneg_failed)) ||
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((hw->media_type == e1000_media_type_internal_serdes) && (hw->autoneg_failed)) ||
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((hw->media_type == e1000_media_type_internal_serdes) &&
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(hw->autoneg_failed)) ||
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((hw->media_type == e1000_media_type_copper) && (!hw->autoneg))) {
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ret_val = e1000_force_mac_fc(hw);
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if (ret_val) {
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@ -3207,8 +3207,10 @@ e1000_shift_out_mdi_bits(struct e1000_hw *hw,
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* shifted out to the PHY by setting the MDIO bit to "0" and then
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* raising and lowering the clock.
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*/
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if(data & mask) ctrl |= E1000_CTRL_MDIO;
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else ctrl &= ~E1000_CTRL_MDIO;
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if (data & mask)
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ctrl |= E1000_CTRL_MDIO;
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else
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ctrl &= ~E1000_CTRL_MDIO;
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E1000_WRITE_REG(hw, CTRL, ctrl);
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E1000_WRITE_FLUSH(hw);
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@ -3264,7 +3266,8 @@ e1000_shift_in_mdi_bits(struct e1000_hw *hw)
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e1000_raise_mdi_clk(hw, &ctrl);
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ctrl = E1000_READ_REG(hw, CTRL);
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/* Check to see if we shifted in a "1". */
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if(ctrl & E1000_CTRL_MDIO) data |= 1;
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if (ctrl & E1000_CTRL_MDIO)
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data |= 1;
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e1000_lower_mdi_clk(hw, &ctrl);
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}
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@ -3582,7 +3585,7 @@ e1000_write_phy_reg_ex(struct e1000_hw *hw,
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E1000_WRITE_REG(hw, MDIC, mdic);
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/* Poll the ready bit to see if the MDI read completed */
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for(i = 0; i < 640; i++) {
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for (i = 0; i < 641; i++) {
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udelay(5);
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mdic = E1000_READ_REG(hw, MDIC);
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if (mdic & E1000_MDIC_READY) break;
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@ -3757,14 +3760,13 @@ e1000_phy_hw_reset(struct e1000_hw *hw)
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/* Wait for FW to finish PHY configuration. */
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ret_val = e1000_get_phy_cfg_done(hw);
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if (ret_val != E1000_SUCCESS)
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return ret_val;
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e1000_release_software_semaphore(hw);
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if ((hw->mac_type == e1000_ich8lan) &&
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(hw->phy_type == e1000_phy_igp_3)) {
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if ((hw->mac_type == e1000_ich8lan) && (hw->phy_type == e1000_phy_igp_3))
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ret_val = e1000_init_lcd_from_nvm(hw);
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if (ret_val)
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return ret_val;
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}
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return ret_val;
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}
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@ -3892,7 +3894,7 @@ e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw)
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return E1000_SUCCESS;
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/* Make sure link is up before proceeding. If not just return.
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* Attempting this while link is negotiating fouls up link
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* Attempting this while link is negotiating fouled up link
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* stability */
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ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
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ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data);
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@ -4053,7 +4055,7 @@ e1000_phy_reset_dsp(struct e1000_hw *hw)
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* hw - Struct containing variables accessed by shared code
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* phy_info - PHY information structure
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******************************************************************************/
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static int32_t
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int32_t
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e1000_phy_igp_get_info(struct e1000_hw *hw,
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struct e1000_phy_info *phy_info)
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{
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@ -6133,6 +6135,7 @@ e1000_setup_led(struct e1000_hw *hw)
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return E1000_SUCCESS;
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}
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/******************************************************************************
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* Used on 82571 and later Si that has LED blink bits.
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* Callers must use their own timer and should have already called
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@ -6320,7 +6323,7 @@ e1000_led_off(struct e1000_hw *hw)
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*
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* hw - Struct containing variables accessed by shared code
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*****************************************************************************/
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static void
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void
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e1000_clear_hw_cntrs(struct e1000_hw *hw)
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{
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volatile uint32_t temp;
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@ -7572,7 +7575,7 @@ e1000_mng_host_if_write(struct e1000_hw * hw, uint8_t *buffer,
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{
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uint8_t *tmp;
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uint8_t *bufptr = buffer;
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uint32_t data;
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uint32_t data = 0;
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uint16_t remaining, i, j, prev_bytes;
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/* sum = only sum of the data and it is not checksum */
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@ -7675,8 +7678,7 @@ e1000_mng_write_cmd_header(struct e1000_hw * hw,
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* returns - E1000_SUCCESS for success.
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****************************************************************************/
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static int32_t
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e1000_mng_write_commit(
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struct e1000_hw * hw)
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e1000_mng_write_commit(struct e1000_hw * hw)
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{
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uint32_t hicr;
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@ -697,6 +697,7 @@ union e1000_rx_desc_packet_split {
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E1000_RXDEXT_STATERR_CXE | \
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E1000_RXDEXT_STATERR_RXE)
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/* Transmit Descriptor */
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struct e1000_tx_desc {
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uint64_t buffer_addr; /* Address of the descriptor's data buffer */
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@ -2439,11 +2439,10 @@ e1000_watchdog(unsigned long data)
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* disable receives in the ISR and
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* reset device here in the watchdog
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*/
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if (adapter->hw.mac_type == e1000_80003es2lan) {
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if (adapter->hw.mac_type == e1000_80003es2lan)
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/* reset device */
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schedule_work(&adapter->reset_task);
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}
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}
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e1000_smartspeed(adapter);
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}
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