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cpupower: IvyBridge (0x3a and 0x3e models) support 

Signed-off-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Thomas Renninger 2012-11-27 13:17:49 +01:00 committed by Rafael J. Wysocki
parent c8cfc3c6bf
commit 8d219e3658
2 changed files with 10 additions and 2 deletions
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2
tools/power/cpupower/utils/helpers/cpuid.c
View File

@ -158,6 +158,8 @@ out:
cpu_info->caps |= CPUPOWER_CAP_HAS_TURBO_RATIO;
case 0x2A: /* SNB */
case 0x2D: /* SNB Xeon */
case 0x3A: /* IVB */
case 0x3E: /* IVB Xeon */
cpu_info->caps |= CPUPOWER_CAP_HAS_TURBO_RATIO;
cpu_info->caps |= CPUPOWER_CAP_IS_SNB;
break;

10
tools/power/cpupower/utils/idle_monitor/snb_idle.c
View File

@ -150,9 +150,15 @@ static struct cpuidle_monitor *snb_register(void)
|| cpupower_cpu_info.family != 6)
return NULL;
if (cpupower_cpu_info.model != 0x2A
&& cpupower_cpu_info.model != 0x2D)
switch (cpupower_cpu_info.model) {
case 0x2A: /* SNB */
case 0x2D: /* SNB Xeon */
case 0x3A: /* IVB */
case 0x3E: /* IVB Xeon */
break;
default:
return NULL;
}
is_valid = calloc(cpu_count, sizeof(int));
for (num = 0; num < SNB_CSTATE_COUNT; num++) {