DaVinci: DM646x - platform changes for vpif capture and display drivers
VPIF display changes (Chaithrika) Add platform device and resource structures. Also define a platform specific clock setup function that can be accessed by the driver to configure the clock and CPLD. VPIF caputure changes (Murali) 1) Modify vpif_subdev_info to add board_info, routing information and vpif interface configuration. Remove addr since it is part of board_info 2) Add code to setup channel mode and input decoder path for vpif capture driver Also incorporated comments against version v0 of the patch series and added a spinlock to protect writes to common registers Tested on DM6467 on channel 0 using TVP514x. Following bootargs used for drivers: vpif_capture.ch0_bufsize=829440 vpif_display.ch2_bufsize=829440 Signed-off-by: Manjunath Hadli <mrh@ti.com> Signed-off-by: Brijesh Jadav <brijesh.j@ti.com> Signed-off-by: Chaithrika U S <chaithrika@ti.com> Reviewed-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Muralidharan Karicheri <m-karicheri2@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Muralidharan Karicheri
Kevin Hilman
parent
51e68e27d3
commit
85609c1ccd
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@ -34,6 +34,8 @@
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#include <linux/i2c/pcf857x.h>
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#include <linux/etherdevice.h>
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#include <media/tvp514x.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@ -62,6 +64,30 @@
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#define DM646X_EVM_PHY_MASK (0x2)
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#define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
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#define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
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#define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
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#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
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#define VCH2CLK_SYSCLK8 (BIT(9))
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#define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
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#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
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#define VCH3CLK_SYSCLK8 (BIT(13))
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#define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
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#define VIDCH2CLK (BIT(10))
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#define VIDCH3CLK (BIT(11))
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#define VIDCH1CLK (BIT(4))
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#define TVP7002_INPUT (BIT(4))
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#define TVP5147_INPUT (~BIT(4))
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#define VPIF_INPUT_ONE_CHANNEL (BIT(5))
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#define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
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#define TVP5147_CH0 "tvp514x-0"
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#define TVP5147_CH1 "tvp514x-1"
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static void __iomem *vpif_vidclkctl_reg;
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static void __iomem *vpif_vsclkdis_reg;
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/* spin lock for updating above registers */
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static spinlock_t vpif_reg_lock;
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static struct davinci_uart_config uart_config __initdata = {
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.enabled_uarts = (1 << 0),
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};
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@ -287,6 +313,40 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
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},
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};
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static struct i2c_client *cpld_client;
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static int cpld_video_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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cpld_client = client;
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return 0;
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}
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static int __devexit cpld_video_remove(struct i2c_client *client)
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{
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cpld_client = NULL;
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return 0;
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}
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static const struct i2c_device_id cpld_video_id[] = {
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{ "cpld_video", 0 },
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{ }
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};
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static struct i2c_driver cpld_video_driver = {
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.driver = {
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.name = "cpld_video",
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},
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.probe = cpld_video_probe,
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.remove = cpld_video_remove,
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.id_table = cpld_video_id,
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};
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static void evm_init_cpld(void)
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{
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i2c_add_driver(&cpld_video_driver);
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}
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static struct i2c_board_info __initdata i2c_info[] = {
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{
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I2C_BOARD_INFO("24c256", 0x50),
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@ -301,7 +361,10 @@ static struct i2c_board_info __initdata i2c_info[] = {
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},
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{
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I2C_BOARD_INFO("tlv320aic33", 0x18),
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}
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},
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{
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I2C_BOARD_INFO("cpld_video", 0x3b),
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},
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};
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static struct davinci_i2c_platform_data i2c_pdata = {
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@ -309,11 +372,265 @@ static struct davinci_i2c_platform_data i2c_pdata = {
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.bus_delay = 0 /* usec */,
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};
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static int set_vpif_clock(int mux_mode, int hd)
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{
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unsigned long flags;
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unsigned int value;
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int val = 0;
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int err = 0;
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if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)
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return -ENXIO;
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/* disable the clock */
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spin_lock_irqsave(&vpif_reg_lock, flags);
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value = __raw_readl(vpif_vsclkdis_reg);
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value |= (VIDCH3CLK | VIDCH2CLK);
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__raw_writel(value, vpif_vsclkdis_reg);
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spin_unlock_irqrestore(&vpif_reg_lock, flags);
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val = i2c_smbus_read_byte(cpld_client);
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if (val < 0)
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return val;
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if (mux_mode == 1)
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val &= ~0x40;
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else
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val |= 0x40;
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err = i2c_smbus_write_byte(cpld_client, val);
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if (err)
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return err;
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value = __raw_readl(vpif_vidclkctl_reg);
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value &= ~(VCH2CLK_MASK);
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value &= ~(VCH3CLK_MASK);
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if (hd >= 1)
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value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
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else
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value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
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__raw_writel(value, vpif_vidclkctl_reg);
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spin_lock_irqsave(&vpif_reg_lock, flags);
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value = __raw_readl(vpif_vsclkdis_reg);
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/* enable the clock */
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value &= ~(VIDCH3CLK | VIDCH2CLK);
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__raw_writel(value, vpif_vsclkdis_reg);
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spin_unlock_irqrestore(&vpif_reg_lock, flags);
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return 0;
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}
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static struct vpif_subdev_info dm646x_vpif_subdev[] = {
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{
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.name = "adv7343",
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.board_info = {
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I2C_BOARD_INFO("adv7343", 0x2a),
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},
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},
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{
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.name = "ths7303",
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.board_info = {
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I2C_BOARD_INFO("ths7303", 0x2c),
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},
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},
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};
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static const char *output[] = {
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"Composite",
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"Component",
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"S-Video",
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};
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static struct vpif_display_config dm646x_vpif_display_config = {
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.set_clock = set_vpif_clock,
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.subdevinfo = dm646x_vpif_subdev,
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.subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
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.output = output,
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.output_count = ARRAY_SIZE(output),
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.card_name = "DM646x EVM",
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};
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/**
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* setup_vpif_input_path()
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* @channel: channel id (0 - CH0, 1 - CH1)
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* @sub_dev_name: ptr sub device name
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*
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* This will set vpif input to capture data from tvp514x or
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* tvp7002.
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*/
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static int setup_vpif_input_path(int channel, const char *sub_dev_name)
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{
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int err = 0;
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int val;
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/* for channel 1, we don't do anything */
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if (channel != 0)
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return 0;
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if (!cpld_client)
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return -ENXIO;
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val = i2c_smbus_read_byte(cpld_client);
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if (val < 0)
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return val;
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if (!strcmp(sub_dev_name, TVP5147_CH0) ||
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!strcmp(sub_dev_name, TVP5147_CH1))
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val &= TVP5147_INPUT;
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else
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val |= TVP7002_INPUT;
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err = i2c_smbus_write_byte(cpld_client, val);
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if (err)
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return err;
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return 0;
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}
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/**
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* setup_vpif_input_channel_mode()
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* @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
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*
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* This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
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*/
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static int setup_vpif_input_channel_mode(int mux_mode)
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{
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unsigned long flags;
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int err = 0;
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int val;
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u32 value;
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if (!vpif_vsclkdis_reg || !cpld_client)
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return -ENXIO;
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val = i2c_smbus_read_byte(cpld_client);
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if (val < 0)
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return val;
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spin_lock_irqsave(&vpif_reg_lock, flags);
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value = __raw_readl(vpif_vsclkdis_reg);
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if (mux_mode) {
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val &= VPIF_INPUT_TWO_CHANNEL;
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value |= VIDCH1CLK;
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} else {
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val |= VPIF_INPUT_ONE_CHANNEL;
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value &= ~VIDCH1CLK;
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}
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__raw_writel(value, vpif_vsclkdis_reg);
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spin_unlock_irqrestore(&vpif_reg_lock, flags);
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err = i2c_smbus_write_byte(cpld_client, val);
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if (err)
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return err;
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return 0;
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}
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static struct tvp514x_platform_data tvp5146_pdata = {
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.clk_polarity = 0,
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.hs_polarity = 1,
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.vs_polarity = 1
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};
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#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
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static struct vpif_subdev_info vpif_capture_sdev_info[] = {
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{
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.name = TVP5147_CH0,
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.board_info = {
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I2C_BOARD_INFO("tvp5146", 0x5d),
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.platform_data = &tvp5146_pdata,
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},
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.input = INPUT_CVBS_VI2B,
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.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
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.can_route = 1,
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.vpif_if = {
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.if_type = VPIF_IF_BT656,
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.hd_pol = 1,
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.vd_pol = 1,
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.fid_pol = 0,
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},
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},
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{
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.name = TVP5147_CH1,
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.board_info = {
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I2C_BOARD_INFO("tvp5146", 0x5c),
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.platform_data = &tvp5146_pdata,
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},
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.input = INPUT_SVIDEO_VI2C_VI1C,
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.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
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.can_route = 1,
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.vpif_if = {
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.if_type = VPIF_IF_BT656,
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.hd_pol = 1,
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.vd_pol = 1,
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.fid_pol = 0,
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},
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},
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};
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static const struct vpif_input dm6467_ch0_inputs[] = {
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{
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.input = {
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.index = 0,
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.name = "Composite",
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.type = V4L2_INPUT_TYPE_CAMERA,
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.std = TVP514X_STD_ALL,
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},
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.subdev_name = TVP5147_CH0,
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},
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};
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static const struct vpif_input dm6467_ch1_inputs[] = {
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{
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.input = {
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.index = 0,
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.name = "S-Video",
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.type = V4L2_INPUT_TYPE_CAMERA,
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.std = TVP514X_STD_ALL,
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},
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.subdev_name = TVP5147_CH1,
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},
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};
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static struct vpif_capture_config dm646x_vpif_capture_cfg = {
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.setup_input_path = setup_vpif_input_path,
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.setup_input_channel_mode = setup_vpif_input_channel_mode,
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.subdev_info = vpif_capture_sdev_info,
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.subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
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.chan_config[0] = {
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.inputs = dm6467_ch0_inputs,
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.input_count = ARRAY_SIZE(dm6467_ch0_inputs),
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},
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.chan_config[1] = {
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.inputs = dm6467_ch1_inputs,
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.input_count = ARRAY_SIZE(dm6467_ch1_inputs),
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},
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};
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static void __init evm_init_video(void)
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{
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vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);
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vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);
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if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {
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pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
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return;
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}
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spin_lock_init(&vpif_reg_lock);
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dm646x_setup_vpif(&dm646x_vpif_display_config,
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&dm646x_vpif_capture_cfg);
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}
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static void __init evm_init_i2c(void)
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{
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davinci_init_i2c(&i2c_pdata);
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i2c_add_driver(&dm6467evm_cpld_driver);
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i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
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evm_init_cpld();
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evm_init_video();
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}
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static void __init davinci_map_io(void)
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@ -32,6 +32,15 @@
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#include "clock.h"
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#include "mux.h"
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#define DAVINCI_VPIF_BASE (0x01C12000)
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#define VDD3P3V_PWDN_OFFSET (0x48)
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#define VSCLKDIS_OFFSET (0x6C)
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#define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\
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BIT_MASK(0))
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#define VSCLKDIS_MASK (BIT_MASK(11) | BIT_MASK(10) | BIT_MASK(9) |\
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BIT_MASK(8))
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/*
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* Device specific clocks
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*/
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@ -686,6 +695,75 @@ static struct platform_device dm646x_dit_device = {
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.id = -1,
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};
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static u64 vpif_dma_mask = DMA_BIT_MASK(32);
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static struct resource vpif_resource[] = {
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{
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.start = DAVINCI_VPIF_BASE,
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.end = DAVINCI_VPIF_BASE + 0x03ff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device vpif_dev = {
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.name = "vpif",
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.id = -1,
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.dev = {
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.dma_mask = &vpif_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = vpif_resource,
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.num_resources = ARRAY_SIZE(vpif_resource),
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};
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static struct resource vpif_display_resource[] = {
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{
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.start = IRQ_DM646X_VP_VERTINT2,
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.end = IRQ_DM646X_VP_VERTINT2,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_DM646X_VP_VERTINT3,
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.end = IRQ_DM646X_VP_VERTINT3,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device vpif_display_dev = {
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.name = "vpif_display",
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.id = -1,
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.dev = {
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.dma_mask = &vpif_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = vpif_display_resource,
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.num_resources = ARRAY_SIZE(vpif_display_resource),
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};
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static struct resource vpif_capture_resource[] = {
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{
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.start = IRQ_DM646X_VP_VERTINT0,
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.end = IRQ_DM646X_VP_VERTINT0,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_DM646X_VP_VERTINT1,
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.end = IRQ_DM646X_VP_VERTINT1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device vpif_capture_dev = {
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.name = "vpif_capture",
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.id = -1,
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.dev = {
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.dma_mask = &vpif_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.resource = vpif_capture_resource,
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.num_resources = ARRAY_SIZE(vpif_capture_resource),
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};
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/*----------------------------------------------------------------------*/
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||||
|
||||
static struct map_desc dm646x_io_desc[] = {
|
||||
|
|
@ -814,6 +892,32 @@ void __init dm646x_init_mcasp1(struct snd_platform_data *pdata)
|
|||
platform_device_register(&dm646x_dit_device);
|
||||
}
|
||||
|
||||
void dm646x_setup_vpif(struct vpif_display_config *display_config,
|
||||
struct vpif_capture_config *capture_config)
|
||||
{
|
||||
unsigned int value;
|
||||
void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
|
||||
|
||||
value = __raw_readl(base + VSCLKDIS_OFFSET);
|
||||
value &= ~VSCLKDIS_MASK;
|
||||
__raw_writel(value, base + VSCLKDIS_OFFSET);
|
||||
|
||||
value = __raw_readl(base + VDD3P3V_PWDN_OFFSET);
|
||||
value &= ~VDD3P3V_VID_MASK;
|
||||
__raw_writel(value, base + VDD3P3V_PWDN_OFFSET);
|
||||
|
||||
davinci_cfg_reg(DM646X_STSOMUX_DISABLE);
|
||||
davinci_cfg_reg(DM646X_STSIMUX_DISABLE);
|
||||
davinci_cfg_reg(DM646X_PTSOMUX_DISABLE);
|
||||
davinci_cfg_reg(DM646X_PTSIMUX_DISABLE);
|
||||
|
||||
vpif_display_dev.dev.platform_data = display_config;
|
||||
vpif_capture_dev.dev.platform_data = capture_config;
|
||||
platform_device_register(&vpif_dev);
|
||||
platform_device_register(&vpif_display_dev);
|
||||
platform_device_register(&vpif_capture_dev);
|
||||
}
|
||||
|
||||
void __init dm646x_init(void)
|
||||
{
|
||||
davinci_common_init(&davinci_soc_info_dm646x);
|
||||
|
|
|
|||
|
|
@ -14,6 +14,8 @@
|
|||
#include <mach/hardware.h>
|
||||
#include <mach/emac.h>
|
||||
#include <mach/asp.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/videodev2.h>
|
||||
|
||||
#define DM646X_EMAC_BASE (0x01C80000)
|
||||
#define DM646X_EMAC_CNTRL_OFFSET (0x0000)
|
||||
|
|
@ -29,4 +31,61 @@ void __init dm646x_init_ide(void);
|
|||
void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
|
||||
void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
|
||||
|
||||
void dm646x_video_init(void);
|
||||
|
||||
enum vpif_if_type {
|
||||
VPIF_IF_BT656,
|
||||
VPIF_IF_BT1120,
|
||||
VPIF_IF_RAW_BAYER
|
||||
};
|
||||
|
||||
struct vpif_interface {
|
||||
enum vpif_if_type if_type;
|
||||
unsigned hd_pol:1;
|
||||
unsigned vd_pol:1;
|
||||
unsigned fid_pol:1;
|
||||
};
|
||||
|
||||
struct vpif_subdev_info {
|
||||
const char *name;
|
||||
struct i2c_board_info board_info;
|
||||
u32 input;
|
||||
u32 output;
|
||||
unsigned can_route:1;
|
||||
struct vpif_interface vpif_if;
|
||||
};
|
||||
|
||||
struct vpif_display_config {
|
||||
int (*set_clock)(int, int);
|
||||
struct vpif_subdev_info *subdevinfo;
|
||||
int subdev_count;
|
||||
const char **output;
|
||||
int output_count;
|
||||
const char *card_name;
|
||||
};
|
||||
|
||||
struct vpif_input {
|
||||
struct v4l2_input input;
|
||||
const char *subdev_name;
|
||||
};
|
||||
|
||||
#define VPIF_CAPTURE_MAX_CHANNELS 2
|
||||
|
||||
struct vpif_capture_chan_config {
|
||||
const struct vpif_input *inputs;
|
||||
int input_count;
|
||||
};
|
||||
|
||||
struct vpif_capture_config {
|
||||
int (*setup_input_channel_mode)(int);
|
||||
int (*setup_input_path)(int, const char *);
|
||||
struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS];
|
||||
struct vpif_subdev_info *subdev_info;
|
||||
int subdev_count;
|
||||
const char *card_name;
|
||||
};
|
||||
|
||||
void dm646x_setup_vpif(struct vpif_display_config *,
|
||||
struct vpif_capture_config *);
|
||||
|
||||
#endif /* __ASM_ARCH_DM646X_H */
|
||||
|
|
|
|||
Reference in New Issue