ixgbe: DCB: enable RSS to be used with DCB
RSS had previously been disabled when DCB was enabled because DCB was single queued per traffic class. Now that DCB implements multiple Tx/Rx rings per traffic class enable RSS. Here RSS hashes across the queues in the traffic class. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain.@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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24095aa347
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8187cd485b
2 changed files with 25 additions and 9 deletions
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@ -129,7 +129,6 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
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netdev->netdev_ops->ndo_stop(netdev);
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ixgbe_clear_interrupt_scheme(adapter);
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adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
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switch (adapter->hw.mac.type) {
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case ixgbe_mac_82598EB:
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adapter->last_lfc_mode = adapter->hw.fc.current_mode;
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@ -162,7 +161,6 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
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adapter->temp_dcb_cfg.pfc_mode_enable = false;
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adapter->dcb_cfg.pfc_mode_enable = false;
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adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
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adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
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switch (adapter->hw.mac.type) {
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case ixgbe_mac_82599EB:
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case ixgbe_mac_X540:
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@ -2892,17 +2892,20 @@ static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
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);
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switch (mask) {
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#ifdef CONFIG_IXGBE_DCB
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case (IXGBE_FLAG_DCB_ENABLED | IXGBE_FLAG_RSS_ENABLED):
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mrqc = IXGBE_MRQC_RTRSS8TCEN;
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break;
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case (IXGBE_FLAG_DCB_ENABLED):
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mrqc = IXGBE_MRQC_RT8TCEN;
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break;
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#endif /* CONFIG_IXGBE_DCB */
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case (IXGBE_FLAG_RSS_ENABLED):
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mrqc = IXGBE_MRQC_RSSEN;
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break;
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case (IXGBE_FLAG_SRIOV_ENABLED):
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mrqc = IXGBE_MRQC_VMDQEN;
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break;
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#ifdef CONFIG_IXGBE_DCB
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case (IXGBE_FLAG_DCB_ENABLED):
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mrqc = IXGBE_MRQC_RT8TCEN;
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break;
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#endif /* CONFIG_IXGBE_DCB */
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default:
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break;
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}
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@ -3672,6 +3675,23 @@ static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
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/* reconfigure the hardware */
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ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
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/* Enable RSS Hash per TC */
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if (hw->mac.type != ixgbe_mac_82598EB) {
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int i;
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u32 reg = 0;
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for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
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u8 msb = 0;
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u8 cnt = adapter->netdev->tc_to_txq[i].count;
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while (cnt >>= 1)
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msb++;
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reg |= msb << IXGBE_RQTC_SHIFT_TC(i);
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}
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IXGBE_WRITE_REG(hw, IXGBE_RQTC, reg);
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}
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}
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#endif
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@ -7343,8 +7363,6 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
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if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
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adapter->flags &= ~(IXGBE_FLAG_RSS_ENABLED |
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IXGBE_FLAG_DCB_ENABLED);
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if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
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adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
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#ifdef CONFIG_IXGBE_DCB
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netdev->dcbnl_ops = &dcbnl_ops;
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