[SPARC64]: Virtualize IRQ numbers.
Inspired by PowerPC XICS interrupt support code. All IRQs are virtualized in order to keep NR_IRQS from needing to be too large. Interrupts on sparc64 are arbitrary 11-bit values, but we don't need to define NR_IRQS to 2048 if we virtualize the IRQs. As PCI and SBUS controller drivers build device IRQs, we divy out virtual IRQ numbers incrementally starting at 1. Zero is a special virtual IRQ used for the timer interrupt. So device drivers all see virtual IRQs, and all the normal interfaces such as request_irq(), enable_irq(), etc. translate that into a real IRQ number in order to configure the IRQ. At this point knowledge of the struct ino_bucket is almost entirely contained within arch/sparc64/kernel/irq.c There are a few small bits in the PCI controller drivers that need to be swept away before we can remove ino_bucket's definition out of asm-sparc64/irq.h and privately into kernel/irq.c Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
parent
37cdcd9e82
commit
8047e247c8
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@ -70,7 +70,10 @@ struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BY
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*/
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#define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
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static struct irqaction *irq_action[NR_IRQS];
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static struct irqaction timer_irq_action = {
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.name = "timer",
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};
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static struct irqaction *irq_action[NR_IRQS] = { &timer_irq_action, };
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/* This only synchronizes entities which modify IRQ handler
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* state and some selected user-level spots that want to
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@ -79,6 +82,59 @@ static struct irqaction *irq_action[NR_IRQS];
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*/
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static DEFINE_SPINLOCK(irq_action_lock);
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static unsigned int virt_to_real_irq_table[NR_IRQS];
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static unsigned char virt_irq_cur = 1;
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static unsigned char virt_irq_alloc(unsigned int real_irq)
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{
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unsigned char ent;
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BUILD_BUG_ON(NR_IRQS >= 256);
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ent = virt_irq_cur;
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if (ent >= NR_IRQS) {
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printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
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return 0;
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}
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virt_irq_cur = ent + 1;
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virt_to_real_irq_table[ent] = real_irq;
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return ent;
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}
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#if 0 /* Currently unused. */
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static unsigned char real_to_virt_irq(unsigned int real_irq)
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{
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struct ino_bucket *bucket = __bucket(real_irq);
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return bucket->virt_irq;
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}
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#endif
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static unsigned int virt_to_real_irq(unsigned char virt_irq)
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{
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return virt_to_real_irq_table[virt_irq];
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}
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void irq_install_pre_handler(int virt_irq,
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void (*func)(struct ino_bucket *, void *, void *),
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void *arg1, void *arg2)
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{
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unsigned int real_irq = virt_to_real_irq(virt_irq);
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struct ino_bucket *bucket;
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struct irq_desc *d;
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if (unlikely(!real_irq))
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return;
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bucket = __bucket(real_irq);
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d = bucket->irq_info;
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d->pre_handler = func;
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d->pre_handler_arg1 = arg1;
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d->pre_handler_arg2 = arg2;
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}
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static void register_irq_proc (unsigned int irq);
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/*
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@ -164,14 +220,18 @@ static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
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return tid;
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}
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/* Now these are always passed a true fully specified sun4u INO. */
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void enable_irq(unsigned int irq)
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void enable_irq(unsigned int virt_irq)
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{
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struct ino_bucket *bucket = __bucket(irq);
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unsigned int real_irq = virt_to_real_irq(virt_irq);
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struct ino_bucket *bucket;
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unsigned long imap, cpuid;
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if (unlikely(!real_irq))
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return;
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bucket = __bucket(real_irq);
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imap = bucket->imap;
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if (imap == 0UL)
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if (unlikely(imap == 0UL))
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return;
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preempt_disable();
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@ -182,7 +242,7 @@ void enable_irq(unsigned int irq)
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cpuid = real_hard_smp_processor_id();
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if (tlb_type == hypervisor) {
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unsigned int ino = __irq_ino(irq);
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unsigned int ino = __irq_ino(real_irq);
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int err;
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err = sun4v_intr_settarget(ino, cpuid);
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@ -211,34 +271,39 @@ void enable_irq(unsigned int irq)
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preempt_enable();
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}
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/* This now gets passed true ino's as well. */
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void disable_irq(unsigned int irq)
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void disable_irq(unsigned int virt_irq)
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{
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struct ino_bucket *bucket = __bucket(irq);
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unsigned int real_irq = virt_to_real_irq(virt_irq);
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struct ino_bucket *bucket;
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unsigned long imap;
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if (unlikely(!real_irq))
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return;
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bucket = __bucket(real_irq);
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imap = bucket->imap;
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if (imap != 0UL) {
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if (tlb_type == hypervisor) {
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unsigned int ino = __irq_ino(irq);
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int err;
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if (unlikely(imap == 0UL))
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return;
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err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
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if (err != HV_EOK)
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printk("sun4v_intr_setenabled(%x): "
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"err(%d)\n", ino, err);
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} else {
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u32 tmp;
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if (tlb_type == hypervisor) {
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unsigned int ino = __irq_ino(real_irq);
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int err;
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/* NOTE: We do not want to futz with the IRQ clear registers
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* and move the state to IDLE, the SCSI code does call
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* disable_irq() to assure atomicity in the queue cmd
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* SCSI adapter driver code. Thus we'd lose interrupts.
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*/
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tmp = upa_readl(imap);
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tmp &= ~IMAP_VALID;
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upa_writel(tmp, imap);
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}
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err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
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if (err != HV_EOK)
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printk("sun4v_intr_setenabled(%x): "
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"err(%d)\n", ino, err);
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} else {
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u32 tmp;
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/* NOTE: We do not want to futz with the IRQ clear registers
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* and move the state to IDLE, the SCSI code does call
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* disable_irq() to assure atomicity in the queue cmd
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* SCSI adapter driver code. Thus we'd lose interrupts.
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*/
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tmp = upa_readl(imap);
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tmp &= ~IMAP_VALID;
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upa_writel(tmp, imap);
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}
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}
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@ -253,14 +318,14 @@ static void build_irq_error(const char *msg, unsigned int ino, int inofixup,
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prom_halt();
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}
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unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
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unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap, unsigned char flags)
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{
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struct ino_bucket *bucket;
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int ino;
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BUG_ON(tlb_type == hypervisor);
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/* RULE: Both must be specified in all other cases. */
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/* RULE: Both must be specified. */
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if (iclr == 0UL || imap == 0UL) {
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prom_printf("Invalid build_irq %d %016lx %016lx\n",
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inofixup, iclr, imap);
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@ -298,10 +363,12 @@ unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
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*/
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bucket->imap = imap;
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bucket->iclr = iclr;
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bucket->flags = 0;
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if (!bucket->virt_irq)
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bucket->virt_irq = virt_irq_alloc(__irq(bucket));
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bucket->flags = flags;
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out:
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return __irq(bucket);
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return bucket->virt_irq;
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}
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unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, unsigned char flags)
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@ -322,7 +389,8 @@ unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, unsigned char f
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*/
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bucket->imap = ~0UL - sysino;
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bucket->iclr = ~0UL - sysino;
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if (!bucket->virt_irq)
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bucket->virt_irq = virt_irq_alloc(__irq(bucket));
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bucket->flags = flags;
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bucket->irq_info = kzalloc(sizeof(struct irq_desc), GFP_ATOMIC);
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@ -331,7 +399,7 @@ unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, unsigned char f
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prom_halt();
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}
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return __irq(bucket);
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return bucket->virt_irq;
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}
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static void atomic_bucket_insert(struct ino_bucket *bucket)
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@ -390,37 +458,42 @@ static struct irqaction *get_action_slot(struct ino_bucket *bucket)
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return NULL;
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}
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int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs *),
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int request_irq(unsigned int virt_irq,
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irqreturn_t (*handler)(int, void *, struct pt_regs *),
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unsigned long irqflags, const char *name, void *dev_id)
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{
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struct irqaction *action;
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struct ino_bucket *bucket = __bucket(irq);
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struct ino_bucket *bucket;
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unsigned long flags;
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unsigned int real_irq;
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int pending = 0;
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real_irq = virt_to_real_irq(virt_irq);
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if (unlikely(!real_irq))
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return -EINVAL;
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if (unlikely(!handler))
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return -EINVAL;
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bucket = __bucket(real_irq);
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if (unlikely(!bucket->irq_info))
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return -ENODEV;
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if (irqflags & SA_SAMPLE_RANDOM) {
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/*
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* This function might sleep, we want to call it first,
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* outside of the atomic block. In SA_STATIC_ALLOC case,
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* random driver's kmalloc will fail, but it is safe.
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* If already initialized, random driver will not reinit.
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* Yes, this might clear the entropy pool if the wrong
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* driver is attempted to be loaded, without actually
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* installing a new handler, but is this really a problem,
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* only the sysadmin is able to do this.
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*/
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rand_initialize_irq(PIL_DEVICE_IRQ);
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* This function might sleep, we want to call it first,
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* outside of the atomic block.
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* Yes, this might clear the entropy pool if the wrong
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* driver is attempted to be loaded, without actually
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* installing a new handler, but is this really a problem,
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* only the sysadmin is able to do this.
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*/
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rand_initialize_irq(virt_irq);
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}
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spin_lock_irqsave(&irq_action_lock, flags);
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if (check_irq_sharing(PIL_DEVICE_IRQ, irqflags)) {
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if (check_irq_sharing(virt_irq, irqflags)) {
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spin_unlock_irqrestore(&irq_action_lock, flags);
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return -EBUSY;
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}
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@ -441,12 +514,12 @@ int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_
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action->name = name;
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action->next = NULL;
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action->dev_id = dev_id;
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put_ino_in_irqaction(action, irq);
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put_ino_in_irqaction(action, __irq_ino(real_irq));
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put_smpaff_in_irqaction(action, CPU_MASK_NONE);
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append_irq_action(PIL_DEVICE_IRQ, action);
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append_irq_action(virt_irq, action);
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enable_irq(irq);
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enable_irq(virt_irq);
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/* We ate the IVEC already, this makes sure it does not get lost. */
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if (pending) {
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@ -456,7 +529,7 @@ int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_
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spin_unlock_irqrestore(&irq_action_lock, flags);
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register_irq_proc(__irq_ino(irq));
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register_irq_proc(virt_irq);
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#ifdef CONFIG_SMP
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distribute_irqs();
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@ -466,17 +539,17 @@ int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_
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EXPORT_SYMBOL(request_irq);
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static struct irqaction *unlink_irq_action(unsigned int irq, void *dev_id)
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static struct irqaction *unlink_irq_action(unsigned int virt_irq, void *dev_id)
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{
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struct irqaction *action, **pp;
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pp = irq_action + PIL_DEVICE_IRQ;
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pp = irq_action + virt_irq;
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action = *pp;
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if (unlikely(!action))
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return NULL;
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if (unlikely(!action->handler)) {
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printk("Freeing free IRQ %d\n", PIL_DEVICE_IRQ);
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printk("Freeing free IRQ %d\n", virt_irq);
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return NULL;
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}
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@ -491,28 +564,33 @@ static struct irqaction *unlink_irq_action(unsigned int irq, void *dev_id)
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return action;
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}
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void free_irq(unsigned int irq, void *dev_id)
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void free_irq(unsigned int virt_irq, void *dev_id)
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{
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struct irqaction *action;
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struct ino_bucket *bucket;
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struct irq_desc *desc;
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unsigned long flags;
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unsigned int real_irq;
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int ent, i;
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real_irq = virt_to_real_irq(virt_irq);
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if (unlikely(!real_irq))
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return;
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spin_lock_irqsave(&irq_action_lock, flags);
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action = unlink_irq_action(irq, dev_id);
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action = unlink_irq_action(virt_irq, dev_id);
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spin_unlock_irqrestore(&irq_action_lock, flags);
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if (unlikely(!action))
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return;
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synchronize_irq(irq);
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synchronize_irq(virt_irq);
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spin_lock_irqsave(&irq_action_lock, flags);
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bucket = __bucket(irq);
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bucket = __bucket(real_irq);
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desc = bucket->irq_info;
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for (i = 0; i < MAX_IRQ_DESC_ACTION; i++) {
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@ -545,7 +623,7 @@ void free_irq(unsigned int irq, void *dev_id)
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* the same IMAP are active.
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*/
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if (ent == NUM_IVECS)
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disable_irq(irq);
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disable_irq(virt_irq);
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}
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spin_unlock_irqrestore(&irq_action_lock, flags);
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@ -554,10 +632,15 @@ void free_irq(unsigned int irq, void *dev_id)
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EXPORT_SYMBOL(free_irq);
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#ifdef CONFIG_SMP
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void synchronize_irq(unsigned int irq)
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void synchronize_irq(unsigned int virt_irq)
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{
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struct ino_bucket *bucket = __bucket(irq);
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unsigned int real_irq = virt_to_real_irq(virt_irq);
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struct ino_bucket *bucket;
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if (unlikely(!real_irq))
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return;
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bucket = __bucket(real_irq);
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#if 0
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/* The following is how I wish I could implement this.
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* Unfortunately the ICLR registers are read-only, you can
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@ -616,7 +699,7 @@ static void process_bucket(struct ino_bucket *bp, struct pt_regs *regs)
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action_mask &= ~mask;
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if (p->handler(__irq(bp), p->dev_id, regs) == IRQ_HANDLED)
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if (p->handler(bp->virt_irq, p->dev_id, regs) == IRQ_HANDLED)
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random |= p->flags;
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if (!action_mask)
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@ -637,7 +720,7 @@ static void process_bucket(struct ino_bucket *bp, struct pt_regs *regs)
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/* Test and add entropy */
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if (random & SA_SAMPLE_RANDOM)
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add_interrupt_randomness(PIL_DEVICE_IRQ);
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add_interrupt_randomness(bp->virt_irq);
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out:
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bp->flags &= ~IBF_INPROGRESS;
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}
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@ -657,7 +740,7 @@ void timer_irq(int irq, struct pt_regs *regs)
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clear_softint(clr_mask);
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irq_enter();
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kstat_this_cpu.irqs[irq]++;
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kstat_this_cpu.irqs[0]++;
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timer_interrupt(irq, NULL, regs);
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irq_exit();
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}
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@ -1022,13 +1105,13 @@ void __init init_IRQ(void)
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: "g1");
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}
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static struct proc_dir_entry * root_irq_dir;
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static struct proc_dir_entry * irq_dir [NUM_IVECS];
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static struct proc_dir_entry *root_irq_dir;
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static struct proc_dir_entry *irq_dir[NR_IRQS];
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#ifdef CONFIG_SMP
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static int irq_affinity_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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static int irq_affinity_read_proc(char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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struct ino_bucket *bp = ivector_table + (long)data;
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struct irq_desc *desc = bp->irq_info;
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@ -1047,11 +1130,20 @@ static int irq_affinity_read_proc (char *page, char **start, off_t off,
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return len;
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}
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static inline void set_intr_affinity(int irq, cpumask_t hw_aff)
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static inline void set_intr_affinity(int virt_irq, cpumask_t hw_aff)
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{
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struct ino_bucket *bp = ivector_table + irq;
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struct irq_desc *desc = bp->irq_info;
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struct irqaction *ap = desc->action;
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struct ino_bucket *bp;
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struct irq_desc *desc;
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struct irqaction *ap;
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unsigned int real_irq;
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|
||||
real_irq = virt_to_real_irq(virt_irq);
|
||||
if (unlikely(!real_irq))
|
||||
return;
|
||||
|
||||
bp = __bucket(real_irq);
|
||||
desc = bp->irq_info;
|
||||
ap = desc->action;
|
||||
|
||||
/* Users specify affinity in terms of hw cpu ids.
|
||||
* As soon as we do this, handler_irq() might see and take action.
|
||||
|
|
@ -1060,13 +1152,16 @@ static inline void set_intr_affinity(int irq, cpumask_t hw_aff)
|
|||
|
||||
/* Migration is simply done by the next cpu to service this
|
||||
* interrupt.
|
||||
*
|
||||
* XXX Broken, this doesn't happen anymore...
|
||||
*/
|
||||
}
|
||||
|
||||
static int irq_affinity_write_proc (struct file *file, const char __user *buffer,
|
||||
unsigned long count, void *data)
|
||||
static int irq_affinity_write_proc(struct file *file,
|
||||
const char __user *buffer,
|
||||
unsigned long count, void *data)
|
||||
{
|
||||
int irq = (long) data, full_count = count, err;
|
||||
int virt_irq = (long) data, full_count = count, err;
|
||||
cpumask_t new_value;
|
||||
|
||||
err = cpumask_parse(buffer, count, new_value);
|
||||
|
|
@ -1080,7 +1175,7 @@ static int irq_affinity_write_proc (struct file *file, const char __user *buffer
|
|||
if (cpus_empty(new_value))
|
||||
return -EINVAL;
|
||||
|
||||
set_intr_affinity(irq, new_value);
|
||||
set_intr_affinity(virt_irq, new_value);
|
||||
|
||||
return full_count;
|
||||
}
|
||||
|
|
@ -1089,18 +1184,18 @@ static int irq_affinity_write_proc (struct file *file, const char __user *buffer
|
|||
|
||||
#define MAX_NAMELEN 10
|
||||
|
||||
static void register_irq_proc (unsigned int irq)
|
||||
static void register_irq_proc(unsigned int virt_irq)
|
||||
{
|
||||
char name [MAX_NAMELEN];
|
||||
|
||||
if (!root_irq_dir || irq_dir[irq])
|
||||
if (!root_irq_dir || irq_dir[virt_irq])
|
||||
return;
|
||||
|
||||
memset(name, 0, MAX_NAMELEN);
|
||||
sprintf(name, "%x", irq);
|
||||
sprintf(name, "%d", virt_irq);
|
||||
|
||||
/* create /proc/irq/1234 */
|
||||
irq_dir[irq] = proc_mkdir(name, root_irq_dir);
|
||||
irq_dir[virt_irq] = proc_mkdir(name, root_irq_dir);
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
/* XXX SMP affinity not supported on starfire yet. */
|
||||
|
|
@ -1112,7 +1207,7 @@ static void register_irq_proc (unsigned int irq)
|
|||
|
||||
if (entry) {
|
||||
entry->nlink = 1;
|
||||
entry->data = (void *)(long)irq;
|
||||
entry->data = (void *)(long)virt_irq;
|
||||
entry->read_proc = irq_affinity_read_proc;
|
||||
entry->write_proc = irq_affinity_write_proc;
|
||||
}
|
||||
|
|
@ -1120,7 +1215,7 @@ static void register_irq_proc (unsigned int irq)
|
|||
#endif
|
||||
}
|
||||
|
||||
void init_irq_proc (void)
|
||||
void init_irq_proc(void)
|
||||
{
|
||||
/* create /proc/irq */
|
||||
root_irq_dir = proc_mkdir("irq", NULL);
|
||||
|
|
|
|||
|
|
@ -280,7 +280,6 @@ static unsigned int psycho_irq_build(struct pci_pbm_info *pbm,
|
|||
struct pci_dev *pdev,
|
||||
unsigned int ino)
|
||||
{
|
||||
struct ino_bucket *bucket;
|
||||
unsigned long imap, iclr;
|
||||
unsigned long imap_off, iclr_off;
|
||||
int inofixup = 0;
|
||||
|
|
@ -309,10 +308,7 @@ static unsigned int psycho_irq_build(struct pci_pbm_info *pbm,
|
|||
if ((ino & 0x20) == 0)
|
||||
inofixup = ino & 0x03;
|
||||
|
||||
bucket = __bucket(build_irq(inofixup, iclr, imap));
|
||||
bucket->flags |= IBF_PCI;
|
||||
|
||||
return __irq(bucket);
|
||||
return build_irq(inofixup, iclr, imap, IBF_PCI);
|
||||
}
|
||||
|
||||
/* PSYCHO error handling support. */
|
||||
|
|
|
|||
|
|
@ -544,10 +544,10 @@ static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
|
|||
struct pci_dev *pdev,
|
||||
unsigned int ino)
|
||||
{
|
||||
struct ino_bucket *bucket;
|
||||
unsigned long imap, iclr;
|
||||
unsigned long imap_off, iclr_off;
|
||||
int inofixup = 0;
|
||||
int virt_irq;
|
||||
|
||||
ino &= PCI_IRQ_INO;
|
||||
if (ino < SABRE_ONBOARD_IRQ_BASE) {
|
||||
|
|
@ -573,23 +573,23 @@ static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
|
|||
if ((ino & 0x20) == 0)
|
||||
inofixup = ino & 0x03;
|
||||
|
||||
bucket = __bucket(build_irq(inofixup, iclr, imap));
|
||||
bucket->flags |= IBF_PCI;
|
||||
virt_irq = build_irq(inofixup, iclr, imap, IBF_PCI);
|
||||
|
||||
if (pdev) {
|
||||
struct pcidev_cookie *pcp = pdev->sysdata;
|
||||
|
||||
if (pdev->bus->number != pcp->pbm->pci_first_busno) {
|
||||
struct pci_controller_info *p = pcp->pbm->parent;
|
||||
struct irq_desc *d = bucket->irq_info;
|
||||
|
||||
d->pre_handler = sabre_wsync_handler;
|
||||
d->pre_handler_arg1 = pdev;
|
||||
d->pre_handler_arg2 = (void *)
|
||||
p->pbm_A.controller_regs + SABRE_WRSYNC;
|
||||
irq_install_pre_handler(virt_irq,
|
||||
sabre_wsync_handler,
|
||||
pdev,
|
||||
(void *)
|
||||
p->pbm_A.controller_regs +
|
||||
SABRE_WRSYNC);
|
||||
}
|
||||
}
|
||||
return __irq(bucket);
|
||||
return virt_irq;
|
||||
}
|
||||
|
||||
/* SABRE error handling support. */
|
||||
|
|
|
|||
|
|
@ -270,25 +270,33 @@ static void tomatillo_wsync_handler(struct ino_bucket *bucket, void *_arg1, void
|
|||
}
|
||||
}
|
||||
|
||||
static unsigned long schizo_ino_to_iclr(struct pci_pbm_info *pbm,
|
||||
unsigned int ino)
|
||||
{
|
||||
ino &= PCI_IRQ_INO;
|
||||
return pbm->pbm_regs + schizo_iclr_offset(ino) + 4;
|
||||
}
|
||||
|
||||
static unsigned long schizo_ino_to_imap(struct pci_pbm_info *pbm,
|
||||
unsigned int ino)
|
||||
{
|
||||
ino &= PCI_IRQ_INO;
|
||||
return pbm->pbm_regs + schizo_imap_offset(ino) + 4;
|
||||
}
|
||||
|
||||
static unsigned int schizo_irq_build(struct pci_pbm_info *pbm,
|
||||
struct pci_dev *pdev,
|
||||
unsigned int ino)
|
||||
{
|
||||
struct ino_bucket *bucket;
|
||||
unsigned long imap, iclr;
|
||||
unsigned long imap_off, iclr_off;
|
||||
int ign_fixup;
|
||||
int virt_irq;
|
||||
|
||||
ino &= PCI_IRQ_INO;
|
||||
imap_off = schizo_imap_offset(ino);
|
||||
|
||||
/* Now build the IRQ bucket. */
|
||||
imap = pbm->pbm_regs + imap_off;
|
||||
imap += 4;
|
||||
|
||||
iclr_off = schizo_iclr_offset(ino);
|
||||
iclr = pbm->pbm_regs + iclr_off;
|
||||
iclr += 4;
|
||||
imap = schizo_ino_to_imap(pbm, ino);
|
||||
iclr = schizo_ino_to_iclr(pbm, ino);
|
||||
|
||||
/* On Schizo, no inofixup occurs. This is because each
|
||||
* INO has it's own IMAP register. On Psycho and Sabre
|
||||
|
|
@ -305,19 +313,17 @@ static unsigned int schizo_irq_build(struct pci_pbm_info *pbm,
|
|||
ign_fixup = (1 << 6);
|
||||
}
|
||||
|
||||
bucket = __bucket(build_irq(ign_fixup, iclr, imap));
|
||||
bucket->flags |= IBF_PCI;
|
||||
virt_irq = build_irq(ign_fixup, iclr, imap, IBF_PCI);
|
||||
|
||||
if (pdev && pbm->chip_type == PBM_CHIP_TYPE_TOMATILLO) {
|
||||
struct irq_desc *p = bucket->irq_info;
|
||||
|
||||
p->pre_handler = tomatillo_wsync_handler;
|
||||
p->pre_handler_arg1 = ((pbm->chip_version <= 4) ?
|
||||
(void *) 1 : (void *) 0);
|
||||
p->pre_handler_arg2 = (void *) pbm->sync_reg;
|
||||
irq_install_pre_handler(virt_irq,
|
||||
tomatillo_wsync_handler,
|
||||
((pbm->chip_version <= 4) ?
|
||||
(void *) 1 : (void *) 0),
|
||||
(void *) pbm->sync_reg);
|
||||
}
|
||||
|
||||
return __irq(bucket);
|
||||
return virt_irq;
|
||||
}
|
||||
|
||||
/* SCHIZO error handling support. */
|
||||
|
|
@ -358,7 +364,6 @@ struct pci_pbm_info *pbm_for_ino(struct pci_controller_info *p, u32 ino)
|
|||
static void schizo_clear_other_err_intr(struct pci_controller_info *p, int irq)
|
||||
{
|
||||
struct pci_pbm_info *pbm;
|
||||
struct ino_bucket *bucket;
|
||||
unsigned long iclr;
|
||||
|
||||
/* Do not clear the interrupt for the other PCI bus.
|
||||
|
|
@ -376,11 +381,11 @@ static void schizo_clear_other_err_intr(struct pci_controller_info *p, int irq)
|
|||
else
|
||||
pbm = &p->pbm_A;
|
||||
|
||||
irq = schizo_irq_build(pbm, NULL,
|
||||
(pbm->portid << 6) | (irq & IMAP_INO));
|
||||
bucket = __bucket(irq);
|
||||
iclr = bucket->iclr;
|
||||
schizo_irq_build(pbm, NULL,
|
||||
(pbm->portid << 6) | (irq & IMAP_INO));
|
||||
|
||||
iclr = schizo_ino_to_iclr(pbm,
|
||||
(pbm->portid << 6) | (irq & IMAP_INO));
|
||||
upa_writel(ICLR_IDLE, iclr);
|
||||
}
|
||||
|
||||
|
|
@ -1125,7 +1130,6 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
|
|||
{
|
||||
struct pci_pbm_info *pbm;
|
||||
unsigned int irq;
|
||||
struct ino_bucket *bucket;
|
||||
u64 tmp, err_mask, err_no_mask;
|
||||
|
||||
/* Build IRQs and register handlers. */
|
||||
|
|
@ -1137,8 +1141,7 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
|
|||
pbm->name);
|
||||
prom_halt();
|
||||
}
|
||||
bucket = __bucket(irq);
|
||||
tmp = upa_readl(bucket->imap);
|
||||
tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO));
|
||||
upa_writel(tmp, (pbm->pbm_regs +
|
||||
schizo_imap_offset(SCHIZO_UE_INO) + 4));
|
||||
|
||||
|
|
@ -1150,8 +1153,7 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
|
|||
pbm->name);
|
||||
prom_halt();
|
||||
}
|
||||
bucket = __bucket(irq);
|
||||
tmp = upa_readl(bucket->imap);
|
||||
tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO));
|
||||
upa_writel(tmp, (pbm->pbm_regs +
|
||||
schizo_imap_offset(SCHIZO_CE_INO) + 4));
|
||||
|
||||
|
|
@ -1164,8 +1166,8 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
|
|||
pbm->name);
|
||||
prom_halt();
|
||||
}
|
||||
bucket = __bucket(irq);
|
||||
tmp = upa_readl(bucket->imap);
|
||||
tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
|
||||
SCHIZO_PCIERR_A_INO)));
|
||||
upa_writel(tmp, (pbm->pbm_regs +
|
||||
schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
|
||||
|
||||
|
|
@ -1178,8 +1180,8 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
|
|||
pbm->name);
|
||||
prom_halt();
|
||||
}
|
||||
bucket = __bucket(irq);
|
||||
tmp = upa_readl(bucket->imap);
|
||||
tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
|
||||
SCHIZO_PCIERR_B_INO)));
|
||||
upa_writel(tmp, (pbm->pbm_regs +
|
||||
schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
|
||||
|
||||
|
|
@ -1191,8 +1193,8 @@ static void tomatillo_register_error_handlers(struct pci_controller_info *p)
|
|||
pbm->name);
|
||||
prom_halt();
|
||||
}
|
||||
bucket = __bucket(irq);
|
||||
tmp = upa_readl(bucket->imap);
|
||||
tmp = upa_readl(schizo_ino_to_imap(pbm, ((pbm->portid << 6) |
|
||||
SCHIZO_SERR_INO)));
|
||||
upa_writel(tmp, (pbm->pbm_regs +
|
||||
schizo_imap_offset(SCHIZO_SERR_INO) + 4));
|
||||
|
||||
|
|
@ -1263,7 +1265,6 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
|
|||
{
|
||||
struct pci_pbm_info *pbm;
|
||||
unsigned int irq;
|
||||
struct ino_bucket *bucket;
|
||||
u64 tmp, err_mask, err_no_mask;
|
||||
|
||||
/* Build IRQs and register handlers. */
|
||||
|
|
@ -1275,8 +1276,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
|
|||
pbm->name);
|
||||
prom_halt();
|
||||
}
|
||||
bucket = __bucket(irq);
|
||||
tmp = upa_readl(bucket->imap);
|
||||
tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_UE_INO));
|
||||
upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_UE_INO) + 4));
|
||||
|
||||
pbm = pbm_for_ino(p, SCHIZO_CE_INO);
|
||||
|
|
@ -1287,8 +1287,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
|
|||
pbm->name);
|
||||
prom_halt();
|
||||
}
|
||||
bucket = __bucket(irq);
|
||||
tmp = upa_readl(bucket->imap);
|
||||
tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_CE_INO));
|
||||
upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_CE_INO) + 4));
|
||||
|
||||
pbm = pbm_for_ino(p, SCHIZO_PCIERR_A_INO);
|
||||
|
|
@ -1299,8 +1298,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
|
|||
pbm->name);
|
||||
prom_halt();
|
||||
}
|
||||
bucket = __bucket(irq);
|
||||
tmp = upa_readl(bucket->imap);
|
||||
tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_A_INO));
|
||||
upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_A_INO) + 4));
|
||||
|
||||
pbm = pbm_for_ino(p, SCHIZO_PCIERR_B_INO);
|
||||
|
|
@ -1311,8 +1309,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
|
|||
pbm->name);
|
||||
prom_halt();
|
||||
}
|
||||
bucket = __bucket(irq);
|
||||
tmp = upa_readl(bucket->imap);
|
||||
tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_PCIERR_B_INO));
|
||||
upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_PCIERR_B_INO) + 4));
|
||||
|
||||
pbm = pbm_for_ino(p, SCHIZO_SERR_INO);
|
||||
|
|
@ -1323,8 +1320,7 @@ static void schizo_register_error_handlers(struct pci_controller_info *p)
|
|||
pbm->name);
|
||||
prom_halt();
|
||||
}
|
||||
bucket = __bucket(irq);
|
||||
tmp = upa_readl(bucket->imap);
|
||||
tmp = upa_readl(schizo_ino_to_imap(pbm, (pbm->portid << 6) | SCHIZO_SERR_INO));
|
||||
upa_writel(tmp, (pbm->pbm_regs + schizo_imap_offset(SCHIZO_SERR_INO) + 4));
|
||||
|
||||
/* Enable UE and CE interrupts for controller. */
|
||||
|
|
|
|||
|
|
@ -821,7 +821,7 @@ unsigned int sbus_build_irq(void *buscookie, unsigned int ino)
|
|||
|
||||
iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
|
||||
}
|
||||
return build_irq(sbus_level, iclr, imap);
|
||||
return build_irq(sbus_level, iclr, imap, 0);
|
||||
}
|
||||
|
||||
/* Error interrupt handling. */
|
||||
|
|
|
|||
|
|
@ -98,13 +98,22 @@ extern struct ino_bucket ivector_table[NUM_IVECS];
|
|||
#define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq))
|
||||
#define __irq(bucket) ((unsigned int)(unsigned long)(bucket))
|
||||
|
||||
#define NR_IRQS 16
|
||||
/* The largest number of unique interrupt sources we support.
|
||||
* If this needs to ever be larger than 255, you need to change
|
||||
* the type of ino_bucket->virt_irq as appropriate.
|
||||
*
|
||||
* ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq().
|
||||
*/
|
||||
#define NR_IRQS 255
|
||||
|
||||
extern void irq_install_pre_handler(int virt_irq,
|
||||
void (*func)(struct ino_bucket *, void *, void *),
|
||||
void *arg1, void *arg2);
|
||||
#define irq_canonicalize(irq) (irq)
|
||||
extern void disable_irq(unsigned int);
|
||||
#define disable_irq_nosync disable_irq
|
||||
extern void enable_irq(unsigned int);
|
||||
extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
|
||||
extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap, unsigned char flags);
|
||||
extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino, unsigned char flags);
|
||||
extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
|
||||
|
||||
|
|
|
|||
Reference in New Issue