MIPS: i8259: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2185/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -55,8 +55,8 @@ static inline void smtc_im_ack_irq(unsigned int irq)
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#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
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#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
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#include <linux/cpumask.h>
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#include <linux/cpumask.h>
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extern int plat_set_irq_affinity(unsigned int irq,
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extern int plat_set_irq_affinity(struct irq_data *d,
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const struct cpumask *affinity);
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const struct cpumask *affinity, bool force);
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extern void smtc_forward_irq(unsigned int irq);
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extern void smtc_forward_irq(unsigned int irq);
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/*
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/*
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@ -31,19 +31,19 @@
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static int i8259A_auto_eoi = -1;
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static int i8259A_auto_eoi = -1;
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DEFINE_RAW_SPINLOCK(i8259A_lock);
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DEFINE_RAW_SPINLOCK(i8259A_lock);
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static void disable_8259A_irq(unsigned int irq);
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static void disable_8259A_irq(struct irq_data *d);
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static void enable_8259A_irq(unsigned int irq);
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static void enable_8259A_irq(struct irq_data *d);
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static void mask_and_ack_8259A(unsigned int irq);
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static void mask_and_ack_8259A(struct irq_data *d);
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static void init_8259A(int auto_eoi);
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static void init_8259A(int auto_eoi);
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static struct irq_chip i8259A_chip = {
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static struct irq_chip i8259A_chip = {
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.name = "XT-PIC",
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.name = "XT-PIC",
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.mask = disable_8259A_irq,
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.irq_mask = disable_8259A_irq,
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.disable = disable_8259A_irq,
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.irq_disable = disable_8259A_irq,
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.unmask = enable_8259A_irq,
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.irq_unmask = enable_8259A_irq,
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.mask_ack = mask_and_ack_8259A,
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.irq_mask_ack = mask_and_ack_8259A,
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#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
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#ifdef CONFIG_MIPS_MT_SMTC_IRQAFF
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.set_affinity = plat_set_irq_affinity,
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.irq_set_affinity = plat_set_irq_affinity,
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#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
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#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
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};
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};
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@ -59,12 +59,11 @@ static unsigned int cached_irq_mask = 0xffff;
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#define cached_master_mask (cached_irq_mask)
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#define cached_master_mask (cached_irq_mask)
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#define cached_slave_mask (cached_irq_mask >> 8)
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#define cached_slave_mask (cached_irq_mask >> 8)
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static void disable_8259A_irq(unsigned int irq)
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static void disable_8259A_irq(struct irq_data *d)
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{
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{
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unsigned int mask;
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unsigned int mask, irq = d->irq - I8259A_IRQ_BASE;
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unsigned long flags;
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unsigned long flags;
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irq -= I8259A_IRQ_BASE;
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mask = 1 << irq;
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mask = 1 << irq;
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raw_spin_lock_irqsave(&i8259A_lock, flags);
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raw_spin_lock_irqsave(&i8259A_lock, flags);
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cached_irq_mask |= mask;
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cached_irq_mask |= mask;
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@ -75,12 +74,11 @@ static void disable_8259A_irq(unsigned int irq)
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raw_spin_unlock_irqrestore(&i8259A_lock, flags);
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raw_spin_unlock_irqrestore(&i8259A_lock, flags);
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}
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}
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static void enable_8259A_irq(unsigned int irq)
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static void enable_8259A_irq(struct irq_data *d)
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{
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{
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unsigned int mask;
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unsigned int mask, irq = d->irq - I8259A_IRQ_BASE;
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unsigned long flags;
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unsigned long flags;
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irq -= I8259A_IRQ_BASE;
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mask = ~(1 << irq);
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mask = ~(1 << irq);
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raw_spin_lock_irqsave(&i8259A_lock, flags);
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raw_spin_lock_irqsave(&i8259A_lock, flags);
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cached_irq_mask &= mask;
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cached_irq_mask &= mask;
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@ -145,12 +143,11 @@ static inline int i8259A_irq_real(unsigned int irq)
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* first, _then_ send the EOI, and the order of EOI
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* first, _then_ send the EOI, and the order of EOI
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* to the two 8259s is important!
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* to the two 8259s is important!
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*/
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*/
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static void mask_and_ack_8259A(unsigned int irq)
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static void mask_and_ack_8259A(struct irq_data *d)
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{
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{
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unsigned int irqmask;
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unsigned int irqmask, irq = d->irq - I8259A_IRQ_BASE;
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unsigned long flags;
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unsigned long flags;
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irq -= I8259A_IRQ_BASE;
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irqmask = 1 << irq;
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irqmask = 1 << irq;
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raw_spin_lock_irqsave(&i8259A_lock, flags);
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raw_spin_lock_irqsave(&i8259A_lock, flags);
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/*
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/*
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@ -290,9 +287,9 @@ static void init_8259A(int auto_eoi)
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* In AEOI mode we just have to mask the interrupt
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* In AEOI mode we just have to mask the interrupt
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* when acking.
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* when acking.
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*/
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*/
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i8259A_chip.mask_ack = disable_8259A_irq;
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i8259A_chip.irq_mask_ack = disable_8259A_irq;
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else
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else
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i8259A_chip.mask_ack = mask_and_ack_8259A;
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i8259A_chip.irq_mask_ack = mask_and_ack_8259A;
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udelay(100); /* wait for 8259A to initialize */
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udelay(100); /* wait for 8259A to initialize */
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@ -113,7 +113,8 @@ struct plat_smp_ops msmtc_smp_ops = {
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*/
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*/
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int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
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int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity,
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bool force)
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{
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{
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cpumask_t tmask;
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cpumask_t tmask;
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int cpu = 0;
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int cpu = 0;
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@ -143,7 +144,7 @@ int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
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if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
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if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu))
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cpu_clear(cpu, tmask);
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cpu_clear(cpu, tmask);
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}
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}
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cpumask_copy(irq_desc[irq].affinity, &tmask);
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cpumask_copy(d->affinity, &tmask);
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if (cpus_empty(tmask))
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if (cpus_empty(tmask))
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/*
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/*
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@ -154,8 +155,8 @@ int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity)
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"IRQ affinity leaves no legal CPU for IRQ %d\n", irq);
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"IRQ affinity leaves no legal CPU for IRQ %d\n", irq);
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/* Do any generic SMTC IRQ affinity setup */
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/* Do any generic SMTC IRQ affinity setup */
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smtc_set_irq_affinity(irq, tmask);
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smtc_set_irq_affinity(d->irq, tmask);
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return 0;
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return IRQ_SET_MASK_OK_NOCOPY;
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}
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}
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#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
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#endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */
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