MIPS: Alchemy: merge devboard code into single per-board files.
Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2884/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
Ralf Baechle
parent
8e026910fc
commit
7c4b24da07
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@ -4,13 +4,13 @@
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obj-y += prom.o bcsr.o platform.o
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obj-$(CONFIG_PM) += pm.o
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obj-$(CONFIG_MIPS_PB1100) += pb1100/
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obj-$(CONFIG_MIPS_PB1200) += pb1200/
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obj-$(CONFIG_MIPS_PB1500) += pb1500/
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obj-$(CONFIG_MIPS_PB1550) += pb1550/
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obj-$(CONFIG_MIPS_DB1000) += db1x00/
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obj-$(CONFIG_MIPS_DB1100) += db1x00/
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obj-$(CONFIG_MIPS_DB1200) += db1200/
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obj-$(CONFIG_MIPS_PB1100) += pb1100.o
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obj-$(CONFIG_MIPS_PB1200) += pb1200.o
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obj-$(CONFIG_MIPS_PB1500) += pb1500.o
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obj-$(CONFIG_MIPS_PB1550) += pb1550.o
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obj-$(CONFIG_MIPS_DB1000) += db1x00.o
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obj-$(CONFIG_MIPS_DB1100) += db1x00.o
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obj-$(CONFIG_MIPS_DB1200) += db1200.o
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obj-$(CONFIG_MIPS_DB1300) += db1300.o
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obj-$(CONFIG_MIPS_DB1500) += db1x00/
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obj-$(CONFIG_MIPS_DB1500) += db1x00.o
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obj-$(CONFIG_MIPS_DB1550) += db1550.o
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@ -1,7 +1,7 @@
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/*
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* DBAu1200 board platform device registration
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*
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* Copyright (C) 2008-2009 Manuel Lauss
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* Copyright (C) 2008-2011 Manuel Lauss
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -22,6 +22,7 @@
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/leds.h>
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#include <linux/mmc/host.h>
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@ -33,14 +34,64 @@
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/smc91x.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1100_mmc.h>
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#include <asm/mach-au1x00/au1xxx_dbdma.h>
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#include <asm/mach-au1x00/au1550_spi.h>
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#include <asm/mach-db1x00/bcsr.h>
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#include <asm/mach-db1x00/db1200.h>
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#include "../platform.h"
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#include "platform.h"
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const char *get_system_type(void)
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{
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return "DB1200";
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}
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void __init board_setup(void)
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{
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unsigned long freq0, clksrc, div, pfc;
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unsigned short whoami;
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bcsr_init(DB1200_BCSR_PHYS_ADDR,
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DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);
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whoami = bcsr_read(BCSR_WHOAMI);
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printk(KERN_INFO "Alchemy/AMD/RMI DB1200 Board, CPLD Rev %d"
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" Board-ID %d Daughtercard ID %d\n",
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(whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf);
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/* SMBus/SPI on PSC0, Audio on PSC1 */
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pfc = __raw_readl((void __iomem *)SYS_PINFUNC);
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pfc &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
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pfc &= ~(SYS_PINFUNC_P1A | SYS_PINFUNC_P1B | SYS_PINFUNC_FS3);
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pfc |= SYS_PINFUNC_P1C; /* SPI is configured later */
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__raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
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wmb();
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/* Clock configurations: PSC0: ~50MHz via Clkgen0, derived from
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* CPU clock; all other clock generators off/unused.
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*/
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div = (get_au1x00_speed() + 25000000) / 50000000;
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if (div & 1)
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div++;
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div = ((div >> 1) - 1) & 0xff;
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freq0 = div << SYS_FC_FRDIV0_BIT;
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__raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
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wmb();
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freq0 |= SYS_FC_FE0; /* enable F0 */
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__raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
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wmb();
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/* psc0_intclk comes 1:1 from F0 */
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clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT;
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__raw_writel(clksrc, (void __iomem *)SYS_CLKSRC);
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wmb();
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}
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/******************************************************************************/
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static struct mtd_partition db1200_spiflash_parts[] = {
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{
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@ -78,18 +129,9 @@ static struct spi_board_info db1200_spi_devs[] __initdata = {
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};
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static struct i2c_board_info db1200_i2c_devs[] __initdata = {
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{
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/* AT24C04-10 I2C eeprom */
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I2C_BOARD_INFO("24c04", 0x52),
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},
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{
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/* Philips NE1619 temp/voltage sensor (adm1025 drv) */
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I2C_BOARD_INFO("ne1619", 0x2d),
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},
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{
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/* I2S audio codec WM8731 */
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I2C_BOARD_INFO("wm8731", 0x1b),
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},
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{ I2C_BOARD_INFO("24c04", 0x52), }, /* AT24C04-10 I2C eeprom */
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{ I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
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{ I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec WM8731 */
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};
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/**********************************************************************/
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@ -206,7 +248,7 @@ static struct platform_device db1200_eth_dev = {
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static struct resource db1200_ide_res[] = {
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[0] = {
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.start = DB1200_IDE_PHYS_ADDR,
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.end = DB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1,
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.end = DB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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@ -221,13 +263,13 @@ static struct resource db1200_ide_res[] = {
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},
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};
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static u64 ide_dmamask = DMA_BIT_MASK(32);
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static u64 au1200_ide_dmamask = DMA_BIT_MASK(32);
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static struct platform_device db1200_ide_dev = {
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.name = "au1200-ide",
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.id = 0,
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.dev = {
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.dma_mask = &ide_dmamask,
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.dma_mask = &au1200_ide_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(db1200_ide_res),
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@ -533,6 +575,21 @@ static int __init db1200_dev_init(void)
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unsigned short sw;
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int swapped;
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/* GPIO7 is low-level triggered CPLD cascade */
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irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
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bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);
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/* insert/eject pairs: one of both is always screaming. To avoid
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* issues they must not be automatically enabled when initially
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* requested.
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*/
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irq_set_status_flags(DB1200_SD0_INSERT_INT, IRQ_NOAUTOEN);
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irq_set_status_flags(DB1200_SD0_EJECT_INT, IRQ_NOAUTOEN);
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irq_set_status_flags(DB1200_PC0_INSERT_INT, IRQ_NOAUTOEN);
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irq_set_status_flags(DB1200_PC0_EJECT_INT, IRQ_NOAUTOEN);
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irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN);
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irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN);
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i2c_register_board_info(0, db1200_i2c_devs,
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ARRAY_SIZE(db1200_i2c_devs));
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spi_register_board_info(db1200_spi_devs,
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@ -595,7 +652,7 @@ static int __init db1200_dev_init(void)
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/* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
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__raw_writel(PSC_SEL_CLK_SERCLK,
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(void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
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(void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
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wmb();
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db1x_register_pcmcia_socket(
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@ -1 +0,0 @@
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obj-y += setup.o platform.o
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@ -1,81 +0,0 @@
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/*
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* Alchemy/AMD/RMI DB1200 board setup.
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*
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* Licensed under the terms outlined in the file COPYING in the root of
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* this source archive.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-db1x00/bcsr.h>
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#include <asm/mach-db1x00/db1200.h>
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const char *get_system_type(void)
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{
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return "Alchemy Db1200";
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}
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void __init board_setup(void)
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{
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unsigned long freq0, clksrc, div, pfc;
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unsigned short whoami;
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bcsr_init(DB1200_BCSR_PHYS_ADDR,
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DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);
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whoami = bcsr_read(BCSR_WHOAMI);
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printk(KERN_INFO "Alchemy/AMD/RMI DB1200 Board, CPLD Rev %d"
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" Board-ID %d Daughtercard ID %d\n",
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(whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf);
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/* SMBus/SPI on PSC0, Audio on PSC1 */
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pfc = __raw_readl((void __iomem *)SYS_PINFUNC);
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pfc &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
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pfc &= ~(SYS_PINFUNC_P1A | SYS_PINFUNC_P1B | SYS_PINFUNC_FS3);
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pfc |= SYS_PINFUNC_P1C; /* SPI is configured later */
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__raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
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wmb();
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/* Clock configurations: PSC0: ~50MHz via Clkgen0, derived from
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* CPU clock; all other clock generators off/unused.
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*/
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div = (get_au1x00_speed() + 25000000) / 50000000;
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if (div & 1)
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div++;
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div = ((div >> 1) - 1) & 0xff;
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freq0 = div << SYS_FC_FRDIV0_BIT;
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__raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
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wmb();
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freq0 |= SYS_FC_FE0; /* enable F0 */
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__raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
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wmb();
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/* psc0_intclk comes 1:1 from F0 */
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clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT;
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__raw_writel(clksrc, (void __iomem *)SYS_CLKSRC);
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wmb();
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}
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static int __init db1200_arch_init(void)
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{
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/* GPIO7 is low-level triggered CPLD cascade */
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irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
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bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);
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/* insert/eject pairs: one of both is always screaming. To avoid
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* issues they must not be automatically enabled when initially
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* requested.
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*/
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irq_set_status_flags(DB1200_SD0_INSERT_INT, IRQ_NOAUTOEN);
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irq_set_status_flags(DB1200_SD0_EJECT_INT, IRQ_NOAUTOEN);
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irq_set_status_flags(DB1200_PC0_INSERT_INT, IRQ_NOAUTOEN);
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irq_set_status_flags(DB1200_PC0_EJECT_INT, IRQ_NOAUTOEN);
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irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN);
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irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN);
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return 0;
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}
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arch_initcall(db1200_arch_init);
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@ -1,7 +1,8 @@
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/*
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* DBAu1xxx board platform device registration
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* DBAu1000/1500/1100 board support
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*
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* Copyright (C) 2009 Manuel Lauss
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* Copyright 2000, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -18,20 +19,61 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/dma-mapping.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1000_dma.h>
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#include <asm/mach-db1x00/bcsr.h>
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#include "../platform.h"
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#include <asm/reboot.h>
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#include <prom.h>
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#include "platform.h"
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struct pci_dev;
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const char *get_system_type(void)
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{
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return "Alchemy Db1x00";
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}
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void __init board_setup(void)
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{
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#ifdef CONFIG_MIPS_DB1000
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printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
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#endif
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#ifdef CONFIG_MIPS_DB1500
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printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
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#endif
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#ifdef CONFIG_MIPS_DB1100
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printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
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#endif
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/* initialize board register space */
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bcsr_init(DB1000_BCSR_PHYS_ADDR,
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DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
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#if defined(CONFIG_IRDA) && defined(CONFIG_AU1000_FIR)
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{
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u32 pin_func;
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/* Set IRFIRSEL instead of GPIO15 */
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pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
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au_writel(pin_func, SYS_PINFUNC);
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/* Power off until the driver is in use */
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bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
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BCSR_RESETS_IRDA_MODE_OFF);
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}
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#endif
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bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
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/* Enable GPIO[31:0] inputs */
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alchemy_gpio1_input_enable();
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}
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/* DB1xxx PCMCIA interrupt sources:
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* CD0/1 GPIO0/3
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* CD0/1 GPIO0/3
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* STSCHG0/1 GPIO1/4
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* CARD0/1 GPIO2/5
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*/
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@ -174,6 +216,13 @@ static struct platform_device db1x00_audio_dev = {
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static int __init db1xxx_dev_init(void)
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{
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irq_set_irq_type(DB1XXX_PCMCIA_CD0, IRQ_TYPE_EDGE_BOTH);
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irq_set_irq_type(DB1XXX_PCMCIA_CD1, IRQ_TYPE_EDGE_BOTH);
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irq_set_irq_type(DB1XXX_PCMCIA_CARD0, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(DB1XXX_PCMCIA_CARD1, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(DB1XXX_PCMCIA_STSCHG0, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(DB1XXX_PCMCIA_STSCHG1, IRQ_TYPE_LEVEL_LOW);
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db1x_register_pcmcia_socket(
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AU1000_PCMCIA_ATTR_PHYS_ADDR,
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AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
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@ -201,7 +250,7 @@ static int __init db1xxx_dev_init(void)
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platform_device_register(&alchemy_ac97c_dev);
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platform_device_register(&db1x00_audio_dev);
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db1x_register_norflash(0x02000000, 4 /* 32bit */, F_SWAPPED);
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db1x_register_norflash(32 << 20, 4 /* 32bit */, F_SWAPPED);
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return 0;
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}
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device_initcall(db1xxx_dev_init);
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@ -1,8 +0,0 @@
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#
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# Copyright 2000, 2008 MontaVista Software Inc.
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# Author: MontaVista Software, Inc. <source@mvista.com>
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#
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# Makefile for the Alchemy Semiconductor DBAu1xx0 boards.
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#
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obj-y := board_setup.o platform.o
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@ -1,108 +0,0 @@
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/*
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*
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* BRIEF MODULE DESCRIPTION
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* Alchemy Db1x00 board setup.
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*
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* Copyright 2000, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/pm.h>
|
||||
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
#include <asm/mach-au1x00/au1xxx_eth.h>
|
||||
#include <asm/mach-db1x00/db1x00.h>
|
||||
#include <asm/mach-db1x00/bcsr.h>
|
||||
#include <asm/reboot.h>
|
||||
|
||||
#include <prom.h>
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
return "Alchemy Db1x00";
|
||||
}
|
||||
|
||||
|
||||
void __init board_setup(void)
|
||||
{
|
||||
#ifdef CONFIG_MIPS_DB1000
|
||||
printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
|
||||
#endif
|
||||
#ifdef CONFIG_MIPS_DB1500
|
||||
printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
|
||||
#endif
|
||||
#ifdef CONFIG_MIPS_DB1100
|
||||
printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
|
||||
#endif
|
||||
/* initialize board register space */
|
||||
bcsr_init(DB1000_BCSR_PHYS_ADDR,
|
||||
DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
|
||||
|
||||
#if defined(CONFIG_IRDA) && defined(CONFIG_AU1000_FIR)
|
||||
{
|
||||
u32 pin_func;
|
||||
|
||||
/* Set IRFIRSEL instead of GPIO15 */
|
||||
pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
/* Power off until the driver is in use */
|
||||
bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
|
||||
BCSR_RESETS_IRDA_MODE_OFF);
|
||||
}
|
||||
#endif
|
||||
bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
|
||||
|
||||
/* Enable GPIO[31:0] inputs */
|
||||
alchemy_gpio1_input_enable();
|
||||
}
|
||||
|
||||
static int __init db1x00_init_irq(void)
|
||||
{
|
||||
#if defined(CONFIG_MIPS_DB1500)
|
||||
irq_set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */
|
||||
irq_set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */
|
||||
irq_set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */
|
||||
irq_set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */
|
||||
irq_set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */
|
||||
irq_set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */
|
||||
#elif defined(CONFIG_MIPS_DB1100)
|
||||
irq_set_irq_type(AU1100_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */
|
||||
irq_set_irq_type(AU1100_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */
|
||||
irq_set_irq_type(AU1100_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */
|
||||
irq_set_irq_type(AU1100_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */
|
||||
irq_set_irq_type(AU1100_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */
|
||||
irq_set_irq_type(AU1100_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */
|
||||
#elif defined(CONFIG_MIPS_DB1000)
|
||||
irq_set_irq_type(AU1000_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */
|
||||
irq_set_irq_type(AU1000_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */
|
||||
irq_set_irq_type(AU1000_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */
|
||||
irq_set_irq_type(AU1000_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */
|
||||
irq_set_irq_type(AU1000_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */
|
||||
irq_set_irq_type(AU1000_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(db1x00_init_irq);
|
||||
|
|
@ -1,42 +1,37 @@
|
|||
/*
|
||||
* Copyright 2002, 2008 MontaVista Software Inc.
|
||||
* Author: MontaVista Software, Inc. <source@mvista.com>
|
||||
* Pb1100 board platform device registration
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
* Copyright (C) 2009 Manuel Lauss
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
#include <asm/mach-db1x00/bcsr.h>
|
||||
|
||||
#include <prom.h>
|
||||
|
||||
#include "platform.h"
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
return "Alchemy Pb1100";
|
||||
return "PB1100";
|
||||
}
|
||||
|
||||
void __init board_setup(void)
|
||||
|
|
@ -115,13 +110,58 @@ void __init board_setup(void)
|
|||
}
|
||||
}
|
||||
|
||||
static int __init pb1100_init_irq(void)
|
||||
/******************************************************************************/
|
||||
|
||||
static struct resource au1100_lcd_resources[] = {
|
||||
[0] = {
|
||||
.start = AU1100_LCD_PHYS_ADDR,
|
||||
.end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AU1100_LCD_INT,
|
||||
.end = AU1100_LCD_INT,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}
|
||||
};
|
||||
|
||||
static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device au1100_lcd_device = {
|
||||
.name = "au1100-lcd",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &au1100_lcd_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(au1100_lcd_resources),
|
||||
.resource = au1100_lcd_resources,
|
||||
};
|
||||
|
||||
static int __init pb1100_dev_init(void)
|
||||
{
|
||||
int swapped;
|
||||
|
||||
irq_set_irq_type(AU1100_GPIO9_INT, IRQF_TRIGGER_LOW); /* PCCD# */
|
||||
irq_set_irq_type(AU1100_GPIO10_INT, IRQF_TRIGGER_LOW); /* PCSTSCHG# */
|
||||
irq_set_irq_type(AU1100_GPIO11_INT, IRQF_TRIGGER_LOW); /* PCCard# */
|
||||
irq_set_irq_type(AU1100_GPIO13_INT, IRQF_TRIGGER_LOW); /* DC_IRQ# */
|
||||
|
||||
/* PCMCIA. single socket, identical to Pb1500 */
|
||||
db1x_register_pcmcia_socket(
|
||||
AU1000_PCMCIA_ATTR_PHYS_ADDR,
|
||||
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
|
||||
AU1000_PCMCIA_MEM_PHYS_ADDR,
|
||||
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
|
||||
AU1000_PCMCIA_IO_PHYS_ADDR,
|
||||
AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
|
||||
AU1100_GPIO11_INT, AU1100_GPIO9_INT, /* card / insert */
|
||||
/*AU1100_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
|
||||
|
||||
swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
|
||||
db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
|
||||
platform_device_register(&au1100_lcd_device);
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(pb1100_init_irq);
|
||||
device_initcall(pb1100_dev_init);
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
#
|
||||
# Copyright 2000, 2001, 2008 MontaVista Software Inc.
|
||||
# Author: MontaVista Software, Inc. <source@mvista.com>
|
||||
#
|
||||
# Makefile for the Alchemy Semiconductor Pb1100 board.
|
||||
#
|
||||
|
||||
obj-y := board_setup.o platform.o
|
||||
|
|
@ -1,77 +0,0 @@
|
|||
/*
|
||||
* Pb1100 board platform device registration
|
||||
*
|
||||
* Copyright (C) 2009 Manuel Lauss
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
#include <asm/mach-db1x00/bcsr.h>
|
||||
|
||||
#include "../platform.h"
|
||||
|
||||
static struct resource au1100_lcd_resources[] = {
|
||||
[0] = {
|
||||
.start = AU1100_LCD_PHYS_ADDR,
|
||||
.end = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = AU1100_LCD_INT,
|
||||
.end = AU1100_LCD_INT,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}
|
||||
};
|
||||
|
||||
static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device au1100_lcd_device = {
|
||||
.name = "au1100-lcd",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &au1100_lcd_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(au1100_lcd_resources),
|
||||
.resource = au1100_lcd_resources,
|
||||
};
|
||||
|
||||
static int __init pb1100_dev_init(void)
|
||||
{
|
||||
int swapped;
|
||||
|
||||
/* PCMCIA. single socket, identical to Pb1500 */
|
||||
db1x_register_pcmcia_socket(
|
||||
AU1000_PCMCIA_ATTR_PHYS_ADDR,
|
||||
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
|
||||
AU1000_PCMCIA_MEM_PHYS_ADDR,
|
||||
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
|
||||
AU1000_PCMCIA_IO_PHYS_ADDR,
|
||||
AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
|
||||
AU1100_GPIO11_INT, AU1100_GPIO9_INT, /* card / insert */
|
||||
/*AU1100_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
|
||||
|
||||
swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
|
||||
db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
|
||||
platform_device_register(&au1100_lcd_device);
|
||||
|
||||
return 0;
|
||||
}
|
||||
device_initcall(pb1100_dev_init);
|
||||
|
|
@ -20,17 +20,97 @@
|
|||
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/smc91x.h>
|
||||
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
#include <asm/mach-au1x00/au1100_mmc.h>
|
||||
#include <asm/mach-au1x00/au1xxx_dbdma.h>
|
||||
#include <asm/mach-db1x00/bcsr.h>
|
||||
#include <asm/mach-pb1x00/pb1200.h>
|
||||
#include <prom.h>
|
||||
#include "platform.h"
|
||||
|
||||
#include "../platform.h"
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
return "PB1200";
|
||||
}
|
||||
|
||||
void __init board_setup(void)
|
||||
{
|
||||
printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
|
||||
bcsr_init(PB1200_BCSR_PHYS_ADDR,
|
||||
PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
|
||||
|
||||
#if 0
|
||||
{
|
||||
u32 pin_func;
|
||||
|
||||
/*
|
||||
* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
|
||||
* but it is board specific code, so put it here.
|
||||
*/
|
||||
pin_func = au_readl(SYS_PINFUNC);
|
||||
au_sync();
|
||||
pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
|
||||
au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
|
||||
au_sync();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_AU1550)
|
||||
{
|
||||
u32 freq0, clksrc;
|
||||
u32 pin_func;
|
||||
|
||||
/* Select SMBus in CPLD */
|
||||
bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
|
||||
|
||||
pin_func = au_readl(SYS_PINFUNC);
|
||||
au_sync();
|
||||
pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
|
||||
/* Set GPIOs correctly */
|
||||
pin_func |= 2 << 17;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
au_sync();
|
||||
|
||||
/* The I2C driver depends on 50 MHz clock */
|
||||
freq0 = au_readl(SYS_FREQCTRL0);
|
||||
au_sync();
|
||||
freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
|
||||
freq0 |= 3 << SYS_FC_FRDIV1_BIT;
|
||||
/* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
|
||||
au_writel(freq0, SYS_FREQCTRL0);
|
||||
au_sync();
|
||||
freq0 |= SYS_FC_FE1;
|
||||
au_writel(freq0, SYS_FREQCTRL0);
|
||||
au_sync();
|
||||
|
||||
clksrc = au_readl(SYS_CLKSRC);
|
||||
au_sync();
|
||||
clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
|
||||
/* Bit 22 is EXTCLK0 for PSC0 */
|
||||
clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
|
||||
au_writel(clksrc, SYS_CLKSRC);
|
||||
au_sync();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The Pb1200 development board uses external MUX for PSC0 to
|
||||
* support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI
|
||||
*/
|
||||
#ifdef CONFIG_I2C_AU1550
|
||||
bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
|
||||
#endif
|
||||
au_sync();
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
static int mmc_activity;
|
||||
|
||||
|
|
@ -183,7 +263,7 @@ static struct platform_device pb1200_mmc1_dev = {
|
|||
static struct resource ide_resources[] = {
|
||||
[0] = {
|
||||
.start = IDE_PHYS_ADDR,
|
||||
.end = IDE_PHYS_ADDR + IDE_PHYS_LEN - 1,
|
||||
.end = IDE_PHYS_ADDR + IDE_PHYS_LEN - 1,
|
||||
.flags = IORESOURCE_MEM
|
||||
},
|
||||
[1] = {
|
||||
|
|
@ -198,13 +278,13 @@ static struct resource ide_resources[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static u64 ide_dmamask = DMA_BIT_MASK(32);
|
||||
static u64 au1200_ide_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device ide_device = {
|
||||
.name = "au1200-ide",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &ide_dmamask,
|
||||
.dma_mask = &au1200_ide_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(ide_resources),
|
||||
|
|
@ -310,6 +390,29 @@ static int __init board_register_devices(void)
|
|||
{
|
||||
int swapped;
|
||||
|
||||
/* We have a problem with CPLD rev 3. */
|
||||
if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
|
||||
printk(KERN_ERR "updated to latest revision. This software will\n");
|
||||
printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
panic("Game over. Your score is 0.");
|
||||
}
|
||||
|
||||
irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
|
||||
bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT);
|
||||
|
||||
db1x_register_pcmcia_socket(
|
||||
AU1000_PCMCIA_ATTR_PHYS_ADDR,
|
||||
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
|
||||
|
|
@ -337,3 +440,25 @@ static int __init board_register_devices(void)
|
|||
ARRAY_SIZE(board_platform_devices));
|
||||
}
|
||||
device_initcall(board_register_devices);
|
||||
|
||||
|
||||
int board_au1200fb_panel(void)
|
||||
{
|
||||
return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
|
||||
}
|
||||
|
||||
int board_au1200fb_panel_init(void)
|
||||
{
|
||||
/* Apply power */
|
||||
bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
|
||||
BCSR_BOARD_LCDBL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_au1200fb_panel_shutdown(void)
|
||||
{
|
||||
/* Remove power */
|
||||
bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
|
||||
BCSR_BOARD_LCDBL, 0);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,5 +0,0 @@
|
|||
#
|
||||
# Makefile for the Alchemy Semiconductor Pb1200/DBAu1200 boards.
|
||||
#
|
||||
|
||||
obj-y := board_setup.o platform.o
|
||||
|
|
@ -1,174 +0,0 @@
|
|||
/*
|
||||
*
|
||||
* BRIEF MODULE DESCRIPTION
|
||||
* Alchemy Pb1200/Db1200 board setup.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
#include <asm/mach-db1x00/bcsr.h>
|
||||
|
||||
#ifdef CONFIG_MIPS_PB1200
|
||||
#include <asm/mach-pb1x00/pb1200.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MIPS_DB1200
|
||||
#include <asm/mach-db1x00/db1200.h>
|
||||
#define PB1200_INT_BEGIN DB1200_INT_BEGIN
|
||||
#define PB1200_INT_END DB1200_INT_END
|
||||
#endif
|
||||
|
||||
#include <prom.h>
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
return "Alchemy Pb1200";
|
||||
}
|
||||
|
||||
void __init board_setup(void)
|
||||
{
|
||||
printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
|
||||
bcsr_init(PB1200_BCSR_PHYS_ADDR,
|
||||
PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
|
||||
|
||||
#if 0
|
||||
{
|
||||
u32 pin_func;
|
||||
|
||||
/*
|
||||
* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
|
||||
* but it is board specific code, so put it here.
|
||||
*/
|
||||
pin_func = au_readl(SYS_PINFUNC);
|
||||
au_sync();
|
||||
pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
|
||||
au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
|
||||
au_sync();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_AU1550)
|
||||
{
|
||||
u32 freq0, clksrc;
|
||||
u32 pin_func;
|
||||
|
||||
/* Select SMBus in CPLD */
|
||||
bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
|
||||
|
||||
pin_func = au_readl(SYS_PINFUNC);
|
||||
au_sync();
|
||||
pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
|
||||
/* Set GPIOs correctly */
|
||||
pin_func |= 2 << 17;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
au_sync();
|
||||
|
||||
/* The I2C driver depends on 50 MHz clock */
|
||||
freq0 = au_readl(SYS_FREQCTRL0);
|
||||
au_sync();
|
||||
freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
|
||||
freq0 |= 3 << SYS_FC_FRDIV1_BIT;
|
||||
/* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
|
||||
au_writel(freq0, SYS_FREQCTRL0);
|
||||
au_sync();
|
||||
freq0 |= SYS_FC_FE1;
|
||||
au_writel(freq0, SYS_FREQCTRL0);
|
||||
au_sync();
|
||||
|
||||
clksrc = au_readl(SYS_CLKSRC);
|
||||
au_sync();
|
||||
clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
|
||||
/* Bit 22 is EXTCLK0 for PSC0 */
|
||||
clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
|
||||
au_writel(clksrc, SYS_CLKSRC);
|
||||
au_sync();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The Pb1200 development board uses external MUX for PSC0 to
|
||||
* support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI
|
||||
*/
|
||||
#ifdef CONFIG_I2C_AU1550
|
||||
bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
|
||||
#endif
|
||||
au_sync();
|
||||
}
|
||||
|
||||
static int __init pb1200_init_irq(void)
|
||||
{
|
||||
/* We have a problem with CPLD rev 3. */
|
||||
if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
|
||||
printk(KERN_ERR "updated to latest revision. This software will\n");
|
||||
printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
printk(KERN_ERR "WARNING!!!\n");
|
||||
panic("Game over. Your score is 0.");
|
||||
}
|
||||
|
||||
irq_set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
|
||||
bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1200_GPIO7_INT);
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(pb1200_init_irq);
|
||||
|
||||
|
||||
int board_au1200fb_panel(void)
|
||||
{
|
||||
return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
|
||||
}
|
||||
|
||||
int board_au1200fb_panel_init(void)
|
||||
{
|
||||
/* Apply power */
|
||||
bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
|
||||
BCSR_BOARD_LCDBL);
|
||||
/* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_au1200fb_panel_shutdown(void)
|
||||
{
|
||||
/* Remove power */
|
||||
bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
|
||||
BCSR_BOARD_LCDBL, 0);
|
||||
/* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,41 +1,37 @@
|
|||
/*
|
||||
* Copyright 2000, 2008 MontaVista Software Inc.
|
||||
* Author: MontaVista Software, Inc. <source@mvista.com>
|
||||
* Pb1500 board support.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
* Copyright (C) 2009 Manuel Lauss
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
#include <asm/mach-db1x00/bcsr.h>
|
||||
|
||||
#include <prom.h>
|
||||
#include "platform.h"
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
return "Alchemy Pb1500";
|
||||
return "PB1500";
|
||||
}
|
||||
|
||||
void __init board_setup(void)
|
||||
|
|
@ -123,17 +119,80 @@ void __init board_setup(void)
|
|||
}
|
||||
}
|
||||
|
||||
static int __init pb1500_init_irq(void)
|
||||
/******************************************************************************/
|
||||
|
||||
static int pb1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
|
||||
{
|
||||
irq_set_irq_type(AU1500_GPIO9_INT, IRQF_TRIGGER_LOW); /* CD0# */
|
||||
irq_set_irq_type(AU1500_GPIO10_INT, IRQF_TRIGGER_LOW); /* CARD0 */
|
||||
irq_set_irq_type(AU1500_GPIO11_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */
|
||||
if ((slot < 12) || (slot > 13) || pin == 0)
|
||||
return -1;
|
||||
if (slot == 12)
|
||||
return (pin == 1) ? AU1500_PCI_INTA : 0xff;
|
||||
if (slot == 13) {
|
||||
switch (pin) {
|
||||
case 1: return AU1500_PCI_INTA;
|
||||
case 2: return AU1500_PCI_INTB;
|
||||
case 3: return AU1500_PCI_INTC;
|
||||
case 4: return AU1500_PCI_INTD;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static struct resource alchemy_pci_host_res[] = {
|
||||
[0] = {
|
||||
.start = AU1500_PCI_PHYS_ADDR,
|
||||
.end = AU1500_PCI_PHYS_ADDR + 0xfff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct alchemy_pci_platdata pb1500_pci_pd = {
|
||||
.board_map_irq = pb1500_map_pci_irq,
|
||||
.pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
|
||||
PCI_CONFIG_CH |
|
||||
#if defined(__MIPSEB__)
|
||||
PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
|
||||
#else
|
||||
0,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device pb1500_pci_host = {
|
||||
.dev.platform_data = &pb1500_pci_pd,
|
||||
.name = "alchemy-pci",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(alchemy_pci_host_res),
|
||||
.resource = alchemy_pci_host_res,
|
||||
};
|
||||
|
||||
static int __init pb1500_dev_init(void)
|
||||
{
|
||||
int swapped;
|
||||
|
||||
irq_set_irq_type(AU1500_GPIO9_INT, IRQF_TRIGGER_LOW); /* CD0# */
|
||||
irq_set_irq_type(AU1500_GPIO10_INT, IRQF_TRIGGER_LOW); /* CARD0 */
|
||||
irq_set_irq_type(AU1500_GPIO11_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */
|
||||
irq_set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);
|
||||
irq_set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);
|
||||
irq_set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);
|
||||
irq_set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);
|
||||
irq_set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);
|
||||
|
||||
/* PCMCIA. single socket, identical to Pb1100 */
|
||||
db1x_register_pcmcia_socket(
|
||||
AU1000_PCMCIA_ATTR_PHYS_ADDR,
|
||||
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
|
||||
AU1000_PCMCIA_MEM_PHYS_ADDR,
|
||||
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
|
||||
AU1000_PCMCIA_IO_PHYS_ADDR,
|
||||
AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
|
||||
AU1500_GPIO11_INT, AU1500_GPIO9_INT, /* card / insert */
|
||||
/*AU1500_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
|
||||
|
||||
swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
|
||||
db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
|
||||
platform_device_register(&pb1500_pci_host);
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(pb1500_init_irq);
|
||||
arch_initcall(pb1500_dev_init);
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
#
|
||||
# Copyright 2000, 2001, 2008 MontaVista Software Inc.
|
||||
# Author: MontaVista Software, Inc. <source@mvista.com>
|
||||
#
|
||||
# Makefile for the Alchemy Semiconductor Pb1500 board.
|
||||
#
|
||||
|
||||
obj-y := board_setup.o platform.o
|
||||
|
|
@ -1,94 +0,0 @@
|
|||
/*
|
||||
* Pb1500 board platform device registration
|
||||
*
|
||||
* Copyright (C) 2009 Manuel Lauss
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
#include <asm/mach-db1x00/bcsr.h>
|
||||
|
||||
#include "../platform.h"
|
||||
|
||||
static int pb1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
|
||||
{
|
||||
if ((slot < 12) || (slot > 13) || pin == 0)
|
||||
return -1;
|
||||
if (slot == 12)
|
||||
return (pin == 1) ? AU1500_PCI_INTA : 0xff;
|
||||
if (slot == 13) {
|
||||
switch (pin) {
|
||||
case 1: return AU1500_PCI_INTA;
|
||||
case 2: return AU1500_PCI_INTB;
|
||||
case 3: return AU1500_PCI_INTC;
|
||||
case 4: return AU1500_PCI_INTD;
|
||||
}
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static struct resource alchemy_pci_host_res[] = {
|
||||
[0] = {
|
||||
.start = AU1500_PCI_PHYS_ADDR,
|
||||
.end = AU1500_PCI_PHYS_ADDR + 0xfff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct alchemy_pci_platdata pb1500_pci_pd = {
|
||||
.board_map_irq = pb1500_map_pci_irq,
|
||||
.pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
|
||||
PCI_CONFIG_CH |
|
||||
#if defined(__MIPSEB__)
|
||||
PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
|
||||
#else
|
||||
0,
|
||||
#endif
|
||||
};
|
||||
|
||||
static struct platform_device pb1500_pci_host = {
|
||||
.dev.platform_data = &pb1500_pci_pd,
|
||||
.name = "alchemy-pci",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(alchemy_pci_host_res),
|
||||
.resource = alchemy_pci_host_res,
|
||||
};
|
||||
|
||||
static int __init pb1500_dev_init(void)
|
||||
{
|
||||
int swapped;
|
||||
|
||||
/* PCMCIA. single socket, identical to Pb1100 */
|
||||
db1x_register_pcmcia_socket(
|
||||
AU1000_PCMCIA_ATTR_PHYS_ADDR,
|
||||
AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
|
||||
AU1000_PCMCIA_MEM_PHYS_ADDR,
|
||||
AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
|
||||
AU1000_PCMCIA_IO_PHYS_ADDR,
|
||||
AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
|
||||
AU1500_GPIO11_INT, AU1500_GPIO9_INT, /* card / insert */
|
||||
/*AU1500_GPIO10_INT*/0, 0, 0); /* stschg / eject / id */
|
||||
|
||||
swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT;
|
||||
db1x_register_norflash(64 * 1024 * 1024, 4, swapped);
|
||||
platform_device_register(&pb1500_pci_host);
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(pb1500_dev_init);
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Pb1550 board platform device registration
|
||||
* Pb1550 board support.
|
||||
*
|
||||
* Copyright (C) 2009 Manuel Lauss
|
||||
* Copyright (C) 2009-2011 Manuel Lauss
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -20,13 +20,43 @@
|
|||
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
#include <asm/mach-au1x00/au1xxx_dbdma.h>
|
||||
#include <asm/mach-pb1x00/pb1550.h>
|
||||
#include <asm/mach-au1x00/gpio.h>
|
||||
#include <asm/mach-db1x00/bcsr.h>
|
||||
#include "platform.h"
|
||||
|
||||
#include "../platform.h"
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
return "PB1550";
|
||||
}
|
||||
|
||||
void __init board_setup(void)
|
||||
{
|
||||
u32 pin_func;
|
||||
|
||||
bcsr_init(PB1550_BCSR_PHYS_ADDR,
|
||||
PB1550_BCSR_PHYS_ADDR + PB1550_BCSR_HEXLED_OFS);
|
||||
|
||||
alchemy_gpio2_enable();
|
||||
|
||||
/*
|
||||
* Enable PSC1 SYNC for AC'97. Normaly done in audio driver,
|
||||
* but it is board specific code, so put it here.
|
||||
*/
|
||||
pin_func = au_readl(SYS_PINFUNC);
|
||||
au_sync();
|
||||
pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
|
||||
bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
|
||||
|
||||
printk(KERN_INFO "AMD Alchemy Pb1550 Board\n");
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
static int pb1550_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
|
||||
{
|
||||
|
|
@ -105,6 +135,14 @@ static int __init pb1550_dev_init(void)
|
|||
{
|
||||
int swapped;
|
||||
|
||||
irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW);
|
||||
irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW);
|
||||
irq_set_irq_type(AU1550_GPIO201_205_INT, IRQF_TRIGGER_HIGH);
|
||||
|
||||
/* enable both PCMCIA card irqs in the shared line */
|
||||
alchemy_gpio2_enable_int(201);
|
||||
alchemy_gpio2_enable_int(202);
|
||||
|
||||
/* Pb1550, like all others, also has statuschange irqs; however they're
|
||||
* wired up on one of the Au1550's shared GPIO201_205 line, which also
|
||||
* services the PCMCIA card interrupts. So we ignore statuschange and
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
#
|
||||
# Copyright 2000, 2008 MontaVista Software Inc.
|
||||
# Author: MontaVista Software, Inc. <source@mvista.com>
|
||||
#
|
||||
# Makefile for the Alchemy Semiconductor Pb1550 board.
|
||||
#
|
||||
|
||||
obj-y := board_setup.o platform.o
|
||||
|
|
@ -1,80 +0,0 @@
|
|||
/*
|
||||
*
|
||||
* BRIEF MODULE DESCRIPTION
|
||||
* Alchemy Pb1550 board setup.
|
||||
*
|
||||
* Copyright 2000, 2008 MontaVista Software Inc.
|
||||
* Author: MontaVista Software, Inc. <source@mvista.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
#include <asm/mach-pb1x00/pb1550.h>
|
||||
#include <asm/mach-db1x00/bcsr.h>
|
||||
#include <asm/mach-au1x00/gpio.h>
|
||||
|
||||
#include <prom.h>
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
return "Alchemy Pb1550";
|
||||
}
|
||||
|
||||
void __init board_setup(void)
|
||||
{
|
||||
u32 pin_func;
|
||||
|
||||
bcsr_init(PB1550_BCSR_PHYS_ADDR,
|
||||
PB1550_BCSR_PHYS_ADDR + PB1550_BCSR_HEXLED_OFS);
|
||||
|
||||
alchemy_gpio2_enable();
|
||||
|
||||
/*
|
||||
* Enable PSC1 SYNC for AC'97. Normaly done in audio driver,
|
||||
* but it is board specific code, so put it here.
|
||||
*/
|
||||
pin_func = au_readl(SYS_PINFUNC);
|
||||
au_sync();
|
||||
pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
|
||||
au_writel(pin_func, SYS_PINFUNC);
|
||||
|
||||
bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */
|
||||
|
||||
printk(KERN_INFO "AMD Alchemy Pb1550 Board\n");
|
||||
}
|
||||
|
||||
static int __init pb1550_init_irq(void)
|
||||
{
|
||||
irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW);
|
||||
irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW);
|
||||
irq_set_irq_type(AU1550_GPIO201_205_INT, IRQF_TRIGGER_HIGH);
|
||||
|
||||
/* enable both PCMCIA card irqs in the shared line */
|
||||
alchemy_gpio2_enable_int(201);
|
||||
alchemy_gpio2_enable_int(202);
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(pb1550_init_irq);
|
||||
Reference in New Issue