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[ARM SMP] Ensure secondary CPUs see their pen release 

Since the secondary CPUs will not be operating in symetric mode
while they are held in the pen, we need to ensure that the write
to pen_release is visible to them, by flushing the cache.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2005-07-29 16:36:48 +01:00 committed by Russell King
parent e7ec02938d
commit 7ac5ae4b12
1 changed files with 2 additions and 0 deletions
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2
arch/arm/mach-integrator/platsmp.c
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@ -15,6 +15,7 @@
#include <linux/mm.h>
#include <asm/atomic.h>
#include <asm/cacheflush.h>
#include <asm/delay.h>
#include <asm/mmu_context.h>
#include <asm/procinfo.h>
@ -80,6 +81,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
* "cpu" is Linux's internal ID.
*/
pen_release = cpu;
flush_cache_all();
/*
* XXX