crypto: omap-sham - crypto_ahash_final() now not need to be called.
According to the Herbert Xu, client may not always call crypto_ahash_final(). In the case of error in hash calculation resources will be automatically cleaned up. But if no hash calculation error happens and client will not call crypto_ahash_final() at all, then internal buffer will not be freed, and clocks will not be disabled. This patch provides support for atomic crypto_ahash_update() call. Clocks are now enabled and disabled per update request. Data buffer is now allocated as a part of request context. Client is obligated to free it with crypto_free_ahash(). Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Dmitry Kasatkin
Herbert Xu
parent
a5d87237bb
commit
798eed5d92
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@ -89,6 +89,11 @@
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#define OP_UPDATE 1
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#define OP_FINAL 2
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#define OMAP_ALIGN_MASK (sizeof(u32)-1)
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#define OMAP_ALIGNED __attribute__((aligned(sizeof(u32))))
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#define BUFLEN PAGE_SIZE
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struct omap_sham_dev;
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struct omap_sham_reqctx {
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@ -96,9 +101,8 @@ struct omap_sham_reqctx {
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unsigned long flags;
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unsigned long op;
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u8 digest[SHA1_DIGEST_SIZE];
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u8 digest[SHA1_DIGEST_SIZE] OMAP_ALIGNED;
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size_t digcnt;
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u8 *buffer;
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size_t bufcnt;
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size_t buflen;
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dma_addr_t dma_addr;
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@ -107,6 +111,8 @@ struct omap_sham_reqctx {
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struct scatterlist *sg;
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unsigned int offset; /* offset in current sg */
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unsigned int total; /* total request */
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u8 buffer[0] OMAP_ALIGNED;
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};
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struct omap_sham_hmac_ctx {
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@ -219,31 +225,33 @@ static void omap_sham_copy_hash(struct ahash_request *req, int out)
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}
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}
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static int omap_sham_write_ctrl(struct omap_sham_dev *dd, size_t length,
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static int omap_sham_hw_init(struct omap_sham_dev *dd)
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{
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clk_enable(dd->iclk);
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if (!(dd->flags & FLAGS_INIT)) {
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omap_sham_write_mask(dd, SHA_REG_MASK,
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SHA_REG_MASK_SOFTRESET, SHA_REG_MASK_SOFTRESET);
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if (omap_sham_wait(dd, SHA_REG_SYSSTATUS,
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SHA_REG_SYSSTATUS_RESETDONE))
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return -ETIMEDOUT;
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dd->flags |= FLAGS_INIT;
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dd->err = 0;
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}
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return 0;
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}
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static void omap_sham_write_ctrl(struct omap_sham_dev *dd, size_t length,
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int final, int dma)
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{
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struct omap_sham_reqctx *ctx = ahash_request_ctx(dd->req);
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u32 val = length << 5, mask;
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if (unlikely(!ctx->digcnt)) {
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clk_enable(dd->iclk);
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if (!(dd->flags & FLAGS_INIT)) {
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omap_sham_write_mask(dd, SHA_REG_MASK,
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SHA_REG_MASK_SOFTRESET, SHA_REG_MASK_SOFTRESET);
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if (omap_sham_wait(dd, SHA_REG_SYSSTATUS,
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SHA_REG_SYSSTATUS_RESETDONE)) {
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clk_disable(dd->iclk);
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return -ETIMEDOUT;
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}
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dd->flags |= FLAGS_INIT;
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dd->err = 0;
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}
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} else {
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if (likely(ctx->digcnt))
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omap_sham_write(dd, SHA_REG_DIGCNT, ctx->digcnt);
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}
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omap_sham_write_mask(dd, SHA_REG_MASK,
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SHA_REG_MASK_IT_EN | (dma ? SHA_REG_MASK_DMA_EN : 0),
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@ -263,23 +271,19 @@ static int omap_sham_write_ctrl(struct omap_sham_dev *dd, size_t length,
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SHA_REG_CTRL_ALGO | SHA_REG_CTRL_LENGTH;
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omap_sham_write_mask(dd, SHA_REG_CTRL, val, mask);
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return 0;
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}
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static int omap_sham_xmit_cpu(struct omap_sham_dev *dd, const u8 *buf,
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size_t length, int final)
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{
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struct omap_sham_reqctx *ctx = ahash_request_ctx(dd->req);
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int err, count, len32;
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int count, len32;
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const u32 *buffer = (const u32 *)buf;
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dev_dbg(dd->dev, "xmit_cpu: digcnt: %d, length: %d, final: %d\n",
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ctx->digcnt, length, final);
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err = omap_sham_write_ctrl(dd, length, final, 0);
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if (err)
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return err;
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omap_sham_write_ctrl(dd, length, final, 0);
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/* should be non-zero before next lines to disable clocks later */
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ctx->digcnt += length;
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@ -302,14 +306,10 @@ static int omap_sham_xmit_dma(struct omap_sham_dev *dd, dma_addr_t dma_addr,
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size_t length, int final)
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{
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struct omap_sham_reqctx *ctx = ahash_request_ctx(dd->req);
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int err, len32;
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int len32;
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dev_dbg(dd->dev, "xmit_dma: digcnt: %d, length: %d, final: %d\n",
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ctx->digcnt, length, final);
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/* flush cache entries related to our page */
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if (dma_addr == ctx->dma_addr)
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dma_sync_single_for_device(dd->dev, dma_addr, length,
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DMA_TO_DEVICE);
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len32 = DIV_ROUND_UP(length, sizeof(u32));
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@ -320,19 +320,7 @@ static int omap_sham_xmit_dma(struct omap_sham_dev *dd, dma_addr_t dma_addr,
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omap_set_dma_src_params(dd->dma_lch, 0, OMAP_DMA_AMODE_POST_INC,
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dma_addr, 0, 0);
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omap_set_dma_dest_params(dd->dma_lch, 0,
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OMAP_DMA_AMODE_CONSTANT,
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dd->phys_base + SHA_REG_DIN(0), 0, 16);
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omap_set_dma_dest_burst_mode(dd->dma_lch,
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OMAP_DMA_DATA_BURST_16);
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omap_set_dma_src_burst_mode(dd->dma_lch,
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OMAP_DMA_DATA_BURST_4);
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err = omap_sham_write_ctrl(dd, length, final, 1);
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if (err)
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return err;
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omap_sham_write_ctrl(dd, length, final, 1);
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ctx->digcnt += length;
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@ -384,6 +372,21 @@ static size_t omap_sham_append_sg(struct omap_sham_reqctx *ctx)
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return 0;
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}
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static int omap_sham_xmit_dma_map(struct omap_sham_dev *dd,
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struct omap_sham_reqctx *ctx,
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size_t length, int final)
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{
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ctx->dma_addr = dma_map_single(dd->dev, ctx->buffer, ctx->buflen,
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DMA_TO_DEVICE);
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if (dma_mapping_error(dd->dev, ctx->dma_addr)) {
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dev_err(dd->dev, "dma %u bytes error\n", ctx->buflen);
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return -EINVAL;
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}
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/* next call does not fail... so no unmap in the case of error */
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return omap_sham_xmit_dma(dd, ctx->dma_addr, length, final);
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}
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static int omap_sham_update_dma_slow(struct omap_sham_dev *dd)
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{
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struct omap_sham_reqctx *ctx = ahash_request_ctx(dd->req);
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@ -403,7 +406,7 @@ static int omap_sham_update_dma_slow(struct omap_sham_dev *dd)
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if (final || (ctx->bufcnt == ctx->buflen && ctx->total)) {
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count = ctx->bufcnt;
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ctx->bufcnt = 0;
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return omap_sham_xmit_dma(dd, ctx->dma_addr, count, final);
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return omap_sham_xmit_dma_map(dd, ctx, count, final);
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}
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return 0;
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@ -413,7 +416,6 @@ static int omap_sham_update_dma_fast(struct omap_sham_dev *dd)
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{
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struct omap_sham_reqctx *ctx = ahash_request_ctx(dd->req);
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unsigned int length;
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int err;
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ctx->flags |= FLAGS_FAST;
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@ -427,11 +429,8 @@ static int omap_sham_update_dma_fast(struct omap_sham_dev *dd)
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ctx->total -= length;
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err = omap_sham_xmit_dma(dd, sg_dma_address(ctx->sg), length, 1);
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if (err != -EINPROGRESS)
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dma_unmap_sg(dd->dev, ctx->sg, 1, DMA_TO_DEVICE);
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return err;
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/* next call does not fail... so no unmap in the case of error */
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return omap_sham_xmit_dma(dd, sg_dma_address(ctx->sg), length, 1);
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}
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static int omap_sham_update_cpu(struct omap_sham_dev *dd)
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@ -453,6 +452,9 @@ static int omap_sham_update_dma_stop(struct omap_sham_dev *dd)
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omap_stop_dma(dd->dma_lch);
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if (ctx->flags & FLAGS_FAST)
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dma_unmap_sg(dd->dev, ctx->sg, 1, DMA_TO_DEVICE);
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else
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dma_unmap_single(dd->dev, ctx->dma_addr, ctx->buflen,
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DMA_TO_DEVICE);
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return 0;
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}
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@ -471,18 +473,9 @@ static void omap_sham_cleanup(struct ahash_request *req)
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ctx->flags |= FLAGS_CLEAN;
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spin_unlock_irqrestore(&dd->lock, flags);
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if (ctx->digcnt) {
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clk_disable(dd->iclk);
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if (ctx->digcnt)
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memcpy(req->result, ctx->digest, (ctx->flags & FLAGS_SHA1) ?
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SHA1_DIGEST_SIZE : MD5_DIGEST_SIZE);
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}
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if (ctx->dma_addr)
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dma_unmap_single(dd->dev, ctx->dma_addr, ctx->buflen,
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DMA_TO_DEVICE);
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if (ctx->buffer)
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free_page((unsigned long)ctx->buffer);
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dev_dbg(dd->dev, "digcnt: %d, bufcnt: %d\n", ctx->digcnt, ctx->bufcnt);
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}
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@ -520,21 +513,7 @@ static int omap_sham_init(struct ahash_request *req)
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ctx->bufcnt = 0;
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ctx->digcnt = 0;
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ctx->buflen = PAGE_SIZE;
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ctx->buffer = (void *)__get_free_page(
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(req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ?
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GFP_KERNEL : GFP_ATOMIC);
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if (!ctx->buffer)
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return -ENOMEM;
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ctx->dma_addr = dma_map_single(dd->dev, ctx->buffer, ctx->buflen,
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DMA_TO_DEVICE);
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if (dma_mapping_error(dd->dev, ctx->dma_addr)) {
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dev_err(dd->dev, "dma %u bytes error\n", ctx->buflen);
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free_page((unsigned long)ctx->buffer);
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return -EINVAL;
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}
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ctx->buflen = BUFLEN;
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if (tctx->flags & FLAGS_HMAC) {
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struct omap_sham_hmac_ctx *bctx = tctx->base;
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@ -581,7 +560,7 @@ static int omap_sham_final_req(struct omap_sham_dev *dd)
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use_dma = 0;
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if (use_dma)
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err = omap_sham_xmit_dma(dd, ctx->dma_addr, ctx->bufcnt, 1);
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err = omap_sham_xmit_dma_map(dd, ctx, ctx->bufcnt, 1);
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else
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err = omap_sham_xmit_cpu(dd, ctx->buffer, ctx->bufcnt, 1);
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@ -615,6 +594,7 @@ static int omap_sham_finish_req_hmac(struct ahash_request *req)
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static void omap_sham_finish_req(struct ahash_request *req, int err)
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{
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struct omap_sham_reqctx *ctx = ahash_request_ctx(req);
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struct omap_sham_dev *dd = ctx->dd;
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if (!err) {
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omap_sham_copy_hash(ctx->dd->req, 1);
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@ -627,7 +607,8 @@ static void omap_sham_finish_req(struct ahash_request *req, int err)
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if ((ctx->flags & FLAGS_FINAL) || err)
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omap_sham_cleanup(req);
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ctx->dd->flags &= ~FLAGS_BUSY;
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clk_disable(dd->iclk);
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dd->flags &= ~FLAGS_BUSY;
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if (req->base.complete)
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req->base.complete(&req->base, err);
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@ -636,7 +617,7 @@ static void omap_sham_finish_req(struct ahash_request *req, int err)
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static int omap_sham_handle_queue(struct omap_sham_dev *dd,
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struct ahash_request *req)
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{
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struct crypto_async_request *async_req, *backlog;
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struct crypto_async_request *async_req, *backlog = 0;
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struct omap_sham_reqctx *ctx;
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struct ahash_request *prev_req;
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unsigned long flags;
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@ -672,7 +653,22 @@ static int omap_sham_handle_queue(struct omap_sham_dev *dd,
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dev_dbg(dd->dev, "handling new req, op: %lu, nbytes: %d\n",
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ctx->op, req->nbytes);
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if (req != prev_req && ctx->digcnt)
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err = omap_sham_hw_init(dd);
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if (err)
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goto err1;
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omap_set_dma_dest_params(dd->dma_lch, 0,
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OMAP_DMA_AMODE_CONSTANT,
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dd->phys_base + SHA_REG_DIN(0), 0, 16);
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omap_set_dma_dest_burst_mode(dd->dma_lch,
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OMAP_DMA_DATA_BURST_16);
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omap_set_dma_src_burst_mode(dd->dma_lch,
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OMAP_DMA_DATA_BURST_4);
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if (ctx->digcnt)
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/* request has changed - restore hash */
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omap_sham_copy_hash(req, 0);
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@ -684,7 +680,7 @@ static int omap_sham_handle_queue(struct omap_sham_dev *dd,
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} else if (ctx->op == OP_FINAL) {
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err = omap_sham_final_req(dd);
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}
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err1:
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if (err != -EINPROGRESS) {
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/* done_task will not finish it, so do it here */
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omap_sham_finish_req(req, err);
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@ -868,7 +864,7 @@ static int omap_sham_cra_init_alg(struct crypto_tfm *tfm, const char *alg_base)
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}
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crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
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sizeof(struct omap_sham_reqctx));
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sizeof(struct omap_sham_reqctx) + BUFLEN);
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if (alg_base) {
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struct omap_sham_hmac_ctx *bctx = tctx->base;
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@ -954,7 +950,7 @@ static struct ahash_alg algs[] = {
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CRYPTO_ALG_NEED_FALLBACK,
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.cra_blocksize = SHA1_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct omap_sham_ctx),
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.cra_alignmask = 0,
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.cra_alignmask = OMAP_ALIGN_MASK,
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.cra_module = THIS_MODULE,
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.cra_init = omap_sham_cra_init,
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.cra_exit = omap_sham_cra_exit,
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@ -978,7 +974,7 @@ static struct ahash_alg algs[] = {
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.cra_blocksize = SHA1_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct omap_sham_ctx) +
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sizeof(struct omap_sham_hmac_ctx),
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.cra_alignmask = 0,
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.cra_alignmask = OMAP_ALIGN_MASK,
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.cra_module = THIS_MODULE,
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.cra_init = omap_sham_cra_sha1_init,
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.cra_exit = omap_sham_cra_exit,
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@ -1002,7 +998,7 @@ static struct ahash_alg algs[] = {
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.cra_blocksize = SHA1_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct omap_sham_ctx) +
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sizeof(struct omap_sham_hmac_ctx),
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.cra_alignmask = 0,
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.cra_alignmask = OMAP_ALIGN_MASK,
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.cra_module = THIS_MODULE,
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.cra_init = omap_sham_cra_md5_init,
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.cra_exit = omap_sham_cra_exit,
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