fsldma: snooping is not enabled for last entry in descriptor chain
On the 83xx controller, snooping is necessary for the DMA controller to ensure cache coherence with the CPU when transferring to/from RAM. The last descriptor in a chain will always have the End-of-Chain interrupt bit set, so we can set the snoop bit while adding the End-of-Chain interrupt bit. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Li Yang <leoli@freescale.com>
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1 changed files with 7 additions and 2 deletions
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@ -179,9 +179,14 @@ static void dma_halt(struct fsl_dma_chan *fsl_chan)
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static void set_ld_eol(struct fsl_dma_chan *fsl_chan,
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struct fsl_desc_sw *desc)
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{
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u64 snoop_bits;
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snoop_bits = ((fsl_chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_83XX)
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? FSL_DMA_SNEN : 0;
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desc->hw.next_ln_addr = CPU_TO_DMA(fsl_chan,
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DMA_TO_CPU(fsl_chan, desc->hw.next_ln_addr, 64) | FSL_DMA_EOL,
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64);
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DMA_TO_CPU(fsl_chan, desc->hw.next_ln_addr, 64) | FSL_DMA_EOL
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| snoop_bits, 64);
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}
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static void append_ld_queue(struct fsl_dma_chan *fsl_chan,
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