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tg3: Clarify semantics of TG3_IRQ_MAX_VECS 

TG3_IRQ_MAX_VECS should be seen as the maximum number of vectors that
any device could be expected to use.  tp->irq_max represents the maximum
number of vectors the current device can use.  This patch clarifies the
semantics of the code to match the above description.

Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Matt Carlson 2010-09-15 08:59:57 +00:00 committed by David S. Miller
parent 2e9f7a7408
commit 6fd45cb814
2 changed files with 5 additions and 4 deletions
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6
drivers/net/tg3.c
View File

@ -7564,7 +7564,7 @@ static void tg3_rings_reset(struct tg3 *tp)
/* Zero mailbox registers. */
if (tp->tg3_flags & TG3_FLAG_SUPPORT_MSIX) {
for (i = 1; i < TG3_IRQ_MAX_VECS; i++) {
for (i = 1; i < tp->irq_max; i++) {
tp->napi[i].tx_prod = 0;
tp->napi[i].tx_cons = 0;
if (tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS)
@ -9886,7 +9886,7 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e
tp->rx_pending = 63;
tp->rx_jumbo_pending = ering->rx_jumbo_pending;
for (i = 0; i < TG3_IRQ_MAX_VECS; i++)
for (i = 0; i < tp->irq_max; i++)
tp->napi[i].tx_pending = ering->tx_pending;
if (netif_running(dev)) {
@ -14598,7 +14598,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
intmbx = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW;
rcvmbx = MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW;
sndmbx = MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW;
for (i = 0; i < TG3_IRQ_MAX_VECS; i++) {
for (i = 0; i < tp->irq_max; i++) {
struct tg3_napi *tnapi = &tp->napi[i];
tnapi->tp = tp;

3
drivers/net/tg3.h
View File

@ -2659,7 +2659,8 @@ struct tg3_rx_prodring_set {
dma_addr_t rx_jmb_mapping;
};
#define TG3_IRQ_MAX_VECS 5
#define TG3_IRQ_MAX_VECS_RSS 5
#define TG3_IRQ_MAX_VECS TG3_IRQ_MAX_VECS_RSS
struct tg3_napi {
struct napi_struct napi ____cacheline_aligned;